Datasheet
167
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
• Bit 1 – OCIEnA: Timer/Countern, Output Compare A Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Output Compare A Match interrupt is enabled. The corresponding
Interrupt Vector (see “Interrupts” on page 105) is executed when the OCFnA Flag, located in
TIFRn, is set.
• Bit 0 – TOIEn: Timer/Countern, Overflow Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Countern Overflow interrupt is enabled. The corresponding Interrupt Vector
(see “Interrupts” on page 105) is executed when the TOVn Flag, located in TIFRn, is set.
17.11.37 TIFR1 – Timer/Counter1 Interrupt Flag Register
17.11.38 TIFR3 – Timer/Counter3 Interrupt Flag Register
17.11.39 TIFR4 – Timer/Counter4 Interrupt Flag Register
17.11.40 TIFR5 – Timer/Counter5 Interrupt Flag Register
• Bit 5 – ICFn: Timer/Countern, Input Capture Flag
This flag is set when a capture event occurs on the ICPn pin. When the Input Capture Register
(ICRn) is set by the WGMn3:0 to be used as the TOP value, the ICFn Flag is set when the coun-
ter reaches the TOP value.
ICFn is automatically cleared when the Input Capture Interrupt Vector is executed. Alternatively,
ICFn can be cleared by writing a logic one to its bit location.
• Bit 3– OCFnC: Timer/Countern, Output Compare C Match Flag
This flag is set in the timer clock cycle after the counter (TCNTn) value matches the Output
Compare Register C (OCRnC).
Note that a Forced Output Compare (FOCnC) strobe will not set the OCFnC Flag.
OCFnC is automatically cleared when the Output Compare Match C Interrupt Vector is exe-
cuted. Alternatively, OCFnC can be cleared by writing a logic one to its bit location.
Bit 76543210
0x16 (0x36)
– –ICF1– OCF1C OCF1B OCF1A TOV1 TIFR1
Read/Write R R R/W RR/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x18 (0x38)
– –ICF3– OCF3C OCF3B OCF3A TOV3 TIFR3
Read/Write R R R/W RR/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x19 (0x39)
– –ICF4– OCF4C OCF4B OCF4A TOV4 TIFR4
Read/Write R R R/W RR/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x1A (0x3A)
– –ICF5– OCF5C OCF5B OCF5A TOV5 TIFR5
Read/Write R R R/W RR/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0