User Manual
Table Of Contents
- Safety information
- Chapter 1: Product Introduction
- Chapter 2: Hardware Information
- 2.1 Chassis cover
- 2.2 Air ducts
- 2.3 Central Processing Unit (CPU)
- 2.4 System memory
- 2.5 Storage devices
- 2.6 Expansion slot
- 2.6.1 Installing an expansion card to riser card bracket 1
- 2.6.2 Installing an expansion card to riser card bracket 2
- 2.6.3 Installing an expansion card to riser card bracket 3
- 2.6.4 Installing an expansion card to riser card bracket 4
- 2.6.5 Installing an OCP 3.0 slot baseboard and OCP 3.0 card to the riser card bracket
- 2.6.6 Installing an ethernet expansion card to the riser card bracket
- 2.6.7 Installing GPU cards (on selected models)
- 2.6.8 Installing an ASUS PIKE II card
- 2.6.9 Installing M.2 (NGFF) cards
- 2.6.10 Configuring an expansion card
- 2.7 Cable connections
- 2.8 SATA/SAS backplane cabling
- 2.9 Removable/optional components
- Chapter 3: Installation Options
- Chapter 4: Motherboard Information
- Chapter 5: BIOS Setup
- 5.1 Managing and updating your BIOS
- 5.2 BIOS setup program
- 5.3 Main menu
- 5.4 Ai Tweaker menu
- 5.5 Advanced menu
- 5.5.1 OffBoard SATA Controller Configuration
- 5.5.2 Trusted Computing
- 5.5.3 ACPI Settings
- 5.5.4 Redfish Host Interface Settings
- 5.5.5 Onboard LAN Configuration
- 5.5.6 Serial Port Console Redirection
- 5.5.7 SIO Common Setting
- 5.5.8 SIO Configuration
- 5.5.9 PCI Subsystem Settings
- 5.5.10 USB Configuration
- 5.5.11 Network Stack Configuration
- 5.5.12 CSM (Compatibility Support Module)
- 5.5.13 NVMe Configuration
- 5.5.14 APM Configuration
- 5.5.15 Third-party UEFI driver configurations
- 5.6 Platform Configuration menu
- 5.7 Socket Configuration menu
- 5.8 Event Logs menu
- 5.9 Server Mgmt menu
- 5.10 Security menu
- 5.11 Boot menu
- 5.12 Tool menu
- 5.13 Save & Exit menu
- Chapter 6: Driver Installation
- Appendix
Chapter 1: Product Introduction
1-16
(continued on the next page)
1.7.5 Q-Code table
Action PHASE POST CODE TYPE DESCRIPTION
SEC Start
up
Security Phase
0x01 Progress Power on post code
0x02 Progress Load BSP microcode
0x03 Progress Perform early platform cache Initialization
0x04 Progress Set cache as ram for PEI phase
0x05 Progress Establish Stack
0x06 Progress CPU Early Initialization
Quick VGA
PEI(Pre-EFI
initialization)
phase
0x10
Progress
PEI Core Entry
0x11 PEI cache as ram CPU initial
0x15 NB Initialization before installed memory
0x19 SB Initialization before installed memory
VR initialization
0xC8
Progress
Infineon Address
0xCC
0xD4
Ti Address
0xDC
0xE0
0xE4
0xE8
0xEC
OCMR
initialization
0x11
Progress
Enter OCMR Procedures
0x12 Enter OCMR On S3
0x13 Check New CPU
0x14 Check Cmos Fail
0x16 Check Overclock Fail
0x18 Prepare Parameters
0x21 Build Voltage Table
0x22 Patch Voltage Table
0x23 Adjust Voltage Table
0x24 Before Set Voltages
0x25 Set Voltages
0x31 Before Set Spread Spectrum
0x32 SetBclkStrapAndFrequencyPei
0x33 Set Spread Spectrum
0x34 After Set Frequency