User Manual
Table Of Contents
- 目錄
- 1 認識 BIOS 程式
- 2. BIOS 設定程式
- 3. 我的最愛(My Favorites)
- 4. 主選單(Main Menu)
- 5. Ai Tweaker 選單(Ai Tweaker menu)
- 6 進階選單(Advanced menu)
- 6.1 平台各項設定(Platform Misc Configuration)
- 6.2 處理器設定(CPU Configuration)
- 6.3 系統代理設定(System Agent Configuration)
- 6.4 PCH 設定(PCH Configuration)
- 6.5 PCH 儲存裝置設定(PCH Storage Configuration)
- 6.6 PCH-FW 設定(PCH-FW Configuration)
- 6.7 Thunderbolt(TM) 設定
- 6.8 PCI 子系統設定(PCI Subsystem Settings)
- 6.9 USB 裝置設定(USB Configuration)
- 6.10 網路協定堆疊設定(Network Stack Configuration)
- 6.11 NVMe 設定(NVMe Configuration)
- 6.12 HDD/SSD SMART 資訊
- 6.13 進階電源管理設定(APM Configuration)
- 6.14 內建裝置設定(OnBoard Devices Configuration)
- 6.15 Intel® 快速儲存技術(Intel(R) Rapid Storage Technology)
- 7. 監控選單(Monitor menu)
- 8. 啟動選單(Boot menu)
- 9. 工具菜單(Tools menu)
- 10. 離開 BIOS 程式(Exit menu)
- 11. 更新 BIOS 程式(Updating BIOS)
PRIME / ProArt / TUF GAMING Intel 600 系列 BIOS 使用手冊
25
DQ RTT PARK
設定值:[0 DRAM Clock] [34 DRAM Clock] [40 DRAM Clock] [48
DRAM Clock] [60 DRAM Clock] [80 DRAM Clock] [120 DRAM Clock]
[240 DRAM Clock]
DQ RTT PARK DQS
設定值:[0 DRAM Clock] [34 DRAM Clock] [40 DRAM Clock] [48
DRAM Clock] [60 DRAM Clock] [80 DRAM Clock] [120 DRAM Clock]
[240 DRAM Clock]
GroupA CA ODT
設定值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupA CS ODT
設定值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupA CK ODT
設定值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupB CA ODT
設定值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupB CS ODT
設定值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
GroupB CK ODT
設定值:[0 DRAM Clock] [40 DRAM Clock] [60 DRAM Clock] [80
DRAM Clock] [120 DRAM Clock] [240 DRAM Clock] [480 DRAM
Clock]
Pull-up Output Driver Impedance
設定值:[34 DRAM Clock] [40 DRAM Clock] [48 DRAM Clock]
Pull-Down Output Driver Impedance
設定值:[34 DRAM Clock] [40 DRAM Clock] [48 DRAM Clock]
RTL IOL Control
Round Trip Latency Init Value MC0-1 CHA-B
設定值:[Auto] [0] - [255]
Round Trip Latency Max Value MC0-1 CHA-B
設定值:[Auto] [0] - [255]
Round Trip Latency Offset Value Mode Sign MC0-1 CHA-B
設定值:[-] [+]
Round Trip Latency Offset Value MC0-1 CHA-B
DQ RTT NOM WR
設定值:[0 DRAM Clock] [34 DRAM Clock] [40 DRAM Clock] [48
DRAM Clock] [60 DRAM Clock] [80 DRAM Clock] [120 DRAM Clock]
[240 DRAM Clock]