User's Manual

M2N -MX 2-2 1
Configure DRAM Timing by SP D [Ena bled]
當本項目開啟時, 根據 DRAM SPD (Serial Presence Detect) 設置 DRAM timing
數。 當本項目關閉時,您可透過 DRAM 子項目對 DRAM timing 參數進行手動設置。
當本項目關閉時會出現下列子項目。 設置值有:[Enabled] [Disabled]
DRAM CAS# Latency []
控制 DDR SDRAM 取命令到實際讀取時間之間的延遲時間。 置值有:
[3] [4] [5] [6]
DRAM RAS# 到 CAS# Delay [ DRAM Clocks]
控制 DDR SDRAM 工作命令和讀取/寫入命令之間的延遲時間。設置值有:
[2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks] [6
DRAM Clocks]
DRAM RAS# Precharge [ DRAM Clocks]
DDR SDRAM 發出預先充電命令後可有效控制時間。 設置值有: [2 DRAM
Clocks] [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks] [6 DRAM
Clocks]
DRAM RAS# Activate to Precharge [1 DRAM Clocks]
設置值有: [4 DRAM Clocks] [5 DRAM Clocks]...[18 DRAM Clocks]
DRAM Write Recovery Time [ Clocks]
設置寫入恢復 timing。
DRAM TRFC [30 DRAM Clocks]
設置值有:[20 DRAM Clocks] [25 DRAM Clocks] [30 DRAM Clocks] [35
DRAM Clocks] [42 DRAM Clocks]
DRAM TRRD [10]
設置值有: [10]
Initiate Graphic Adap ter [P EG/PCI ]
您可以選擇顯卡控制器作為原始驅動設備。設置值有: [PCI/PEG] [PEG/PCI]
Initiate Graphic Mode Selec t [Ena bled, MB]
內置擇顯示設備使用內存的量可由您來選擇。設置值有: [Disabled] [Enabled,1MB]
[Enabled, 8MB]
PEG Force x1 [Disable d]
設置值有: [Enabled] [Disabled]