User Manual

Table Of Contents
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ASUS ESC N4A-E11
The following items appear only when EDC Control is set to [Manual].
EDC [0]
Allows you to set the VDDCR_CPU EDC Limit [A].
EDC Platform Limit [0]
Allows you to set the EDC Platform Limit [W].
NBIO RAS Common Options
NBIO RAS Control [Auto]
Configuration options: [Disabled] [MCA] [Legacy] [Auto]
Egress Poison Severity High [30011]
Each bit set to 1 enables HIGH severity on the associated IOHC egress port. A
bit of 0 indicates LOW severity.
Egress Poison Severity Low [4]
Each bit set to 1 enables HIGH severity on the associated IOHC egress port. A
bit of 0 indicates LOW severity.
NBIO SyncFlood Generation [Auto]
This value may be used to mask SyncFlood caused by NBIO RAS options.
When set to TRUE, SyncFlood from NBIO is masked. When set to FALSE,
NBIO is capable of generating SyncFlood.
Configuration options: [Disabled] [Enabled] [Auto]
NBIO SyncFlood Reporting [Auto]
This value may be used to enable SyncFlood reporting to APML. When set to
TRUE, SyncFlood will be reported to APML. When set to FALSE, the reporting
will be disabled.
Configuration options: [Disabled] [Enabled] [Auto]
Egress Poison Mask High [FFFCFFFF]
These set the enable mask for masking of errors logged in EGRESS_
POISON_STATUS. For each bit set to 1, errors are masked. For each bit set to
0, errors trigger response actions.
Egress Poison Mask Low [FFFFFFFB]
These set the enable mask for masking of errors logged in EGRESS_
POISON_STATUS. For each bit set to 1, errors are masked. For each bit set to
0, errors trigger response actions.
Uncorrected Converted to Poison Enable Mask High [30000]
These set the enable mask for masking of uncorrectable parity errors on
internal arrays. For each bit set to 1, a system fatal error event is triggered for
UCP errors on arrays associated with that egress port. For each bit set to 0,
errors are masked.
Uncorrected Converted to Poison Enable Mask Low [4]
These set the enable mask for masking of uncorrectable parity errors on
internal arrays. For each bit set to 1, a system fatal error event is triggered for
UCP errors on arrays associated with that egress port. For each bit set to 0,
errors are masked.