Datasheet

ADuC7128/ADuC7129
Rev. 0 | Page 46 of 92
DACEN Register
Name Address Default Value Access
DACEN 0xFFFF06B8 0x00 R/W
Table 50. DACEN MMR Bit Designations
Bit Description
7:1 Reserved.
0 Set to 1 by the user to enable DAC mode.
Set to 0 by the user to enable DDS mode.
DACDAT Register
Name Address Default Value Access
DACDAT 0xFFFF06B4 0x0000 R/W
Table 51. DACDAT MMR Bit Designations
Bit Description
15:10 Reserved.
9:0 10-bit data for DAC.
The DACDAT MMR controls the output of the DAC. The data
written to this register is a ±9-bit signed value. This means that
0x0000 represents midscale, 0x0200 represents zero scale, and
0x01FF represents full scale.
DACEN and DACDAT require key access. To write to these
MMRs, use the sequences shown in
Table 52.
Table 52. DACEN and DACDAT Write Sequences
DACEN DACDAT
DACKEY0 = 0x07 DACKEY0 = 0x07
DACEN = user value DACDAT = user value
DACKEY1 = 0xB9 DACKEY1 = 0xB9
DDS
The DDS is used to generate a digital sine wave signal for the
DAC on the ADuC7128/ADuC7129. It can be enabled into
a free running mode by the user.
Both the phase and frequency can be controlled.
Table 53. DDSCON MMR Bit Designations
Bit Description
7:6 Reserved.
5 DDS Output Enable.
Set by user to enable the DDS output. This has an effect only if the DDS is selected in DACCON.
Cleared by user to disable the DDS output.
4 Reserved.
Binary Divide Control.
DIV Scale Ratio
0000 0.000
0001 0.125
0010 0.250
0011 0.375
0100 0.500
0101 0.625
0110 0.750
0111 0.875
3:0
1xxx 1.000