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Digital signal processor (DSP) BGA 576-ED (25x25) 1.05 V 500 MHz
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ADSP-TS202S
Rev. C
|
Page 35 of 48
|
December 2006
Figure 25.
Link
Ports—Data Input Se
tup and Ho
ld
1
1
These parame
ters are val
id for both clock ed
ges.
LxCLKIN
LxDATI
V
OD
=0
V
V
OD
=0
V
t
LDIS
t
LDI
H
t
LDI
S
t
LDIH
t
LCLKI
P
1
...
...
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