Datasheet

–2–
AD8561–SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage V
OS
2.3 7 mV
–40°C ≤ T
A
≤ +85°C8mV
Offset Voltage Drift ΔV
OS
/ΔT4μV/°C
Input Bias Current I
B
V
CM
= 0 V –6 –3 μA
I
B
–40°C ≤ T
A
≤ +85°C –7 –3.5 μA
Input Offset Current I
OS
V
CM
= 0 V ±4 μA
Input Common-Mode Voltage Range V
CM
0.0 +3.0 V
Common-Mode Rejection Ratio CMRR 0 V ≤ V
CM
≤ +3.0 V 65 85 dB
Large Signal Voltage Gain A
VO
R
L
= 10 kΩ 3000 V/V
Input Capacitance C
IN
3.0 pF
LATCH ENABLE INPUT
Logic “1” Voltage Threshold V
IH
2.0 1.65 V
Logic “0” Voltage Threshold V
IL
1.60 0.8 V
Logic “1” Current I
IH
V
LH
= 3.0 V –1.0 –0.3 μA
Logic “0” Current I
IL
V
LL
= 0.3 V –4 –2 μA
Latch Enable
Pulsewidth t
PW(E)
6ns
Setup Time t
S
1ns
Hold Time t
H
1.2 ns
DIGITAL OUTPUTS
Logic “1” Voltage V
OH
I
OH
= –50 μA, ΔV
IN
> 250 mV 3.5 V
Logic “1” Voltage V
OH
I
OH
= –3.2 mA, ΔV
IN
> 250 mV 2.4 3.5 V
Logic “0” Voltage V
OL
I
OL
= 3.2 mA, ΔV
IN
> 250 mV 0.25 0.4 V
DYNAMIC PERFORMANCE
Propagation Delay t
P
200 mV Step with 100 mV Overdrive 6.75 9.8 ns
–40°C ≤ T
A
≤ +85°C813ns
Propagation Delay t
P
100 mV Step with 5 mV Overdrive 8 ns
Differential Propagation Delay
(Rising Propagation Delay vs.
Falling Propagation Delay) Δt
P
100 mV Step with 100 mV Overdrive
1
0.5 2.0 ns
Rise Time 20% to 80% 3.8 ns
Fall Time 80% to 20% 1.5 ns
POWER SUPPLY
Power Supply Rejection Ratio PSRR +4.5 V ≤ V+ ≤ +5.5 V 50 65 dB
Positive Supply Current I+ 4.5 6.0 mA
–40°C ≤ T
A
≤ +85°C 7.5 mA
Ground Supply Current I
GND
V
O
= 0 V, R
L
= ∞ 2.2 3.3 mA
–40°C ≤ T
A
≤ +85°C 3.8 mA
Analog Supply Current I– 2.3 4.5 mA
–40°C ≤ T
A
≤ +85°C 5.5 mA
NOTES
1
Guaranteed by design.
Specifications subject to change without notice.
(@ V+ = +5.0 V, V– = V
GND
= 0 V, T
A
= +25ⴗC unless otherwise noted)
Rev. B