Datasheet

AD8331/AD8332/AD8334
Rev. G | Page 24 of 56
THEORY OF OPERATION
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CLAMP
LNA 2
LNA 1
INH1
LON1 LOP1
V
IP1
V
IN1 EN12
INH2
LON2
LOP2
VIP2
PA2
–
ATTENUATOR
–48dB
+
VGA BIAS AND
INTERPOLATOR
+
ATTENUATOR
–48dB
–
GAIN UP/
DOWN
V
MID1
CLAMP
GAIN
INT
VOH1
CLMP12
VOL1
VOL2
GAIN12
HILO
VOH2
VIN2
MODE
V
CM1
V
MID2
V
MID3
VCM2
VCM3
V
MID4
LNA 4
LNA 3
INH3
LON3
LOP3
LMD3
LMD4
INH4
VCM
BIAS
VCM
BIAS
PA3
PA4
–
ATTENUATOR
–48dB
+
VGA BIAS AND
INTERPOLATOR
+
ATTENUATOR
–48dB
–
GAIN
INT
VOH3
VOL3
VOL4
GAIN34
VOH4
CLMP34
21dB
21dB
21dB
21dB
VIP3
VIN3
VCM4EN34VIN4VIP4LON4 LOP4
AD8334
LMD1
LMD2
PA1
OVERVIEW
The AD8331/AD8332/AD8334 operate in the same way.
Figure 69, Figure 70, and Figure 71 are functional block
diagrams of the three devices
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VOL
VOH
LNA
ATTENUATOR
–48dB
–
+
INH
V
IN
V
IPLOPLON
ENBV GAIN
AD8331
+
–
MODE
HILO
3.5dB/
15.5dB
RCLMP
V
MID
V
CM
VGA BIAS AND
INTERPOLATOR
ENBL
GAIN INT
VCM
BIAS
PA21dB
CLAMP
LMD
Figure 69. AD8331 Functional Block Diagram
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LNA 2
LNA 1
+19dB
INH1
LON1 LOP1
LON2 LOP2
VIP1
VIP2
VIN1
VIN2
LMD1
LMD2
INH2
LNA V
MID
PA1
PA2
–
ATTENUATOR
–48dB
+
VGA BIAS AND
INTERPOLATOR
+
ATTENUATOR
–48dB
–
3.5dB/
15.5dB
ENB
GAIN
INT
VOH1
VOL1
VOH2
VOL2
GAIN
RCLMP
HILO
AD8332
V
MID
VCM1
V
MID
VCM2
CLAMP
21dB
21dB
Figure 71. AD8334 Functional Block Diagram
Each channel contains an LNA that provides user-adjustable input
impedance termination, a differential X-AMP VGA, and a pro-
grammable gain postamp with adjustable output voltage limiting.
Figure 72 shows a simplified block diagram with external
components.
Figure 70. AD8332 Functional Block Diagram
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LNA
VOL
VOH
HILO
INH
LMD LOP
LON
PREAMPLIFIER
19dB
POSTAMP
3.5dB/15.5dB
SIGNAL PATH
BIAS
AND
INTERPOLATOR
VIN
VIP
RCLMP
21dB
VCM
V
MID
CLAMP
48dB
ATTENUATOR
GAIN
INTERFACE
GAIN
VCM
BIAS
Figure 72. Simplified Block Diagram