Datasheet

AD8228
Rev. 0 | Page 9 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, V
S
= ±15 V, R
L
= 10 kΩ, unless otherwise noted.
70
60
50
40
30
20
10
0
–100 –50 0 50 100
G10 SYSTEM V
OS
RTI @ 15V (µV)
HITS
07035-043
MEAN: –5.5
SD: 12.4
Figure 3. Typical Distribution of Input Offset Voltage (G = 10)
60
50
40
30
20
10
0
–1.5 –1.0 –0.5 0 0.5 1.0 1.5
G10 SYSTEM V
OS
DRIFT RTI (µV)
HITS
07035-045
MEAN: –0.079
SD: 0.27
Figure 4. Typical Distribution of Input Offset Voltage Drift (G = 10)
80
60
40
20
0
–100 –50 0 50 100
G100 SYSTEM V
OS
RTI @ 15V (µV)
HITS
07035-046
MEAN: 7.1
SD: 10.1
Figure 5. Typical Distribution of Input Offset Voltage (G = 100)
100
80
60
40
20
0
–1.0 –0.5 0 0.5 1.0 1.5
G100 SYSTEM V
OS
DRIFT RTI (µV)
HITS
07035-047
MEAN: 0.20
SD: 0.12
Figure 6. Typical Distribution of Input Offset Voltage Drift (G = 100)
100
80
60
40
20
0
–3 –2 –1 0 1 2 3
CMRR G100 RTI (µV/V)
HITS
07035-048
MEAN: 0.29
SD: 0.27
Figure 7. Typical Distribution for CMR (G = 100)
100
120
80
60
40
20
0
1.5–0.5 0 0.5 1.0
NEG I
BIAS
CURRENTS ±15V (nA)
HITS
07035-049
MEAN: 0.42
SD: 0.08
Figure 8. Typical Distribution of Input Bias Current