Datasheet

AD7195
Rev. 0 | Page 35 of 44
When the analog input is constant or a channel change occurs,
valid conversions are available at a constant output data rate.
When conversions are being performed on a single channel and
a step change occurs on the analog input, the ADC continues to
output fully settled conversions if the step change is synchronized
with the conversion process. If the step change is asynchronous,
one conversion is output from the ADC, which is not completely
settled (see Figure 27).
ANALO
G
INPUT
ADC
OUTPUT
FULLY
SETTLED
1/ f
ADC
08771-040
Figure 27. Sinc
4
Zero Latency Operation
Table 30 shows examples of output data rate and the corres-
ponding FS values.
Table 30. Examples of Output Data Rates and the
Corresponding Settling Time (Zero Latency)
FS[9:0] Output Data Rate (Hz) Settling Time (ms)
480 2.5 400
96 12.5 80
80 15 66.6
Sinc
4
50 Hz/60 Hz Rejection
Figure 28 shows the frequency response of the sinc
4
filter when
FS[9:0] is set to 96 and the master clock is 4.92 MHz. With zero
latency disabled, the output data rate is equal to 50 Hz. With
zero latency enabled, the output data rate is 12.5 Hz. The sinc
4
filter provides 50 Hz (±1 Hz) rejection in excess of 120 dB
minimum, assuming a stable master clock.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0
2
5
5
0
7
5
1
0
0
1
2
5
1
5
0
FREQUENCY (Hz)
FILTER GAIN (dB)
08771-041
Figure 28. Sinc
4
Filter Response (FS[9:0] = 96)
Figure 29 shows the frequency response when FS[9:0] is
programmed to 80 and the master clock is equal to 4.92 MHz.
The output data rate is 60 Hz when zero latency is disabled and
15 Hz when zero latency is enabled. The sinc
4
filter provides
60 Hz (±1 Hz) rejection of 120 dB minimum, assuming a stable
master clock.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0
3
0
6
0
9
0
1
2
0
1
5
0
FREQUENCY (Hz)
FILTER GAIN (dB)
08771-042
Figure 29. Sinc
4
Filter Response (FS[9:0] = 80)
Simultaneous 50 Hz and 60 Hz rejection is obtained when
FS[9:0] is programmed to 480 and the master clock equals
4.92 MHz. The output data rate is 10 Hz when zero latency is
disabled and 2.5 Hz when zero latency is enabled. The sinc
4
filter provides 50 Hz (±1 Hz) and 60 Hz (±1 Hz) rejection of
120 dB minimum, assuming a stable master clock.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0 30 60 90 120 150
FREQUENCY (Hz)
FILTER GAIN (dB)
08771-043
Figure 30. Sinc
4
Filter Response (FS[9:0] = 480)
Simultaneous 50 Hz/60 Hz rejection can also be achieved using
the REJ60 bit in the mode register. When FS[9:0] is set to 96
and REJ60 is set to 1, notches are placed at 50 Hz and 60 Hz.