Datasheet

AD5930 Data Sheet
Rev. | Page 4 of 28
SPECIFICATIONS
AV
DD
= DV
DD
= 2.3 V to 5.5 V, AGND = DGND = 0 V, T
A
= T
MIN
to T
MAX
, R
SET
= 6.8 kΩ, R
LOAD
= 200 Ω for IOUT and IOUTB,
unless otherwise noted.
Table 1.
Y Grade
1
Parameter Min Typ Max Unit Test Conditions/Comments
SIGNAL DAC SPECIFICATIONS
Resolution 10 Bits
Update Rate 50 MSPS
I
OUT
Full-Scale
2
3 4.0 mA
V
OUT
Peak-to-Peak 0.56 V
V
OUT
Offset 45 mV From 0 V to the trough of the waveform
V
MIDSCALE
0.325 V Voltage at midscale output
Output Compliance 0.8 V AV
DD
= 2.3 V, internal reference used
3
DC Accuracy
Integral Nonlinearity (INL) ±1.5 LSB
Differential Nonlinearity (DNL)
±0.75
LSB
DDS SPECIFICATIONS
Dynamic Specifications
Signal-to-Noise Ratio 53 60 dB f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/4096
Total Harmonic Distortion −60 −53 dBc f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/4096
Spurious-Free Dynamic Range
(SFDR)
Wideband (0 to Nyquist) −62 −52 dBc f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/50
Narrowband (±200 kHz)
−76
−73
dBc
f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/50
Clock Feedthrough −50 dBc Up to 16 MHz out
Wake-Up Time 1.7 ms From standby
OUTPUT BUFFER
V
OUT
Peak-to-Peak 0 DV
DD
V Typically, square wave on MSBOUT and SYNCOUT
Output Rise/Fall Time
2
12 ns
VOLTAGE REFERENCE
Internal Reference 1.15 1.18 1.26 V
External Reference Range 1.3 V
REFOUT Input Impedance 1 kΩ V
IN
@ REF pin < Internal V
REF
25 kΩ V
IN
@ REF pin > Internal V
REF
Reference TC
2
90
ppm/°C
LOGIC INPUTS
Input Current 0.1 ±1 µA
V
INH
, Input High Voltage
1.7
V
DV
DD
= 2.3 V to 2.7 V
2.0 V DV
DD
= 2.7 V to 3.6 V
2.8 V DV
DD
= 4.5 V to 5.5 V
V
INL
, Input Low Voltage 0.6 V DV
DD
= 2.3 V to 2.7 V
0.7 V DV
DD
= 2.7 V to 3.6 V
0.8 V DV
DD
= 4.5 V to 5.5 V
C
IN
, Input Capacitance
2
3 pF
LOGIC OUTPUTS
2
V
OH
, Output High Voltage DV
DD
− 0.4 V V I
SINK
= 1 mA
V
OL
, Output Low Voltage 0.4 V I
SINK
= 1 mA
Floating-State O/P Capacitance 5 pF
B