Datasheet

AD5421 Data Sheet
Rev. G | Page 30 of 36
OFFSET ADJUST REGISTER
The offset adjust register is a read/write register and is addressed as described in Tabl e 12.
Table 21. Offset Adjust Register Bit Map
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
16-bit offset adjust data
Table 22. Offset Adjust Register Adjustment Range
Offset Adjust Register Data Digital Offset Adjustment (LSBs)
65535 +32767
65534 +32766
… …
32769 +1
32768 (default)
0
32767 −1
… …
1 −32767
0 −32768
GAIN ADJUST REGISTER
The gain adjust register is a read/write register and is addressed as described in Table 12.
Table 23. Gain Adjust Register Bit Map
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
16-bit gain adjust data
Table 24. Gain Adjust Register Adjustment Range
Gain Adjust Register Data Digital Gain Adjustment at Full-Scale Output (LSBs)
65535 (default) 0
65534
−1
… …
32769 −32767
32768 −32768
32767 −32769
…
…
1 −65534
0 −65535