Datasheet

Data Sheet AD5421
Rev. G | Page 13 of 36
Pin No.
Mnemonic Description
TSSOP LFCSP
13, 14 4, 11, 12 COM
Ground Reference Pin for the AD5421. It is recommended that a 4.7 V Zener diode be placed
between the LOOP− and COM pins. See the Applications Information section for more
information.
15, 16,
17
13, 14, 15
REG_SEL2,
REG_SEL1,
REG_SEL0
These three pins together select the regulator output (REG
OUT
) voltage (see the Voltage Regulator
section).
18 17 REFIN Reference Voltage Input. V
REFIN
= 2.5 V for specified performance.
19 18 REFOUT2
Internal Reference Voltage Output (1.22 V). It is recommended to connect a 100 nF capacitor
from this pin to COM.
20 19 REFOUT1
Internal Reference Voltage Output (2.5 V). It is recommended to connect a 100 nF capacitor from
this pin to COM.
21
20
C
IN
External Capacitor Connection and HART FSK Input. An external capacitor connected from C
IN
to
COM implements an output slew rate control function (see the Loop Current Slew Rate Control
section). HART FSK signaling can also be coupled through a capacitor to this pin (see the HART
Communications section).
22, 23 21, 22 R
EXT1
, R
EXT2
Connection for External Current Setting Resistor. A precision 24 kΩ resistor can be connected
between these pins for improved performance.
24 23 LOOP−
Loop Current Return Pin. As shown in Figure 1, the COM and LOOP− pins can be used to sense
the loop current across the internal 52 Ω resistor. Note that the voltage measured at LOOP− will
be negative with respect to COM.
25 23 V
LOOP
Voltage Input Pin. Voltage input range is 0 V to 2.5 V. The voltage applied to this pin is digitized to
eight bits, which are available in the fault register. This pin can be used for general-purpose
voltage monitoring, but it is intended for monitoring of the loop supply voltage. Connecting the
loop voltage to this pin via a 20:1 resistor divider allows the AD5421 to monitor and feedback
the loop voltage. The AD5421 also generates an alert if the loop voltage is close to the minimum
operating value (see the Loop Voltage Fault section).
26 26 DRIVE
Gate Connection for External Depletion Mode MOSFET. For more information, see the
Connection to Loop Power Supply section.
27
27
REG
IN
Voltage Regulator Input. The loop voltage can be connected directly to this pin. Or, to reduce on-
chip power dissipation, an external pass transistor can be connected at this pin to stand off the
loop voltage. For more information, see the Connection to Loop Power Supply section.
28 28 REG
OUT
Voltage Regulator Output. Pin selectable values are from 1.8 V to 12 V via the REG_SEL0,
REG_SEL1, and REG_SEL2 pins (see the Voltage Regulator section). If REGOUT is driving a
microconverter supply (see Figure 50), this pin should be decoupled to COM with a >1 μF
capacitor.
N/A
1
9, 16, 25 NC No Connect. Do not connect to this pin.
EPAD EPAD Exposed Pad
The exposed paddle should be connected to the same potential as the COM pin and to a copper
plane for optimum thermal performance.
1
N/A means not applicable.