Specifications

PC/II+p Board Technical Reference Manual 38

7.7 Ethernet Interface

PC/II+p contains an optional, highly-integrated LAN Ethernet Interface, that is used in networking

applications. This option includes the single-chip Crystal CS8900 controller (U004), a configuration EEPROM

(U003), isolation transformers for either 10Base-T (F002) and/or AUI (F001), depending upon the option

ordered, a dual LED (D001) for link and local activity, and an on-board Ethernet header (J905).

PC/II+p provides the Attachment Unit Interface (AUI) port signals and the 10Base-T differential signals on a

10-Pin 2x5 0.100 on-board header, J905. These signals can be accessed directly from the board, or can be

cabled to a Megatel transition board (for example, the QTB/Dxp-sm) where they can be accessed from a

header or through an RJ-45 connector. Alternatively, when connected to the Megatel Ethernet Paddle Board,

the AUI port signals are provided on a DB15 connector and the 10Base-T port signals are provided on a RJ-

45 connector. The AUI port can be connected to an Ethernet Transceiver cable drop to provide a fully IEEE

802.3 AUI interface, while the 10Base-T interface also fully complies to IEEE 802.3.

The Crystal CS8900 Ethernet controller (U004) contains an IEEE 802.3 MAC engine that operates in the I/O

memory space. The controller contains on-chip RAM for buffering receive & transmit frames, and supports

full duplex operation, supports a 10BASE-T port with analog filters & automatic polarity correction, and

supports an AUI port. Programmable transmit features of the controller include automatic re-transmission on

collision, and automatic padding and CRC generation. Programmable receive features of the controller

include Automatic-switch between DMA & on-chip memory, early interrupts for frame preprocessing, and

automatic rejection of erroneous packets. An on-board configuration EEPROM (U003) is provided for jumper-

less configuration, and on-board transformers (F001 and F002) for each interface are provided. The CS8900

supports I/O transfers at up to 10 Megabits/sec. Depending upon which media is active, the AUI or 10Base-T

interface is automatically enabled. This automatic selection can be overridden by software configuration.

Drivers for most operating systems, including Linux, DOS, and Windows, are available.

The CS8900 LINKLED# (Link Good LED, or Host-Controlled Output) signal drives one of the on-board

LED's. This LED is, by default, configured to mark the presence of valid link pulses (Link Good). It may be

reprogrammed by the customer for any other purpose, as follows:

• when the HCE0 bit of the CS8900 Self Control register (Register 15) is clear, this active-low output to the

LED is low when the CS8900 detects the presence of valid link pulses;

• when the HCE0 bit is set, the host may drive this pin low by setting the HCBO in the Self Control register.

The CS8900 LANLED# (LAN Activity LED) signal drives the other on-board LED. During normal operation,

this active-low output goes low for 6 ms whenever there is a receive packet, a transmit packet or a collision.

For detailed specifications of the Ethernet Controller and Interface, please refer to the datasheets for the

Ethernet Controller and Isolation Transformers, found in section 2

, "Reference Documents" in this document.

The document, "Ethernet Appbook", Document number MT004702, also provides information on using the

Ethernet feature on the PC/II+p board.