CLM920_TE3 hardware user guide Version 1.4 Address：Room 603, Building No. E, 666shengxia Road Pudong Shanghai. Phone： 021-50177336 Website： http://www.yuge-info.com Technical support：Support@yuge-info.
CLM920_TE3 hardware user guide Version 1.2 Document history Revision record Version Date Description V1.0 20160812 Initial V1.1 2017/6/30 Add CLM920 TE3 V1.2 2017/9/13 Correct errors V1.3 2017/11/2 Correct errors V1.
CLM920_TE3 hardware user guide Version 1.2 List 1 Introduction................................................................................................................................... 4 2 Product summary .......................................................................................................................... 5 2.1 Product brief ................................................................................................................... 5 2.2 Module characteristics .........
CLM920_TE3 hardware user guide Version 1.2 6 7 8 9 Interface electrical characteristics ........................................................................................... 32 6.1 Module I/O level ................................................................................................... 32 6.2 Electrostatic characteristics................................................................................... 32 Mechanical characteristics .......................................................
CLM920_TE3 hardware user guide Version 1.2 1 Introduction This document is a wireless solution product, CLM920_TE3, 4G module hardware interface manual, describes the hardware composition and function features of the module and application interface definition and usage instructions also Electrical & mechanical characteristics, etc. which provide hardware description for user's application development based on this product.
CLM920_TE3 hardware user guide Version 1.2 UART UIM USB VSWR Universal asynchronous receiver-transmitter User Identifier Management Universal Serial Bus Voltage Standing Wave Ratio 2 Product summary 2.1 Product brief CLM920_TE3 Module baseband chip using Qualcomm MDM9X07,it is integrate FDD/TDD/TD-SCDMA/UMTS/EVDO/CDMA/EDGE/GSM support multiple network formats and GPS,supported OS: Windows7/Windows8/Windows10/Android4.0 embedded operating system.
CLM920_TE3 hardware user guide Version 1.2 Supported band (CLM920_TB3) Supported band （CLM920_TE3） Working Voltage working temperature Interface Antenna TX power LTE（FDD）B1/B3/B5/B8 LTE (TDD) B38/B39/B40/B41 UMTS/HSDPA/HSUPA Band B1/B5/B8 TD-SCDMA B34/B39 GSM/GPRS/EDGE Tri Band 900/1800 LTE (FDD)B1/B3/B5/B7/B8/B20 LTE (TDD) B38/B39/B40/B41 WCDMA B1/B5/B8 TD-SCDMA B34/B39 GSM/GPRS/EDGE Tri Band 850/900/1800 3.3V—4.2V, Typical type 3.
CLM920_TE3 hardware user guide Version 1.2 Uplink/Downlink Speed Positioning system Diversity Antenna AT-command Tethering Humidity range Label Index 2.3 TDD-HSPA+: Relese3 DL 4.2Mbps/UL 2.2Mbps HSPA+: DL 21.6 Mbps/UL 5.76 Mbps DC-HSPA+:R8 DL 42 Mbps/UL 5.76 Mbps CDMA 1X: DL 153.6kbps/UL 153.6kbps CDMA 1xEVDOr0: DL 2.4Mbps/UL 153kbps CDMA 1xEVDOrA: DL 3.1Mbps/UL 1.
CLM920_TE3 hardware user guide Version 1.2 Figure 1 CLM920_TE3 4G Block diagram 3 Interface description 3.
CLM920_TE3 hardware user guide Version 1.2 3.2 Module interface 3.2.1 I/O definition Figure 3-1：Parameter definition Type Description DO IO DI AO OD PI PO AI Data Out IN/Out Data In Analog Out Open Drain Power IN Power Out Analog In CLM920_TE3 4G module interface definition is shown in the following table： Figure 3-2 interface definition PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PIN Name WAKEUP_IN AP_READY RESERVED W_DISABLE NET_MODE NET_STATUS VREG_1.
CLM920_TE3 hardware user guide Version 1.2 DI 32 ON/OFF GND VREG_2.85V PCM_IN PCM_OUT PCM_SYNC PCM_CLK SD_D3 SD_CLK SD_CMD SD_D1 SD_D2 PO DI DO IO IO IO DO IO IO Power ON/OFF Ground Output 2.
CLM920_TE3 hardware user guide Version 1.
CLM920_TE3 hardware user guide Version 1.2 3.2.2 PIN allocation Figure 2 CLM920_TE3 PIN allocation 3.3 Power Supply 3.3.1 interface introduction CLM920_NC5 4G module power supply interface consist of four part： VBAT: main power supply(battery also can be used) VREG_USIM: USIM power supply VREG_1.8V: Output, max current 50mA VREG_2.85V: TF card power supply, max current50mA.
CLM920_TE3 hardware user guide Version 1.2 3.3.2 Power Supply design CLM920_TE3 4G has four VBAT pins are used connect external power supplies, can be divided into two power domain, one is(59,60pin)used baseband chipset, the other is (57,58pin)used RF power supplies, range is 3.3V~4.2V, we are recommend to use 3.3V/2A, Module can be generate a peak current of 2A at the instant of transmitting maximum rate. It might be bit ripples, so recommend to use one 150uF Cap and three 47uF Caps.
CLM920_TE3 hardware user guide Version 1.2 Power on time sequence diagram: Figure 4 Power ON sequence 图 5 Power ON Circuit Power OFF：In Power ON status, press PWRKEY(active LOW)and release it.
CLM920_TE3 hardware user guide Version 1.2 Figure 6 Power OFF sequence 3.5 Reset RESET_N use for module reset. Pull RESET pin LOW(200ms above). Figure 3-5 Reset PIN Definition PIN Name 20 RESET Level 1.3V-2.1V Description Reset, Active LOW RESET：Pull this PIN LOW (200ms)module will be reset immediately, this pin need to pull-up resistor 10K is recommended at 1.8V. The pin is sensitive to the interference ratio and should be protected.
CLM920_TE3 hardware user guide Version 1.2 Figure 7 Reset reference circuit 3.6 USB Interface CLM920_TE3 support USB2.0 high speed at (480Mbps), Full speed at（12Mbps）and follow USB2.0 characteristic. USB PIN description： Figure 3-6 USB Pin description PINs Name 71 70 USB_VBUS USB_DUSB_D+ 69 I/O Description PI IO IO USB VBUS USBUSB+ USB usage： 1: When the module go into sleep mode, DTR should be HIGH or OPEN.
CLM920_TE3 hardware user guide Version 1.2 Figure 8 USB reference circuit Design note： 1. USB routing design needs to strictly comply with the requirements of USB2.0 protocol, pay attention to the protection of the data line, differential line, control impedance is 90 ohm, the upper and lower left and right ground handling. 2.
CLM920_TE3 hardware user guide Version 1.2 67 UART_TXD DO TX 68 UART_RXD DI RX Serial port usage： When the host and the module are connected through the serial port, Module can into sleep mode by pulling the DTR HIGH, pulling down the DTR to wake up the module, when URC report, RI signal will send a signal to wake up the host.
CLM920_TE3 hardware user guide Version 1.2 Figure 10 UART Debug Pin 3.8 USIM Interface CLM920_TE3 provides a USIM card interface compatible with ISO 7816-3 standard, and supports 1.8V/3.0V USIM card. The module automatically identifies 1.8V or 2.85V USIM card. Figure 3-9 USIM PINs PINs Name I/O Level 13 14 15 16 17 USIM_DET VREG_USIM USIM_DATA USIM_CLK USIM_RESET DI PO IO DO DO 1.8V 1.8V/2.85V 1.8V/2.85V 1.8V/2.85V 1.8V/2.85V Description SIM Detect USIM Power USIM Data USIM Clock USIM Reset 3.
CLM920_TE3 hardware user guide Version 1.2 3.8.2 USIM_DET hot swap design CLM920_TE3 4G support USIM hot swap function. The USIM_DET pin is used as an input detection pin to determine whether the SIM card is inserted or not. The USIM_DET pin defaults to a pull-up level. Figure 3-10 hot swap NO PIN USIM_DET status 1 2 13 13 HIGH LOW 描述 SIM inserted SIM plug out Figure 12 USIM detect circuit Use AT-command, user can ON/OFF this function. Reference AT command manual in details. 3.
CLM920_TE3 hardware user guide Version 1.2 Figure 12 3.10 Airplane mode reference design PCM and I2C Interface： Module provides PCM and I2C interface, PCM mode：PCM Master, 2M clock, 8k sample rate,16 bit linear. PCM voice level is 1.8V, slave should be paid to level matching in application . Only support PCM master. Figure 3-12 PCM Pin definition PIN Name I/O Level Description 24 25 26 27 41 PCM_IN PCM_OUT PCM_SYNC PCM_CLK I2C_SCL DI PO IO DO OD 1.8V 1.8V 1.8V 1.8V 1.
CLM920_TE3 hardware user guide Version 1.2 Figure 13 3.11 PCM reference design SD Card The module provides SD card interface, SDC2 is the SD card interface 1.8V/2.95V level, cannot be used as GPIO, only for SD card. Since the VREG_2.85V power supply can only provide the maximum 50mA current, the SD card power supply needs to be separately supplied with LDO to SD card power supply.
CLM920_TE3 hardware user guide Version 1.2 Figure 14 3.12 SD reference design SPI Interface CLM920_TE3 provides SPI interface. SPI voltage level is 1.8V, clock rate 26MHz. Figure 3-14 SPI Pin description PINs 37 38 39 40 3.13 Name SPI_MISO SPI_CS SPI_CLK SPI_MOSI I/O DI DO DO DO Level 1.8V 1.8V 1.8V 1.
CLM920_TE3 hardware user guide Version 1.2 3.14 Network status LEDs CLM920_TE3 4G provides three GPIOs to display working status. Figure 3-16 Network indication LED Name PIN I/O NET_MODE NET_ STATUS STATUS 5 6 61 DO DO DO Description Network status Network status Module status Figure 3-17 Status LED Status LED status Searching Network Voice call or Data call Registration OK, idle state Slow blink（period of 3s） Quick blink（period of 3s） Quick blink（period of 0.
CLM920_TE3 hardware user guide Version 1.2 Figure 3-18 ADC Pin description PINs Name I/O 44 45 ADC1 ADC0 I I Level 0.3-VBAT 0.3-VBAT 4 Overall technical index 4.1 Overview of this chapter Description Analog input Analog input CLM920_TE3 RF contains the following parts： Working frequency； Conducting RF measurement ； The receiving sensitivity and power conduction. ； 4.
CLM920_TE3 hardware user guide Version 1.2 4.3 Conduction radio frequency measurement 4.3.1 testing environment Figure 4-2 Test instrument Instrument Power supply RF cable Murata coaxial RF line 4.3.2 R&S CMW500 Agilent 66319 Rosenberger Precision Microwave Cable MXHP32HP1000 Test standard CLM920_TE3 follows 3GPP TS 51.010-1, 3GPP TS 34.121-1, 3GPP TS 36.521-1, 3GPP2 C.S0011 and 3GPP2 C.S0033 test standard. Each module is strictly tested in the factory to ensure the quality is reliable. 4.
CLM920_TE3 hardware user guide Version 1.2 LTE B40（TDD QPSK ）95%） LTE B41（TDD QPSK ）95%） < –97(10 MHz) < –97(10 MHz) -98 -97 Figure 4-5 TX power index 3GPP standard (dBm) 21 to 25 21 to 25 21 to 25 21 to 25 21 to 25 21 to 25 21 to 25 Name LTE B1 LTE B3 LTE B5 LTE B38 LTE B39 LTE B40 LTE B41 4.
CLM920_TE3 hardware user guide Version 1.2 GPRS900 GPRS1800 EDGE850 EDGE900 EDGE1800 1UP/1DL 1UP/1DL 1UP/1DL 1UP/1DL 1UP/1DL 5 0 8 8 2 315 200 220 225 175 Figure 4-8 WCDMA power consumption Band WCDMA B1 Power 23.2dbm 1dbm Current (mA) 556 165 Figure 4-9 LTE power consumption Band B1 B3 B38 B39 B40 B41 Power dBm 21.5 21.8 22.5 21.9 22.1 22.8 Current (AVG）mA 560 545 465 375 362 482 Figure 4-10 TDS-CDMA power consumption 5 Band Power dBm Current（AVG）mA TDS B34 TDS B39 22.8 23.
CLM920_TE3 hardware user guide Version 1.2 Figure 16 Antenna interface 5.2 Diversity Antenna interface CLM920_TE3, Diversity antenna need to obtain better RF performance, it is necessary to reserve PI matching circuit. Parameters can be matched according to board of the customers, and the 68~100nH inductor can be connected to the ground to prevent static electricity. Attention is paid to the impedance matching and antistatic or lightning stroke of the antenna.
CLM920_TE3 hardware user guide Version 1.2 ANT_GNSS 47 AI GNSS Antenna（50Ω Ohm） Figure 5-4 GNSS RX frequency TYPE Frequency Beidou 1561.098 ± 2.046MHz GPS/Galileo/QZSS 1575.42 ± 1.023MHz GLONASS 1597.5 ~ 1605.8MHz GNSS reference design can be designed according to the type of antenna, if a passive antenna is selected, design can add a PI type circuit just like the main diversity antenna and 100pF capacitor can be placed in the middle.
CLM920_TE3 hardware user guide Version 1.2 Figure 19 Antenna connector RF connector plug fitted with this connector is HRS U.FL-LP series.
CLM920_TE3 hardware user guide Version 1.2 Figure 21 Package size 6 6.1 Interface electrical characteristics Module I/O level CLM920_TE3 I/O level as below： For a 1.8V USIM use REG_USIM 1.8V and for a 3V USIM use REG_USIM 2.85V. Other I/O voltage level is 1.8V. Figure 6-1 CLM920_TE3 4G voltage level Parameter Description VIH VIL VOH VOL Voltage Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output LOW 6.2 Minimum 0.65*VDD_IO V VDD_IO-0.45 V 0V Maximum VDD_IO+0.3V 0.
CLM920_TE3 hardware user guide Version 1.2 Analog Voice VBAT 7 7.
CLM920_TE3 hardware user guide Version 1.
CLM920_TE3 hardware user guide Version 1.
CLM920_TE3 hardware user guide Version 1.
CLM920_TE3 hardware user guide Version 1.2 9 Packaging and production 9.1 packaging and storage CLM920_TE3, packaging with pallets, is sealed by vacuum sealing bag, 10pcs one pallet, one package contains 100pcs, shipped in the form of vacuum sealing bag. The storage of modules follows the following conditions ： 1. When the ambient temperature is below 40 degrees centigrade and the air humidity is less than 90%, the module can be stored in vacuum sealed bag for 12 months. 2.
CLM920_TE3 hardware user guide Version 1.
