locate, communicate, accelerate LISA-U1/LISA-H1 series 3.75G/3.5G HSxPA Wireless Modules System Integration Manual Abstract This document describes the features and the integration of the LISA-U1/LISA-H1 series HSxPA wireless modules. LISA-U1/LISA-H1 series modules are a complete and cost efficient 3.75G/3.5G solution offering high-speed dual-band HSDPA/HSUPA and quad-band GSM/GPRS voice and/or data transmission technology in a compact form factor. 33.2 x 22.4 x 2.7 mm www.u-blox.
LISA-U1/LISA-H1 series - System Integration Manual Document Information Title LISA-U1/LISA-H1 series Subtitle 3.75G/3.5G HSxPA Wireless Modules Document type System Integration Manual Document number 3G.G2-HW-10002-2 Document status Advance Information Document status information Objective This document contains target values. Revised and supplementary data will be published Specification later. Advance This document contains data based on early testing.
LISA-U1/LISA-H1 series - System Integration Manual Preface u-blox Technical Documentation As part of our commitment to customer support, u-blox maintains an extensive volume of technical documentation for our products. In addition to our product-specific technical data sheets, the following manuals are available to assist u-blox customers in product design and development.
LISA-U1/LISA-H1 series - System Integration Manual Contents Preface ................................................................................................................................ 3 Contents.............................................................................................................................. 4 1 System description ....................................................................................................... 7 1.1 1.2 Overview .............................
LISA-U1/LISA-H1 series - System Integration Manual 2 1.15.1 1.15.2 R&TTED and European Conformance CE mark ............................................................................ 79 IC ................................................................................................................................................ 79 1.15.3 Federal communications commission notice ................................................................................ 79 Design-In ..........................
LISA-U1/LISA-H1 series - System Integration Manual A Extra Features ........................................................................................................... 110 A.1 TCP/IP ............................................................................................................................................... 110 A.1.1 B Multiple IP addresses and sockets .............................................................................................. 110 A.2 A.3 FTP .............
LISA-U1/LISA-H1 series - System Integration Manual 1 System description 1.1 Overview The LISA-U1/LISA-H1 series is a family of SMT wireless modules featuring Leadless Chip Carrier (LCC) packaging and integrating a full-feature 3G UMTS/HSxPA and 2G GSM/GPRS/EDGE protocol stack with A-GPS support.
LISA-U1/LISA-H1 series - System Integration Manual 1.2 Architecture (U)SIM Card ANT FEM & 2G PA DDC (for GPS) RF Transceiver UART 3G PA SPI 26 MHz 3G PA LNA SAW Filter 32.
LISA-U1/LISA-H1 series - System Integration Manual 1.2.1 Functional blocks LISA-U1/LISA-H1 series modules consist of the following internal functional blocks: RF high power front-end, RF transceiver, Baseband section and Power Management Unit.
LISA-U1/LISA-H1 series - System Integration Manual Wireless baseband processor, a mixed signal ASIC which integrates: Microprocessor for controller functions, 2G & 3G upper layer software DSP core for 2G Layer 1 and audio processing 3G coprocessor and HW accelerator for 3G Layer 1 control software and routines Dedicated HW for peripherals control, as UART, USB, SPI etc Memory system in a Multi-Chip Package (MCP) integrating two devices: NOR flash non-volatile memory DDR SRAM vo
LISA-U1/LISA-H1 series - System Integration Manual 1.3 Pin-out Table 1 lists the pin-out of the LISA-U1/LISA-H1 series modules, with pins grouped by function. Function Pin No I/O Description Remarks Power VCC 61, 62, 63 I Module Supply GND N/A Ground V_BCKP 1, 3, 6, 7, 8, 17, 25, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 60, 64, 65, 66, 67, 69, 70, 71, 72, 73, 75, 76 2 Clean and stable supply is required: low ripple and low voltage drop must be guaranteed.
LISA-U1/LISA-H1 series - System Integration Manual Function DDC UART GPIO USB Pin No I/O Description Remarks SPI_MRDY 59 I SPI Master Ready to transfer control line. Master Output, Slave Input Module Input: module runs as an SPI slave. Internal active pull- down to GND enabled. See section 1.9.4 SCL 45 O I2C bus clock line Fixed open drain. External pull-up required. See section 1.
LISA-U1/LISA-H1 series - System Integration Manual Function System Audio (LISA-U120, LISA-U130) Reserved Reserved (LISA-U100, LISA-U110, LISA-H100, LISA-H110) Pin No I/O Description Remarks USB_D- 27 I/O USB Data Line D- PWR_ON 19 I Power-on input RESET_N 22 I External reset input I2S_CLK 43 O I2S clock I2S_RXD 44 I I2S receive data I2S_TXD 42 O I2S transmit data I2S_WA 41 O I2S word alignment MIC_N 39 I Differential analog audio input (negative) MIC_P 40 I Diff
LISA-U1/LISA-H1 series - System Integration Manual 1.4 Operating modes LISA-U1/LISA-H1 series modules include several operating modes, each have different active features and interfaces. Table 2 summarizes the various operating modes and provides general guidelines for operation. Operating Mode Description Features / Remarks Transition condition General Status: Power-down Not-Powered Mode Power-Off Mode VCC supply not present or below operating range. Microprocessor switched off (not operating).
LISA-U1/LISA-H1 series - System Integration Manual Operating Mode Active-Mode Connected-Mode Description Microprocessor runs with 26 MHz as reference oscillator. The module is prepared to accept data signals from an external device. Voice or data call enabled. Microprocessor runs with 26 MHz as reference oscillator. The module is prepared to accept data signals from an external device. Features / Remarks Transition condition Module is switched on and is fully active.
LISA-U1/LISA-H1 series - System Integration Manual 1.5 Power management 1.5.1 Power supply circuit overview LISA-U1/LISA-H1 series modules feature a power management concept optimized for the most efficient use of supplied power. This is achieved by hardware design utilizing a power efficient circuit topology (Figure 4), and by power management software controlling the module’s power saving mode.
LISA-U1/LISA-H1 series - System Integration Manual V_BCKP is the Real Time Clock (RTC) supply. When the VCC voltage is within the valid operating range, the internal PMU supplies the Real Time Clock and the same supply voltage will be available to the V_BCKP pin. If the VCC voltage is under the minimum operating limit (for example, during not powered mode), the Real Time Clock can be externally supplied via the V_BCKP pin (see section 1.5.4). When a 1.
LISA-U1/LISA-H1 series - System Integration Manual Stress beyond the VCC absolute maximum ratings can cause permanent damage to the module: if necessary, voltage spikes beyond VCC absolute maximum ratings must be restricted to values within the specified limits by using appropriate protection. When designing the power supply for the application, pay specific attention to power losses and transients.
LISA-U1/LISA-H1 series - System Integration Manual Main Supply Available? No, portable device Battery Li-Ion 3.7 V Yes, always available Main Supply Voltage >5 V? No, less than 5 V Linear LDO Regulator Yes, greater than 5 V Switching Step-Down Regulator Figure 6: VCC supply concept selection The switching step-down regulator is the typical choice when the available primary supply source has a nominal voltage much higher (e.g.
LISA-U1/LISA-H1 series - System Integration Manual output to VCC supply pins can mitigate the ripple on VCC, but adds extra voltage drop due to resistive losses on series inductors PWM mode operation: select preferably regulators with Pulse Width Modulation (PWM) mode. While in active mode Pulse Frequency Modulation (PFM) mode and PFM/PWM mode transitions must be avoided to reduce the noise on the VCC voltage profile.
LISA-U1/LISA-H1 series - System Integration Manual Reference Description Part Number - Manufacturer C1 47 µF Capacitor Aluminum 0810 50 V MAL215371479E3 - Vishay C2 10 µF Capacitor Ceramic X7R 5750 15% 50 V C5750X7R1H106MB - TDK C3 C4 10 nF Capacitor Ceramic X7R 0402 10% 16 V 680 pF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 - Murata GRM155R71H681KA01 - Murata C5 C6 22 pF Capacitor Ceramic COG 0402 5% 25 V 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM1555C1H220JZ01 - Murata GRM155R
LISA-U1/LISA-H1 series - System Integration Manual LISA-U1/LISA-H1 series 5V 2 IN OUT VCC VCC 63 VCC 61 4 62 U1 C1 R1 R2 1 SHDN ADJ C2 5 GND 3 GND R3 Figure 8: Suggested schematic design for the VCC voltage supply application circuit using an LDO linear regulator Reference Description Part Number - Manufacturer C1 10 µF Capacitor Ceramic X5R 0603 20% 6.3 V GRM188R60J106ME47 - Murata C2 R1 10 µF Capacitor Ceramic X5R 0603 20% 6.3 V 47 kΩ Resistor 0402 5% 0.
LISA-U1/LISA-H1 series - System Integration Manual Additional hints for the VCC supply application circuits To reduce voltage drops, use a low impedance power source. The resistance of the power supply lines (connected to the VCC and GND pins of the module) on the application board and battery pack should also be considered and minimized: cabling and routing must be as short as possible in order to minimize power losses. Three pins are allocated for VCC supply.
LISA-U1/LISA-H1 series - System Integration Manual 1.5.3 Current consumption profiles During operation, the current drawn by the LISA-U1/LISA-H1 series modules through the VCC pins can vary by several orders of magnitude. This ranges from the high peak of current consumption during GSM transmitting bursts at maximum power level in 2G connected mode, to continuous high current drawn in UMTS connected mode, to the low current consumption during power saving in idle mode. 1.5.3.
LISA-U1/LISA-H1 series - System Integration Manual Figure 11 reports the current consumption profiles in GPRS mode with 4 slots used to transmit. Current [A] 2.5 2.0 1400 mA 1.5 Peak current depends on TX power 1.0 0.5 ~170mA 0.0 RX slot 200mA ~170mA ~40mA unused slot TX slot TX slot TX slot TX slot MON slot unused slot RX slot unused slot GSM frame 4.615 ms (1 frame = 8 slots) TX slot TX slot TX slot TX slot MON slot unused slot Time [ms] GSM frame 4.
LISA-U1/LISA-H1 series - System Integration Manual Current [mA] 670 mA 700 600 500 Depends on TX power 400 300 170 mA 200 100 0 1 slot 666 µs Time [ms] 3G frame 10 ms (1 frame = 15 slots) Figure 12: VCC current consumption profile versus time during a UMTS connection, with VCC=3.
LISA-U1/LISA-H1 series - System Integration Manual Current [mA] ~150 mA 150 100 50 0 500-700 µA Time [s] Current [mA] IDLE MODE ACTIVE MODE 2G case: 0.44-2.09 s 3G case: 0.61-5.
LISA-U1/LISA-H1 series - System Integration Manual Current [mA] ~150 mA 150 100 50 20-22 mA 0 Time [s] Paging period Current [mA] 2G case: 0.47-2.12 s 3G case: 0.64-5.
LISA-U1/LISA-H1 series - System Integration Manual normally used to set the wake-up interval during idle-mode periods between network paging, but is able to provide programmable alarm functions by means of the internal 32.768 kHz clock. The RTC can be supplied from an external back-up battery through the V_BCKP, when the main voltage supply is not provided to the module through VCC. This lets the time reference (date and time) run even when the main supply is not provided to the module.
LISA-U1/LISA-H1 series - System Integration Manual Reference Description Part Number - Manufacturer C1 R2 100 µF Tantalum Capacitor 4.7 kΩ Resistor 0402 5% 0.1 W GRM43SR60J107M - Murata RC0402JR-074K7L - Yageo Phycomp C2 70 mF Capacitor XH414H-IV01E - Seiko Instruments Table 8: Example of components for V_BCKP buffering If longer buffering time is required to allow the time reference to run during a disconnection of the VCC supply, then an external battery can be connected to V_BCKP pin.
LISA-U1/LISA-H1 series - System Integration Manual V_INT can only be used as an output; don’t connect any external regulator on V_INT. If not used, this pin should be left unconnected. The V_INT digital interfaces supply output is mainly used to: Pull-up DDC (I C) interface signals (see section 1.10 for more details) Pull-up SIM detection signal (see section 1.
LISA-U1/LISA-H1 series - System Integration Manual The PWR_ON pin has high input impedance and is weakly pulled to the high level on the module. Avoid keeping it floating in a noisy environment. To hold the high logic level stable, the PWR_ON pin must be connected to a pull-up resistor (e.g. 100 kΩ) biased by the V_BCKP supply pin of the module. Once the module has turned on, moving the PWR_ON pin has no effect.
LISA-U1/LISA-H1 series - System Integration Manual The RESET_N input pin can also be used to perform an “external” or “hardware” reset of the module, as described in the section 1.6.3. The electrical characteristics of RESET_N are different from the other digital I/O interfaces. The detailed electrical characteristics are described in the LISA-U1/LISA-H1 series Data Sheet [1]. RESET_N is pulled high to V_BCKP by an integrated pull-up resistor also when the module is in power off mode.
LISA-U1/LISA-H1 series - System Integration Manual Start-up PWR_ON event can be set high Start of interface configuration All interfaces are configured VCC V_BCKP PWR_ON * V_INT Internal Reset OFF System State BB Pads State Tristate / Floating 0 ms ON Internal Reset Internal Reset → Operational Operational ~5 ms ~6 ms ~35 ms ~1000 ms Figure 17: LISA power on sequence description (* - the PWR_ON signal state is not relevant during this phase) The Internal Reset signal is not available on a modu
LISA-U1/LISA-H1 series - System Integration Manual 1.6.2 Module power off The correct way to switch off LISA-U1/LISA-H1 series modules is by means of +CPWROFF AT command (more details in u-blox AT Commands Manual [2]): in this way the current parameter settings are saved in the module’s non-volatile memory and a proper network detach is performed.
LISA-U1/LISA-H1 series - System Integration Manual 1.6.3 Module reset The module reset can be performed in one of 2 ways: Forcing a low level on the RESET_N pin, causing an “external” or “hardware” reset Via AT command, causing an “internal” or “software” reset LISA-U1/LISA-H1 series modules can be reset using the RESET_N pin: when the RESET_N pin is forced low for at least 50 ms, an “external” or “hardware” reset is performed.
LISA-U1/LISA-H1 series - System Integration Manual LISA-U1/LISA-H1 series V_BCKP 2 Reset push button Rint FB1 RESET_N 22 ESD C1 Application Processor LISA-U1/LISA-H1 series V_BCKP 2 Open Drain Output Rint FB2 22 RESET_N C2 Figure 19: RESET_N application circuits using a push button and an open drain output of an application processor Reference Description Remarks ESD Varistor for ESD protection.
LISA-U1/LISA-H1 series - System Integration Manual The recommendations of the antenna producer for correct installation and deployment (PCB layout and matching circuitry) must be followed. If an external antenna is used, the PCB-to-RF-cable transition must be implemented using either a suitable 50 connector, or an RF-signal solder pad (including GND) that is optimized for 50 characteristic impedance.
LISA-U1/LISA-H1 series - System Integration Manual features, that are not supported by the (U)SIM card interface of the LISA-U1/LISA-H1 series modules, are provided by the SIM card (contacts C4 = AUX1 and C8 = AUX2 for USB interfaces and other uses). A SIM card holder can have 6 or 8 positions if a mechanical card presence detector is not provided, or it can have 6+2 or 8+2 positions if two additional pins for the mechanical card presence detection are provided.
LISA-U1/LISA-H1 series - System Integration Manual Limit capacitance and series resistance on each SIM signal to match the requirements for the SIM interface (27.7 ns is the maximum allowed rise time on the SIM_CLK line, 1.0 µs is the maximum allowed rise time on the SIM_IO and SIM_RST lines): always route the connections to keep them as short as possible 1.8.
LISA-U1/LISA-H1 series - System Integration Manual 1.9 Serial communication LISA-U1/LISA-H1 series modules provide AT command interface, Packet-Switched / Circuit-Switched Data communication on the following serial communication interfaces: One asynchronous serial interface (UART) that provides complete RS-232 functionality conforming to ITU-T V.24 Recommendation [3], with limited data rate.
LISA-U1/LISA-H1 series - System Integration Manual Interface AT Settings Comments UART interface Enabled Multiplexing mode can be enabled by AT+CMUX command providing following channels: Channel 0: control channel Channel 1 – 5: AT commands /data connection Channel 6: GPS tunneling AT+IPR=115200 AT+ICF=0,0 Baud rate: 115200 b/s Frame format: 8 bits, no parity, 1 stop bit AT&K3 HW flow control enabled AT&S1 AT&D1 DSR line set ON in data mode and set OFF in command mode Upon an ON-to-OFF tra
LISA-U1/LISA-H1 series - System Integration Manual The signal names of the LISA-U1/LISA-H1 series modules UART interface conform to the ITU-T V.24 Recommendation [3]. UART interfaces include the following lines: Name Description Remarks DSR Data set ready RI Ring Indicator DCD Data carrier detect Module output Circuit 107 (Data set ready) in ITU-T V.24 Module output Circuit 125 (Calling indicator) in ITU-T V.24 Module output Circuit 109 (Data channel received line signal detector) in ITU-T V.
LISA-U1/LISA-H1 series - System Integration Manual 57600 b/s 115200 b/s 230400 b/s 460800 b/s The default baud rate is 115200 b/s. Autobauding is not supported.
LISA-U1/LISA-H1 series - System Integration Manual TxD signal behavior The module data input line (TxD) is set by default to OFF state (high level) at UART initialization. The TxD line is then held by the module in the OFF state if the line is not activated by the DTE: an active pull-up is enabled inside the module on the TxD input. CTS signal behavior The module hardware flow control output (CTS line) is set to the ON state (low level) at UART initialization.
LISA-U1/LISA-H1 series - System Integration Manual DSR signal behavior If AT&S0 is set, the DSR module output line is set by default to ON state (low level) at UART initialization and is then always held in the ON state. If AT&S1 is set, the DSR module output line is set by default to OFF state (high level) at UART initialization. The DSR line is then set to the OFF state when the module is in command mode and is set to the ON state when the module is in data mode.
LISA-U1/LISA-H1 series - System Integration Manual 1s RI OFF RI ON 0 5 10 15 time [s] Call incomes Figure 22: RI behavior during an incoming call The RI line can notify an SMS arrival. When the SMS arrives, the RI line switches from OFF to ON for 1 s (see Figure 23), if the feature is enabled by the proper AT command (please refer to u-blox AT Commands Manual [2], AT+CNMI command).
LISA-U1/LISA-H1 series - System Integration Manual AT+UPSV HW flow control RTS line Communication during idle mode and wake up 0 Enabled (AT&K3) ON Data sent by the DTE will be correctly received by the module. 0 Enabled (AT&K3) OFF 0 Disabled (AT&K0) ON Data sent by the module will be buffered by the module and will be correctly received by the DTE when it will be ready to receive data (i.e. RTS line will be ON). Data sent by the DTE will be correctly received by the module.
LISA-U1/LISA-H1 series - System Integration Manual Every subsequent character received during the active-mode, resets and restarts the timer; hence the activemode duration can be extended indefinitely. The behavior of hardware flow-control output (CTS line) during normal module operations with power-saving and HW flow control enabled (cyclic idle-mode and active-mode) is illustrated in Figure 24. Data input CTS OFF CTS ON time [s] max ~2.1 s UART disabled min ~11 ms UART enabled ~9.
LISA-U1/LISA-H1 series - System Integration Manual recognized, and the recognition of the subsequent characters is guaranteed only after the complete wake-up (i.e. after 20 ms).
LISA-U1/LISA-H1 series - System Integration Manual The “wake-up via data reception” feature can’t be disabled. The “wake-up via data reception” feature can be used in both +UPSV=1 and +UPSV=2 case (when RTS line is set to OFF). In command mode, if HW flow control is not implemented by the DTE, the DTE must always send a dummy “AT” to the module before each command line: the first character will not be ignored if the module is in active-mode (i.e.
LISA-U1/LISA-H1 series - System Integration Manual Providing the TxD, RxD, RTS and CTS lines only (not using the complete V.
LISA-U1/LISA-H1 series - System Integration Manual Providing the TxD and RxD lines only (not using the complete V24 link) If the functionality of the CTS, RTS, DSR, DCD, RI and DTR lines is not required in the application, or the lines are not available, the application circuit described in Figure 29 must be implemented: Connect the module CTS output line to the module RTS input line, since the module requires RTS active (low electrical level) if HW flow-control is enabled (AT&K3, that is the default se
LISA-U1/LISA-H1 series - System Integration Manual firmware upgrade over USB and for debug purpose. In both cases, provide as well access to RESET_N pin, or to the PWR_ON pin, or enable the DC supply connected to the VCC pin to start the module firmware upgrade (see Firmware Update Application Note [14]).
LISA-U1/LISA-H1 series - System Integration Manual If the USB interface of LISA-U1/LISA-H1 series modules is connected to the host before the module switch-on, or if the module is reset with the USB interface connected to the host, the VID and PID are automatically updated runtime, after the USB detection.
LISA-U1/LISA-H1 series - System Integration Manual Reference Description Part Number - Manufacturer D1, D2, D3 C2 Very Low Capacitance ESD Protection 100 nF Capacitor Ceramic X7R 0402 10% 16 V PESD0402-140 - Tyco Electronics GRM155R61A104KA01 - Murata Table 21: Component for USB application circuit If the USB interface is not connected to the application processor, it is highly recommended to provide direct access to the VUSB_DET, USB_D+, USB_D- lines for execution of firmware upgrade over USB and f
LISA-U1/LISA-H1 series - System Integration Manual Name Description Remarks SPI_MISO SPI Data Line. Master Input, Slave Output Module Output. Idle high. Shift data is on rising clock edge, latch on falling edge. MSB is shifted first. SPI_MOSI SPI Data Line. Master Output, Slave Input SPI_SCLK SPI Serial Clock. Master Output, Slave Input SPI_MRDY SPI Master Ready to transfer data control line. Master Output, Slave Input SPI_SRDY SPI Slave Ready to transfer data control line.
LISA-U1/LISA-H1 series - System Integration Manual SPI_MRDY SPI_SRDY Header DATA_EXCHANGE Data SPI_SCLK SPI_MOSI SPI_MISO Figure 31: IPC Data Flow: SPI_MRDY and SPI_SRDY line usage combined with the SPI protocol For the correct implementation of the SPI protocol, the frame size is known by both sides before a packet transfer of each packet. The frame is composed by a header with fixed size (always 4 bytes) and a payload with variable length (must be a multiple of 4 bytes).
LISA-U1/LISA-H1 series - System Integration Manual 4. If the data have been exchanged, the slave deactivates SPI_SRDY to process the received information. The master does not need to de-assert SPI_MRDY as it controls the SPI_SCLK 5. After the preparation, the slave activates again SPI_SRDY and wait for SPI_SCLK activation. When the clock is active, all the data are transferred without intervention.
LISA-U1/LISA-H1 series - System Integration Manual 4. When the master is ready to send, it will signalize this by activating SPI_MRDY. This is optional, when SPI_MRDY is low before 5. The slave indicates immediately after a transfer termination that it wants to start transmission again. In this case the slave will raise SPI_SRDY again.
LISA-U1/LISA-H1 series - System Integration Manual physical link (UART or SPI). Each session consists of a stream of bytes transferring various kinds of data such as SMS, CBS, GPRS, GPS, AT commands in general. This permits, for example, SMS to be transferred to the DTE when a data connection is in progress.
LISA-U1/LISA-H1 series - System Integration Manual 1.10.2 DDC application circuit 2 The SDA and SCL lines can be used only to connect the LISA module to a u-blox GPS module: LISA DDC (I C) interface is enabled by the +UGPS AT command (for more details refer to u-blox AT Commands Manual [2]).
LISA-U1/LISA-H1 series - System Integration Manual u-blox 3.
LISA-U1/LISA-H1 series - System Integration Manual Each uplink path mode defines the physical input (i.e. the analog or the digital audio input) and the set of parameters to process the uplink audio signal (uplink gains, uplink digital filters, echo canceller parameters). For example the “Headset microphone” uplink path uses the differential analog audio input with the default parameters for the headset profile. Each downlink path mode defines the physical output (i.e.
LISA-U1/LISA-H1 series - System Integration Manual Table 26 lists the signals related to analog audio functions. Name Description Remarks MIC_P Differential analog audio input (Positive) MIC_N Differential analog audio input (Negative) SPK_P Differential analog audio output (Positive) SPK_N Differential analog audio output (Negative) Shared for all uplink analog path modes: handset, headset, hands-free mode. Internal DC blocking capacitor.
LISA-U1/LISA-H1 series - System Integration Manual Low Noise LDO Regulator 2V5 OUT R1 R2 R3 C5 IN GND C6 VMAIN C7 U1 LISA-U120/U130 AUDIO HEADSET CONNECTOR 1 L1 MIC_N 39 6 4 SPK_P 53 3 L2 MIC_P 40 5 2 SPK_N 54 R4 C1 C2 C3 J1 C4 D1 Sense lines connected to GND in one star point D2 Figure 38: Headset mode application circuit Reference Description Part Number - Manufacturer C1, C2, C3, C4 C5, C6, C7 27 pF Capacitor Ceramic COG 0402 5% 25 V 10 µF Capacitor Ceramic X5R 0603 2
LISA-U1/LISA-H1 series - System Integration Manual Low Noise LDO Regulator 2V5 OUT R1 R2 R3 C5 VMAIN IN GND C6 C7 AUDIO HANDSET CONNECTOR U1 LISA-U120/U130 1 L1 MIC_P 40 2 SPK_P 53 3 SPK_N 54 4 L2 MIC_N 39 R4 C1 C2 C3 J1 C4 D1 D2 Sense lines connected to GND in one star point Figure 39: Handset mode application circuit Reference Description Part Number - Manufacturer C1, C2, C3, C4 C5, C6, C7 27 pF Capacitor Ceramic COG 0402 5% 25 V 10 µF Capacitor Ceramic X5R 0603 20%
LISA-U1/LISA-H1 series - System Integration Manual Mount an 82 nH series inductor (e.g. Murata LQG15HS82NJ02) on each microphone line and a 27 pF bypass capacitor (e.g. Murata GRM1555C1H270J) on all audio lines to minimize RF coupling and TDMA noise. The physical width of the audio outputs lines on the application board must be wide enough to minimize series resistance.
LISA-U1/LISA-H1 series - System Integration Manual 1.11.1.6 Connection to an external analog audio device The differential analog audio input / output can be used to connect the module to an external analog audio device. Audio devices with a differential analog input / output are preferable, as they are more immune to external disturbances.
LISA-U1/LISA-H1 series - System Integration Manual Audio Device LISA-U120/U130 C1 SPK_P 53 SPK_N Positive Analog IN C2 54 Negative Analog IN GND Reference MIC_P 40 Positive Analog OUT MIC_N 39 Negative Analog OUT GND Reference Audio Device LISA-U120/U130 SPK_P 53 SPK_N 54 C3 R1 C4 Analog IN R2 GND Reference R3 MIC_P 40 MIC_N 39 Analog OUT R4 GND Reference Figure 41: Application circuits to connect the module to audio devices with proper differential or single-ended input/output
LISA-U1/LISA-H1 series - System Integration Manual 2 If the I S digital audio pins are not used, they can be left unconnected on the application board.
LISA-U1/LISA-H1 series - System Integration Manual I2S_WA signal always runs at 8 kHz and synchronizes 2 channels (timeslots on WA high, WA low) I2S_TX data are composed of 16 bit words, dual mono (the words are written on both channels). Data are in 2’s complement notation. MSB is transmitted first. The bits are written on I2S_CLK rising or falling edge (configurable) I2S_RX data are read as 16 bit words, mono (words are read only on the timeslot with WA high).
LISA-U1/LISA-H1 series - System Integration Manual Sample-based Voice-band Processing (single sample processed at 8 kHz, every 125 µs) Frame-based Voice-band Processing (frames of 160 samples are processed every 20 ms) MIDI synthesizer running at 47.6 kHz These three blocks are connected by buffers (circular buffer and voiceband sample buffer) and sample rate converters (for 8 to 47.
LISA-U1/LISA-H1 series - System Integration Manual 1.12 General Purpose Input/Output (GPIO) The LISA-U1/LISA-H1 series modules provide 5 pins (GPIO1, GPIO2, GPIO3, GPIO4 and GPIO5) which can be configured as general purpose input or output, or can be configured to provide special functions via u-blox AT commands (for further details refer to u-blox AT Commands Manual [2], +UGPIOC, +UGPIOR, +UGPIOW, +UGPS, +UGPRF).
LISA-U1/LISA-H1 series - System Integration Manual Name Description Remarks GPIO1 GPIO GPIO2 GPIO GPIO3 GPIO GPIO4 GPIO GPIO5 GPIO By default, any function is disabled and the internal active pull-down is enabled.
LISA-U1/LISA-H1 series - System Integration Manual LISA-U1/LISA-H1 series u-blox 1.8 V GPS receiver LDO Regulator 3V8 IN GPIO2 21 GPS Supply Enable GPIO4 23 24 VCC SHDN GND R1 GPIO3 1V8 OUT C1 U1 GPS Data Ready TxD1 GPS Aiding Synch EXTINT0 SIM card holder V_INT R2 4 GPIO5 51 SW1 SIM Detection SW2 J1 R3 3V8 D1 R6 DL1 GPIO1 20 R4 Network Indicator T1 R5 Figure 43: GPIO application circuit Reference Description Part Number - Manufacturer R1 4.7 kΩ Resistor 0402 5% 0.
LISA-U1/LISA-H1 series - System Integration Manual 1.13 Reserved pins (RSVD) LISA-U1/LISA-H1 series modules have some pins reserved for future use. All the RSVD pins, except pin number 5, can be left unconnected on the application board. The application circuit is illustrated in Figure 44. Pin 5 (RSVD) must be connected to GND.
LISA-U1/LISA-H1 series - System Integration Manual 1.14 Schematic for LISA-U1/LISA-H1 series module integration Figure 45 is an example of a schematic diagram where a LISA-U1/LISA-H1 series module is integrated into an application board, using all the interfaces of the module. LISA-U1/LISA-H1 series 3V8 + 330µF 100nF 10nF 39pF 61 VCC 62 VCC 63 VCC 10pF GND 2 RTC back-up 100µF 100kΩ 19 Open Drain Output Antenna 68 3V8 LDO Regulator IN GPIO2 21 u-blox 1.
LISA-U1/LISA-H1 series - System Integration Manual IMPORTANT: Manufacturers of portable applications incorporating the LISA-U1/LISA-H1 series modules are required to have their final product certified and apply for their own FCC Grant and Industry Canada Certificate related to the specific portable device. This is mandatory to meet the SAR requirements for portable devices.
LISA-U1/LISA-H1 series - System Integration Manual 2 Design-In 2.1 Design-in checklist This section provides a design-in checklist. 2.1.1 Schematic checklist The following are the most important points for a simple schematic check: DC supply must provide a nominal voltage at VCC pin above the minimum operating range limit. VCC supply should be clean, with very low ripple/noise: suggested passive filtering parts can be inserted.
LISA-U1/LISA-H1 series - System Integration Manual The high-power audio outputs lines on the application board must be wide enough to minimize series resistance. Ensure proper grounding. Consider “No-routing” areas for the Data Module footprint. Optimize placement for minimum length of RF line and closer path from DC source for VCC. Design USB_D+ / USB_D- connection as 90 differential pair. Keep routing short and minimize parasitic capacitance on the SPI lines to preserve signal integrity.
LISA-U1/LISA-H1 series - System Integration Manual 2.2 Design Guidelines for Layout The following design guidelines must be met for optimal integration of LISA-U1/LISA-H1 series modules on the final application board. 2.2.
LISA-U1/LISA-H1 series - System Integration Manual Rank Layout Remarks 1st RF Antenna In/out ANT Very Important 2nd Main DC Supply VCC Very Important 3rd USB Signals USB_D+ USB_D- Very Important Design for 50 characteristic impedance. See section 2.2.1.1 VCC line should be wide and short. Route away from sensitive analog signals. See section 2.2.1.2 Route USB_D+ and USB_D- as differential lines: design for 90 differential impedance. See section 2.2.1.
LISA-U1/LISA-H1 series - System Integration Manual Buried striplines exhibit better shielding to external and internally generated interferences. They are therefore preferred for sensitive application.
LISA-U1/LISA-H1 series - System Integration Manual Additional guidelines for products marked with the FCC logo - United States only LISA-U1/LISA-H1 series modules can only be used with a host antenna circuit trace layout according to below guidelines and a host system designer must follow the guidelines to keep the original Grant of LISA-U1/LISA-H1 series modules.
LISA-U1/LISA-H1 series - System Integration Manual Figure 49: Layer 2 (inner layer) of u-blox approved interface board for LISA-U1/LISA-H1 series modules The thickness of the dielectric (FR4 Laminate 7628) from Layer 2 (inner layer) to Layer 3 (inner layer) is 0.76 mm. The Layer 3 (inner layer, described in Figure 50) is designed for signals routing and GND plane. Layer 3 thickness is 0.035 mm.
LISA-U1/LISA-H1 series - System Integration Manual Figure 51: Layer 4 (bottom layer) of u-blox approved interface board for LISA-U1/LISA-H1 series modules The antenna must not exceed 3dBi gain to preserve the original u-blox FCC ID. The antenna must be installed and operated with a minimum distance of 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. Under the requirements of FCC Section 15.
LISA-U1/LISA-H1 series - System Integration Manual A tank capacitor with low ESR is often used to smooth current spikes. This is most effective when placed as close as possible to VCC. From main DC source, first connect the capacitor and then VCC. If the main DC source is a switching DC-DC converter, place the large capacitor close to the DC-DC output and minimize the VCC track length. Otherwise consider using separate capacitors for DC-DC converter and LISA-U1/LISAH1 series module tank capacitor.
LISA-U1/LISA-H1 series - System Integration Manual Avoid coupling of any noisy signals to microphone input lines It is strongly recommended to route MIC signals away from battery and RF antenna lines. Try to skip fast switching digital lines as well Keep ground separation from other noisy signals. Use an intermediate GND layer or vias wall for coplanar signals MIC_P and MIC_N are sensed differentially within the module.
LISA-U1/LISA-H1 series - System Integration Manual Power On (PWR_ON): is the digital input to switch-on the LISA-U1/LISA-H1 series modules. Ensure that the voltage level is well defined during operation and no transient noise is coupled on this line, otherwise the module might detect a spurious power on request 2.2.1.
LISA-U1/LISA-H1 series - System Integration Manual 2.2.2 Footprint and paste mask The following figure describes the footprint and provides recommendations for the paste mask for LISA-U1/LISAH1 series modules. These are recommendations only and not specifications. Note that the copper and solder masks have the same size and position. 5.7 mm [224.4 mil] 0.9 mm [35.4 mil] 0.8 mm [31.5 mil] 2.3 mm [90.6 mil] 0.6 mm [23.6 mil] 33.2 mm [1307.1 mil] 1.1 mm [43.3 mil] 2.3 mm [90.6 mil] 0.8 mm [31.
LISA-U1/LISA-H1 series - System Integration Manual 11.85 mm 5.3 mm 1.4 mm PIN 1 Exposed GND on LISA module bottom layer Signals keep-out area on application board 33.2 mm Bottom side (through module view) 1.0 mm 22.40 mm Figure 53: Signals keep-out area on the top layer of the application board, below LISA-U1/LISA-H1 series modules 2.2.3 Placement Optimize placement for minimum length of RF line and closer path from DC source for VCC.
LISA-U1/LISA-H1 series - System Integration Manual 2.3 Thermal aspects The operating temperature range is specified in the LISA-U1/LISA-H1 series Data Sheet [1]. The most critical condition concerning thermal performance is the uplink transmission at maximum power (data upload or voice call in connected mode), when the baseband processor runs at full speed, radio circuits are all active and the RF power amplifier is driven to higher output RF power.
LISA-U1/LISA-H1 series - System Integration Manual 2.4 Antenna guidelines Antenna characteristics are essential for good functionality of the module. Antenna radiating performance has direct impact on the reliability of connections over the Air Interface. A bad termination of ANT can result in poor performance of the module.
LISA-U1/LISA-H1 series - System Integration Manual Do not place antenna in close vicinity to end user since the emitted radiation in human tissue is limited by S.A.R.
LISA-U1/LISA-H1 series - System Integration Manual Figure 55: |S11| sample measurement of a wideband antenna 2.4.2 Antenna radiation An indication of the antenna’s radiated power can be approximated by measuring the |S21| from a target antenna to the measurement antenna, using a network analyzer with a wideband antenna. Measurements should be done at a fixed distance and orientation, and results compared to measurements performed on a known good antenna.
LISA-U1/LISA-H1 series - System Integration Manual Figure 57: |S11| and |S21| comparison between a 900 MHz tuned half wavelength dipole (green/purple) and a wideband commercial antenna (yellow/cyan) Instead if |S21| values for the tuned dipole are much better than the antenna under evaluation (like for marker 1/2 area of Figure 57, where dipole is 5 dB better), then it can be argued that the radiation of the target antenna (the wideband dipole in this case) is considerably less.
LISA-U1/LISA-H1 series - System Integration Manual Radiating Element DC Blocking Front-End RF Module Coaxial Antenna Cable ANT DC Blocking Zo=50 Ω RF Choke RF Choke Resistor for Diagnostic ADC Current Source Diagnostic Circuit LISA-U1/LISA-H1 series Application Board Antenna Assembly Figure 58: Antenna detection circuit and antenna with diagnostic resistor Examples of components for the antenna detection diagnostic circuit are reported in the following table: Description Part Number - Manufac
LISA-U1/LISA-H1 series - System Integration Manual Reported values close to the used diagnostic resistor nominal value (i.e.
LISA-U1/LISA-H1 series - System Integration Manual 2.5 ESD immunity test precautions The immunity to the EMS phenomenon Electrostatic Discharge of the device (i.e. the application board where the LISA-U1/LISA-H1 series module is mounted) must be certified complying the testing requirements standard [10] and the requirements for radio and digital cellular radio telecommunications system equipments standards [11] [12].
LISA-U1/LISA-H1 series - System Integration Manual It is recommended to keep the connection line to RESET_N as short as possible LISA-U1/LISA-H1 series 2 Reset push button V_BCKP Rint FB1 22 ESD RESET_N C1 Application Processor LISA-U1/LISA-H1 series 2 Open Drain Output V_BCKP Rint FB2 22 RESET_N C2 Figure 59: RESET_N application circuits for ESD immunity test Reference Description Remarks ESD C1, C2 Varistor for ESD protection.
LISA-U1/LISA-H1 series - System Integration Manual If the device implements an external antenna and the antenna or its connecting cable are not provided with completely insulating enclosure to avoid air discharge up to +8 kV / -8 kV to the whole antenna and cable surfaces, precautions to ESD immunity test should be implemented on the application board A higher protection level is required at the ANT port if the line is externally accessible on the application board. 2.5.
LISA-U1/LISA-H1 series - System Integration Manual 3 Handling and soldering No natural rubbers, no hygroscopic materials or materials containing asbestos are employed. 3.1 Packaging, shipping, storage and moisture preconditioning For information pertaining to reels and tapes, Moisture Sensitivity levels (MSD), shipment and storage information, as well as drying for preconditioning see the LISA-U1/LISA-H1 series Data Sheet [1].
LISA-U1/LISA-H1 series - System Integration Manual End Temperature: 150 - 200°C If the temperature is too low, non-melting tends to be caused in areas containing large heat capacity. Heating/ reflow phase The temperature rises above the liquidus temperature of 217°C. Avoid a sudden rise in temperature as the slump of the paste could become worse.
LISA-U1/LISA-H1 series - System Integration Manual 3.2.3 Optical inspection After soldering the LISA-U1/LISA-H1 series modules, inspect the modules optically to verify that he module is properly aligned and centered. 3.2.4 Cleaning Cleaning the soldered modules is not recommended. Residues underneath the modules cannot be easily removed with a washing process. Cleaning with water will lead to capillary effects where water is absorbed in the gap between the baseboard and the module.
LISA-U1/LISA-H1 series - System Integration Manual 3.2.10 Casting If casting is required, use viscose or another type of silicon pottant. The OEM is strongly advised to qualify such processes in combination with the LISA-U1/LISA-H1 series modules before implementing this in the production. Casting will void the warranty. 3.2.
LISA-U1/LISA-H1 series - System Integration Manual 4 Product Testing 4.1 u-blox in-series production test u-blox focuses on high quality for its products. All units produced are fully tested. Defective units are analyzed in detail to improve the production quality. This is achieved with automatic test equipment, which delivers a detailed test report for each unit. The following measurements are done: Digital self-test (Software Download, verification of FLASH firmware, etc.
LISA-U1/LISA-H1 series - System Integration Manual Appendix A Extra Features A.1 TCP/IP Via the AT commands it’s possible to access the TCP/IP functionalities over the GPRS connection. For more details about AT commands see the u-blox AT Commands Manual [2]. A.1.1 Multiple IP addresses and sockets Using LISA’s embedded TCP/IP or UDP/IP stack, only 1 IP instance (address) is supported. The IP instance supports up to 16 sockets.
LISA-U1/LISA-H1 series - System Integration Manual Figure 62: In-Band modem diagram flow In-band modem allows the fast and reliable transmission of vehicle Minimum Set of Data (MSD - 140 bytes) and the establishment of a voice emergency call using the same physical channel (voice channel) without any modifications of the existing cellular network architecture. In-Band modem is a mandatory feature to meet the eCall requirements and to develop in vehicle devices fully supporting eCall.
LISA-U1/LISA-H1 series - System Integration Manual B Glossary ADC Analog to Digital Converter AP Application Processor AT AT Command Interpreter Software Subsystem, or attention CBCH Cell Broadcast Channel CS Coding Scheme CSD Circuit Switched Data CTS Clear To Send DC Direct Current DCD Data Carrier Detect DCE Data Communication Equipment DCS Digital Cellular System DDC Display Data Channel DSP Digital Signal Processing DSR Data Set Ready DTE Data Terminal Equipment DTM Dual
LISA-U1/LISA-H1 series - System Integration Manual MCS Modulation Coding Scheme NOM Network Operating Mode PA Power Amplifier PBCCH Packet Broadcast Control Channel PCM Pulse Code Modulation PCS Personal Communications Service PFM Pulse Frequency Modulation PMU Power Management Unit RF Radio Frequency RI Ring Indicator RTC Real Time Clock RTS Request To Send RXD RX Data SAW Surface Acoustic Wave SIM Subscriber Identification Module SMS Short Message Service SMTP Simple Mail
LISA-U1/LISA-H1 series - System Integration Manual Related documents [1] u-blox LISA-U1/LISA-H1 series Data Sheet, Docu No 3G.G1-HW-10001 [2] [3] u-blox AT Commands Manual, Docu No WLS-SW-11000 ITU-T Recommendation V.24, 02-2000. List of definitions for interchange circuits between data terminal equipment (DTE) and data circuit-terminating equipment (DCE). http://www.itu.int/rec/T-REC-V.24-200002-I/en 3GPP TS 27.007 - AT command set for User Equipment (UE) (Release 1999) [4] [5] [6] 3GPP TS 27.
LISA-U1/LISA-H1 series - System Integration Manual 3G.
LISA-U1/LISA-H1 series - System Integration Manual Contact For complete contact information visit us at www.u-blox.com u-blox Offices North, Central and South America u-blox America, Inc. Phone: +1 (703) 483 3180 E-mail: info_us@u-blox.com Regional Office West Coast: Phone: +1 (703) 483 3184 E-mail: info_us@u-blox.com Headquarters Europe, Middle East, Africa u-blox AG Phone: +41 44 722 74 44 E-mail: info@u-blox.com Support: support @u-blox.
