Datasheet

TOSHIBA
TOSHIBA CORPORATION
1/3
CMOS DIGITAL INTEGRATED CIRCUIT TC4S30F
The information contained here is subject to change without notice.
The information contained herein is presented only as guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties
which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. These TOSHIBA products are intended for usage in general electronic
equipments (office equipment, communication equipment, measuring equipment, domestic electrification, etc.) Please make sure that you consult with us before you use these TOSHIBA products in equip-
ments which require high quality and/or reliability, and in equipments which could have major impact to the welfare of human life (atomic energy control, spaceship, traffic signal, combustion control, all types
of safety devices, etc.). TOSHIBA cannot accept liability to any damage which may occur in case these TOSHIBA products were used in the mentioned equipments without prior consultation with TOSHIBA.
2 Input NAND Gate
TC4S30F contains one circuit of exclusive OR gate.
Since the buffers of two stage inverters are provided for all the outputs, the
input / output voltage characteristic has been improved and the noise immunity
has been also improved. And increase of transmission time due to load capac-
ity increase is kept minimum.
Wide variety of applications is offered, such as digital comparators and
parity circuits.
Maximum Ratings
(Ta = 25
°
C)
Logic Diagram
Pin Configuration (Top View)
Characteristics Symbol Condition Unit
DC Supply Voltage V
DD
V
SS
- 0.5 ~ V
SS
+ 20 V
Input Voltage V
IN
V
SS
- 0.5 ~ V
DD
+ 0.5 V
Output Voltage V
OUT
V
SS
- 0.5 ~ V
DD
+ 0.5 V
DC Input Current I
IN
±
10 mA
Power Dissipation P
D
200 mW
Operating Temperature Range T
opr
-40~85
°
C
Storage Temperature Range T
stg
-65~150
°
C
Lead Temperature (10s) T
L
260
°
C
Marking
Truth Table
Input Output
ABX
LLL
LHH
HLH
HHL

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