Cinterion® PLPS9 Hardware Interface Description Version: DocId: 00.052a PLPS9_HID_v00.052a GEMALTO.
Cinterion® PLPS9 Hardware Interface Description Page 2 of 125 2 Document Name: Cinterion® PLPS9 Hardware Interface Description Version: 00.052a Date: 2019-07-25 DocId: PLPS9_HID_v00.052a Status: Confidential / Preliminary GENERAL NOTE THE USE OF THE PRODUCT INCLUDING THE SOFTWARE AND DOCUMENTATION (THE "PRODUCT") IS SUBJECT TO THE RELEASE NOTE PROVIDED TOGETHER WITH PRODUCT. IN ANY EVENT THE PROVISIONS OF THE RELEASE NOTE SHALL PREVAIL. THIS DOCUMENT CONTAINS INFORMATION ON GEMALTO M2M PRODUCTS.
Cinterion® PLPS9 Hardware Interface Description Page 3 of 125 Contents 125 Contents 1 Introduction ................................................................................................................. 8 1.1 Product Variants ................................................................................................ 8 1.2 Key Features at a Glance .................................................................................. 9 1.2.1 Supported Frequency Bands ...........................
Cinterion® PLPS9 Hardware Interface Description Page 4 of 125 Contents 125 2.4 Sample Application .......................................................................................... 60 2.4.1 Prevent Back Powering....................................................................... 61 2.4.2 Sample Level Conversion Circuit........................................................ 62 2.4.3 Sample Circuit for Antenna Detection................................................. 63 3 GNSS Interface ...
Cinterion® PLPS9 Hardware Interface Description Page 5 of 125 Contents 125 5.2.4 5.3 Durability and Mechanical Handling.................................................. 105 5.2.4.1 Storage Conditions............................................................ 105 5.2.4.2 Processing Life.................................................................. 105 5.2.4.3 Baking ............................................................................... 106 5.2.4.4 Electrostatic Discharge .................
Cinterion® PLPS9 Hardware Interface Description Page 6 of 125 Tables 125 Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Table 14: Table 15: Table 16: Table 17: Table 18: Table 19: Table 20: Table 21: Table 22: Table 23: Table 24: Table 25: Table 26: Table 27: Table 28: Table 29: Table 30: Table 31: Table 32: Table 33: Table 34: Table 35: Table 36: Table 37: Table 38: Table 39: Table 40: Table 41: Supported frequency band
Cinterion® PLPS9 Hardware Interface Description Page 7 of 125 Figures 125 Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26: Figure 27: Figure 28: Figure 29: Figure 30: Figure 31: Figure 32: Figure 33: Figure 34: Figure 35: Figure 36: Figure 37: Figure 38: Figure 39: Figure
Cinterion® PLPS9 Hardware Interface Description Page 8 of 125 1 Introduction 19 1 Introduction This document1 describes the hardware of the Cinterion® PLPS9 products listed in Section 1.1. It helps you quickly retrieve interface specifications, electrical and mechanical details and information on the requirements to be considered for integrating further components. 1.
Cinterion® PLPS9 Hardware Interface Description Page 9 of 125 1.2 Key Features at a Glance 19 1.2 Key Features at a Glance Feature Implementation General Frequency bands Note: Not all of the frequency bands (and 3GPP technologies) mentioned throughout this document are supported by every PLPS9 products variant. Please refer to Section 1.2.1 for an overview of the frequency bands supported by each PLPS9 product variant.
Cinterion® PLPS9 Hardware Interface Description Page 10 of 125 1.2 Key Features at a Glance 19 Feature Implementation HSPA features 3GPP Release 8 UE CAT. 14, 24 DC-HSPA+ – DL 42Mbps HSUPA – UL 5.76Mbps Compressed mode (CM) supported according to 3GPP TS25.
Cinterion® PLPS9 Hardware Interface Description Page 11 of 125 1.2 Key Features at a Glance 19 Feature Implementation Interfaces Module interface Surface mount device with solderable connection pads (SMT application interface). Land grid array (LGA) technology ensures high solder joint reliability and provides the possibility to use an optional module mounting socket. For more information on how to integrate SMT modules see also [3].
Cinterion® PLPS9 Hardware Interface Description Page 12 of 125 1.2 Key Features at a Glance 19 Feature Implementation ADC inputs Analog-to-Digital Converter with unbalanced analog inputs for example for (external) antenna diagnosis JTAG JTAG interface for debug purposes eMMC Linux controlled: Embedded Multi-Media Card interface PCIe Linux controlled: PCIe interface Evaluation kit Evaluation module PLPS9 module soldered onto a dedicated PCB. PLPS9_HID_v00.
Cinterion® PLPS9 Hardware Interface Description Page 13 of 125 1.2 Key Features at a Glance 19 1.2.1 Supported Frequency Bands The following table lists the supported frequency bands for each of the PLPS9 product variants mentioned in Section 1.1. Table 1: Supported frequency bands for each PLPS9 variant Band -W -X GSM/GPRS/EDGE 850MHz x x 900MHz x x 1800MHz x x 1900MHz x x UMTS/HSPA Bd.I (2100MHz) x Bd.II (1900MHz) Bd.III (1800MHz) x x Bd.IV (1700MHz) x Bd.V (850MHz) x Bd.
Cinterion® PLPS9 Hardware Interface Description Page 14 of 125 1.2 Key Features at a Glance 19 Table 1: Supported frequency bands for each PLPS9 variant Band -W -X Bd.29 (700MHz) x Bd.30 (2300MHz)2 x x Bd.32 (1500MHz) Bd.66 (1700MHz)3 x LTE-TDD4 Bd.34 (2000MHz) x Bd.38 (2600MHz) x Bd.39 (1900MHz) x Bd.40 (2300MHz) Bd.41 (2600MHz) x 5 x 1. Bd.5, Bd.8, Bd.29, and Bd.
Cinterion® PLPS9 Hardware Interface Description Page 15 of 125 1.2 Key Features at a Glance 19 Table 2: Supported CA configurations Downlink CA Downlink (4x4 MIMO) Uplink CA Bandwidth combination set Product variants (PLPS9-...
Cinterion® PLPS9 Hardware Interface Description Page 16 of 125 1.2 Key Features at a Glance 19 Table 2: Supported CA configurations Downlink CA Downlink (4x4 MIMO) Uplink CA Bandwidth combination set Product variants (PLPS9-...
Cinterion® PLPS9 Hardware Interface Description Page 17 of 125 1.2 Key Features at a Glance 19 Table 2: Supported CA configurations Downlink CA Downlink (4x4 MIMO) Uplink CA Bandwidth combination set Product variants (PLPS9-...
Cinterion® PLPS9 Hardware Interface Description Page 18 of 125 1.3 System Overview 19 1.3 System Overview GNSS TRX1 TRX2 RX3 RX4 Application Antennadiagnostic Power Supply Antennadiagnostic SIM Card External Antenna Switch (optional) 3x ANT _SW GSM/UMTS/LTE GNSS GPIO 4x ADC UICC Power Supply IGT EMERG_OFF PWR_IND eMMC VEXT GPIO eMMC Interface Digital Audio GPIO 2x I2C PCM / I2S ASC1 I2C PCIe ASC0 Serial Interface PCIe Serial Interface USB 2.0/3.
Cinterion® PLPS9 Hardware Interface Description Page 19 of 125 1.4 Circuit Concept 19 1.
Cinterion® PLPS9 Hardware Interface Description Page 20 of 125 2 Interface Characteristics 68 2 Interface Characteristics PLPS9 is equipped with an SMT application interface that connects to the external application. The SMT application interface incorporates the various application interfaces as well as the RF antenna interface. 2.1 Application Interface 2.1.1 Pad Assignment The SMT application interface on the PLPS9 provides connecting pads to integrate the module into external applications.
Cinterion® PLPS9 Hardware Interface Description Page 21 of 125 2.1 Application Interface 68 Table 3: Overview: Pad assignments Pad No. Signal Name Pad No. Signal Name Pad No.
Cinterion® PLPS9 Hardware Interface Description Page 22 of 125 2.
Cinterion® PLPS9 Hardware Interface Description Page 23 of 125 2.
Cinterion® PLPS9 Hardware Interface Description Page 24 of 125 2.1 Application Interface 68 2.1.2 Signal Properties Please note that the reference voltages listed in Table 4 are the values measured directly on the PLPS9 module. They do not apply to the accessories connected. Table 4: Signal description Function Signal name IO Power sup- BATT+ ply BATT+_RF I Signal form and level Comment VImax = 4.2V VImin = 3.
Cinterion® PLPS9 Hardware Interface Description Page 25 of 125 2.1 Application Interface 68 Table 4: Signal description Function Signal name IO Signal form and level Comment Ignition IGT RPU 200k VOHmax = 1.84V VIHmax =2.00V VIHmin = 1.30V VILmax = 0.50V Low impulse width > 100ms This signal switches the module on. RPU 40k VOHmax = 1.84V VIHmax = 2.00V VIHmin = 1.30V VILmax = 0.
Cinterion® PLPS9 Hardware Interface Description Page 26 of 125 2.1 Application Interface 68 Table 4: Signal description Function Signal name IO Signal form and level Comment 1.8V SIM card interface CCRST1 CCRST2 VOLmax = 0.4V at I = 2mA VOLnom = 0.1V at I = 100µA VOHmin = 1.40V at I = -2mA VOHmin = 1.65V at I = -100µA VOHmax = 1.84V Maximum cable length or copper track should be not longer than 100mm to SIM card holder. O CCCLK1 CCCLK2 CCIO1 CCIO2 I/O RPU 6.7..8.5k VILmax = 0.30V VIHmin = 1.
Cinterion® PLPS9 Hardware Interface Description Page 27 of 125 2.1 Application Interface 68 Table 4: Signal description Function Signal name IO Power indi- PWR_IND cator O Signal form and level Comment VIHmax = 5.5V VOLmax = 0.45V at Imax = 2mA PWR_IND (Power Indicator) notifies the module’s on/off state. PWR_IND is an open collector that needs to be connected to an external pull-up resistor. Low state of the open collector indicates that the module is on.
Cinterion® PLPS9 Hardware Interface Description Page 28 of 125 2.1 Application Interface 68 Table 4: Signal description Function Signal name IO GPIO interface GPIO1 GPIO4...8 GPIO11...17 GPIO22 Signal form and level I/O VOLmax = 0.45V at I = 2mA VOLnom = 0.1V at I = 100µA VOHmin = 1.30V at I = -2mA VOHnom = 1.65V at I = -100µA VOHmax = 1.84V VILmax = 0.50V VIHmin = 1.30V VIHmax = 2.0V IIHPD = 27.5µA…97.5µA IILPU = -27.5µA…-97.5µA IHigh-Z max= ±1µA Comment GPIO5...
Cinterion® PLPS9 Hardware Interface Description Page 29 of 125 2.1 Application Interface 68 Table 4: Signal description Function Signal name IO Signal form and level PCIe PCIE_RX_N According to PCI Express Specification, Revision 2.0/2.1 (one lane, 5 GBit/s) I PCIE_RX_P PCIE_TX_N Comment O PCIE_TX_P PCIE_CLK_N I/O PCIE_CLK_P PCIE_CLK_REQ IO PCIE_HOST_ O RST PCIE_HOST_ I WAKE I2C interface I2CDAT1 I2CDAT2 I2CCLK1 I2CCLK2 JTAG inter- JTAG_SRST face JTAG_TCK VOLmax = 0.
Cinterion® PLPS9 Hardware Interface Description Page 30 of 125 2.1 Application Interface 68 Table 4: Signal description Function Signal name IO Signal form and level Comment eMMC interface EMMC_ DETECT VOLmax = 0.45V at I = 2mA VOLnom = 0.1V at I = 100µA VOHmin = 1.30V at I = -2mA VOHnom = 1.65V at I = -100µA VOHmax = 1.84V eMMC I VILmax = 0.50V VIHmin = 1.30V VIHmax = 2.0V IIHPD = 27.5µA…97.5µA IILPU = -27.5µA…-97.5µA IHigh-Z max= ±1µA 1.8V eMMC EMMC_PWR O VOUT (nom) = 2.95V / 1.
Cinterion® PLPS9 Hardware Interface Description Page 31 of 125 2.1 Application Interface 68 2.1.2.1 Absolute Maximum Ratings The absolute maximum ratings stated in Table 5 are stress ratings under any conditions. Stresses beyond any of these limits will cause permanent damage to PLPS9. Table 5: Absolute maximum ratings Parameter Min Max Unit Supply voltage BATT+ -0.3 +5.5 V Voltage at all digital lines in Power Down mode (except VEXT) -0.3 +0.5 V Voltage at VEXT in Power Down mode -0.
Cinterion® PLPS9 Hardware Interface Description Page 32 of 125 2.1 Application Interface 68 2.1.3 USB Interface PLPS9 supports a USB 3.0 Super Speed (5Gbps) device interface, and alternatively a USB 2.0 device interface that is High Speed compatible. The USB interface is primarily intended for use as debugging interface. The USB host is responsible for supplying the VUSB_IN line. This line is for voltage detection only. The USB part (driver and transceiver) is supplied by means of BATT+.
Cinterion® PLPS9 Hardware Interface Description Page 33 of 125 2.1 Application Interface 68 2.1.4 Serial Interface ASC0 PLPS9 offers a 4-wire (8-wire prepared) (plus GND) unbalanced, asynchronous interface ASC0 conforming to ITU-T V.24 protocol DCE signaling. The electrical characteristics do not comply with ITU-T V.28. The significant levels are 0V (for low data bit or active state) and 1.8V (for high data bit or inactive state). For electrical characteristics please refer to Table 4.
Cinterion® PLPS9 Hardware Interface Description Page 34 of 125 2.1 Application Interface 68 Table 6: DCE-DTE wiring of ASC0 V.24 circuit DCE DTE Line function Signal direction Line function Signal direction 103 TXD0 Input TXD Output 104 RXD0 Output RXD Input 105 RTS0 Input RTS Output 106 CTS0 Output CTS Input 108/2 DTR0 Input DTR Output 107 DSR0 Output DSR Input 109 DCD0 Output DCD Input 125 RING0 Output RING Input 2.1.
Cinterion® PLPS9 Hardware Interface Description Page 35 of 125 2.1 Application Interface 68 2.1.6 Inter-Integrated Circuit Interface PLPS9 provides an Inter-Intergrated Circuit (I2C) interface. I2C is a serial, 8-bit oriented data transfer bus for bit rates up to 400kbps in Fast mode. It consists of two lines, the serial data line I2CDAT and the serial clock line I2CCLK. The module acts as a single master device, e.g. the clock I2CCLK is driven by the module. I2CDAT is a bi-directional line.
Cinterion® PLPS9 Hardware Interface Description Page 36 of 125 2.1 Application Interface 68 2.1.7 UICC/SIM/USIM Interface PLPS9 has two UICC/SIM/USIM interfaces compatible with the 3GPP 31.102 and ETSI 102 221. It is wired to the host interface in order to be connected to an external SIM card holder. Five pads on the SMT application interfaceare reserved for the SIM interface. The UICC/SIM/USIM interface supports 2.85V and 1.8V SIM cards.
Cinterion® PLPS9 Hardware Interface Description Page 37 of 125 2.1 Application Interface 68 open: Card removed closed: Card inserted SMT application interface CCIN1 Module CCRST1 SIM / UICC 1n CCCLK1 GND CCIO1 CCVCC1 220n Figure 9: First UICC/SIM/USIM interface The total cable length between the SMT application interface pads on PLPS9 and the pads of the external SIM card holder must not exceed 100mm in order to meet the specifications of 3GPP TS 51.
Cinterion® PLPS9 Hardware Interface Description Page 38 of 125 2.1 Application Interface 68 2.1.7.1 Enhanced ESD Protection for SIM Interfaces To optimize ESD protection for the SIM interfaces it is possible to add ESD diodes to the interface lines of the first and second SIM interface as shown in the example given in Figure 11. The example was designed to meet ESD protection according ETSI EN 301 489-1/7: Contact discharge: ± 4kV, air discharge: ± 8kV.
Cinterion® PLPS9 Hardware Interface Description Page 39 of 125 2.1 Application Interface 68 2.1.8 Digital Audio Interface PLPS9 supports one digital audio interface that can be employed as either as pulse code modulation (PCM) or Inter-IC Sound (I2S) interface. Default setting is I2S. Please note that the first DAI is reserved for future use. 2.1.8.1 Pulse Code Modulation Interface PLPS9's PCM interface can be used to connect audio devices capable of pulse code modulation.
Cinterion® PLPS9 Hardware Interface Description Page 40 of 125 2.1 Application Interface 68 2.1.8.2 Inter-IC Sound Interface The I2S Interface is a standardized bidirectional I2S based digital audio interface for transmission of mono voice signals for telephony services. The I2S interface can be enabled and configured using the AT command AT^SAIC (see [1]). Activation of the I2S line is possible only out of call and out of tone presentation.
Cinterion® PLPS9 Hardware Interface Description Page 41 of 125 2.1 Application Interface 68 2.1.9 Analog-to-Digital Converter (ADC) PLPS9 provides four unbalanced ADC input lines: ADC[1-2...4-5]_IN. They can be used to measure four independent, externally connected DC voltages in the range of 0.1V to 1.7V. As described in Section 2.2.4 and Section 2.3.1 they can be used especially for antenna diagnosing.
Cinterion® PLPS9 Hardware Interface Description Page 42 of 125 2.1 Application Interface 68 2.1.12 2.1.12.1 Control Signals PWR_IND Signal PWR_IND notifies the on/off state of the module. High state of PWR_IND indicates that the module is switched off. The state of PWR_IND immediately changes to low when IGT is pulled low. For state detection an external pull-up resistor is required.
Cinterion® PLPS9 Hardware Interface Description Page 43 of 125 2.1 Application Interface 68 2.1.12.3 Low Current Indicator A low current indication is optionally available over a GPIO line. By default, low current indication is disabled and the GPIO pads can be configured and employed as usual. For a GPIO pad to work as a low current indicator the feature has to be enabled by AT command (see [1]: AT^SCFG: MEopMode/PowerMgmt/LCI). If enabled, the GPIOx signal is high when the module is sleeping.
Cinterion® PLPS9 Hardware Interface Description Page 44 of 125 2.1 Application Interface 68 2.1.12.4 Firmware Swap The firmware swap signal FwSwap allows to toggle between two firmware images that may be available on the module. Setting the FwSwap line to high during the module’s startup phase triggers the firmware swap. The signal may for instance be used as a fallback or backup solution in case a possible firmware update is not successful.
Cinterion® PLPS9 Hardware Interface Description Page 45 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 2.2 GSM/UMTS/LTE Antenna Interface The PLPS9 GSM/UMTS/LTE antenna interface comprises two GSM/UMTS/LTE main antennas as well as two UMTS/LTE Rx diversity/MIMO antennas to improve signal reliability and quality1. The interface has an impedance of 50. PLPS9 is capable of sustaining a total mismatch at the antenna interface without any damage, even when transmitting at maximum RF power.
Cinterion® PLPS9 Hardware Interface Description Page 46 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 2.2.1 Antenna Interface Specifications Table 14: RF Antenna interface GSM/UMTS/LTE (at operating temperature range1) Parameter Conditions LTE connectivity Band 1, 2, 3, 4, 5, 7, 8, 12, 13, 18, 19, 20, 26, 28, 34, 38, 39, 40, 41, 66 Receiver Input Sensitivity @ LTE 2100 Band 1 ARP (ch. bandwidth 5MHz; 4 LTE 1900 Band 2 antenna combined, TRX1, TRX2, RX3, RX4)) RF Power @ ARP with 50 Load Min.
Cinterion® PLPS9 Hardware Interface Description Page 47 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 Table 14: RF Antenna interface GSM/UMTS/LTE (at operating temperature range1) Parameter Conditions Min. Typical Max.
Cinterion® PLPS9 Hardware Interface Description Page 48 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 Table 14: RF Antenna interface GSM/UMTS/LTE (at operating temperature range1) Parameter Conditions GPRS coding schemes Class 12, CS1 to CS4 EGPRS Class 12, MCS1 to MCS9 GSM Class Small MS Static Receiver input Sensitivity @ ARP RF Power @ ARP with 50 Load GSM RF Power @ ARP with 50 Load (ROPR=4, i.e.
Cinterion® PLPS9 Hardware Interface Description Page 49 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 Table 14: RF Antenna interface GSM/UMTS/LTE (at operating temperature range1) Parameter RF Power @ ARP with 50 Load (ROPR=5) Conditions GPRS, 1 TX EDGE, 1 TX GPRS, 2 TX EDGE, 2 TX GPRS, 3 TX EDGE, 3 TX GPRS, 4 TX EDGE, 4 TX RF Power @ ARP with 50 Load (ROPR=6) GPRS, 1 TX EDGE, 1 TX GPRS, 2 TX EDGE, 2 TX GPRS, 3 TX EDGE, 3 TX GPRS, 4 TX EDGE, 4 TX Min. Typical Max.
Cinterion® PLPS9 Hardware Interface Description Page 50 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 Table 14: RF Antenna interface GSM/UMTS/LTE (at operating temperature range1) Parameter RF Power @ ARP with 50 Load (ROPR=7) Conditions GPRS, 1 TX EDGE, 1 TX GPRS, 2 TX EDGE, 2 TX GPRS, 3 TX EDGE, 3 TX GPRS, 4 TX EDGE, 4 TX RF Power @ ARP with 50 Load (ROPR=8, i.e., max. reduction) GPRS, 1 TX EDGE, 1 TX GPRS, 2 TX EDGE, 2 TX GPRS, 3 TX EDGE, 3 TX GPRS, 4 TX EDGE, 4 TX Min.
Cinterion® PLPS9 Hardware Interface Description Page 51 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 2.2.2 Antenna Installation The antennas are connected by soldering the antenna pads (ANT_TRX1, ANT_TRX2, ANT_RX3, ANT_RX4; ANT_GNSS) and their neighboring ground pads directly to the application’s PCB.
Cinterion® PLPS9 Hardware Interface Description Page 52 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 For type approval purposes(i.e., FCC KDB 996369 related to modular approval requirements), an external application must connect the RF signal in one of the following ways: • Via 50 coaxial antenna connector (common connectors are U-FL or SMA) placed as close as possible to the module's antenna pad.
Cinterion® PLPS9 Hardware Interface Description Page 53 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 Micro-Stripline This section gives two line arrangement examples for micro-stripline. Figure 19: Micro-Stripline line arrangement samples PLPS9_HID_v00.
Cinterion® PLPS9 Hardware Interface Description Page 54 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 2.2.3.2 Routing Examples Interface to RF Connector Figure 20 and Figure 21 show a sample connection of a module‘s antenna pad at the bottom layer of the module PCB with an application PCB‘s coaxial antenna connector. Line impedance depends on line width, but also on other PCB characteristics like dielectric, height and layer gap. The sample stripline width of 0.50mm/0.75mm and the spaces of 0.35mm/0.
Cinterion® PLPS9 Hardware Interface Description Page 55 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 2.2.4 RF Antenna Diagnostic RF antenna (GSM/UMTS/LTE) diagnosis requires the implementation of an external antenna detection circuit. An example for such a circuit is illustrated in Figure 23. It allows to check the presence and the connection status of RF antennas. To properly detect the antenna and verify its connection status the antenna feed point must have a DC resistance RANT of 9k (±3k).
Cinterion® PLPS9 Hardware Interface Description Page 56 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 Figure 23 shows the basic principles of an antenna detection circuit that is able to detect antennas and verify their connection status. The GPIO pads can be employed to enable the antenna detection, the ADCx_IN pads can be used to measure the voltage of external devices connected to these ADC input pads - thus determining RANT values.
Cinterion® PLPS9 Hardware Interface Description Page 57 of 125 2.2 GSM/UMTS/LTE Antenna Interface 68 Table 16 lists assured antenna diagnostic states depending on the measured RANT values. Note that the RANT ranges not mentioned in the below table, i.e., 1k...6k and 12k...40k are tolerance ranges. Within these tolerance ranges a decision threshold for a diagnostic application may be located. For more details and a combined sample RF/GNSS antenna detection circuit please refer to Section 2.4.3.
Cinterion® PLPS9 Hardware Interface Description Page 58 of 125 2.3 GNSS Antenna Interface 68 2.3 GNSS Antenna Interface In addition to the RF antenna interface PLPS9 also has a GNSS antenna interface. See Section 2.1.1 to find out where the GNSS antenna pad is located. The GNSS pad’s shape is the same as for the RF antenna interface (see Section 2.2.2). It is possible to connect active or passive GNSS antennas. In either case they must have 50 impedance.
Cinterion® PLPS9 Hardware Interface Description Page 59 of 125 2.3 GNSS Antenna Interface 68 Figure 25 shows a sample circuit realizing ESD protection for a passive GNSS antenna. Connecting the input ANT_GNSS_DC to GND prevents ESD from coupling into the module. Module SMT interface GNSS _EN 100nF Not used ANT_GNSS _DC Passive GNSS antenna (Optional) 0R ESD protection 10nH ANT_GNSS To GNSS receiver Figure 25: ESD protection for passive GNSS antenna 2.3.
Cinterion® PLPS9 Hardware Interface Description Page 60 of 125 2.4 Sample Application 68 2.4 Sample Application Figure 26 shows a typical example of how to integrate an PLPS9 module with an application. The PWR_IND line is an open collector that needs an external pull-up resistor which connects to the voltage supply VCC µC of the microcontroller. Low state of the open collector pulls the PWR_IND signal low and indicates that the PLPS9 module is active, high level notifies the Power Down mode.
Cinterion® PLPS9 Hardware Interface Description Page 61 of 125 2.4 Sample Application 68 GSM/UMTS/LTE IGT GND ANT_TRX1 47k GND GSM/UMTS/LTE GND EMERG _OFF ANT_TRX2 GND 47k UMTS/LTE GND ANT_RX3 GND 100k UMTS/LTE VCC µC GND PWR_IND ANT_RX4 GND GNSS GND ANT_GNSS VDD (1.8V) VEXT (1.8V) VCC µC Module OE V CCA 4 VCCB Level Controller GND PCM interface lines 4 PCM2_... 47µF Ultra low ESR BATT+ 2 Rechargeable Lithium battery BATT+_RF 2 + Serial interface ASC0 8 RXD0, TXD0, ...
Cinterion® PLPS9 Hardware Interface Description Page 62 of 125 2.4 Sample Application 68 2.4.2 Sample Level Conversion Circuit Depending on the micro controller used by an external application PLPS9‘s digital input and output lines (i.e., ASC0 lines) may require level conversion. The following Figure 27 shows sample circuits with recommended level shifters for an external application‘s micro controller (with VLOGIC between 3.0V...3.6V).
Cinterion® PLPS9 Hardware Interface Description Page 63 of 125 2.4 Sample Application 68 2.4.3 Sample Circuit for Antenna Detection The following figures explain how an RF antenna detection circuit may be implemented for PLPS9 to be able to detect connected antennas (for basic circuit and diagnostic principles - including usage of GPIO and ADCx_IN pads - please refer to Section 2.2.4).
Cinterion® PLPS9 Hardware Interface Description Page 64 of 125 Low pass filter (DC insertion ) L2 L1 C1 ANT4 ANT3 ANT2 ANT1 2.
Cinterion® PLPS9 Hardware Interface Description Page 65 of 125 2.4 Sample Application 68 Table 19: Antenna detection reference circuit - parts list Reference Part Value R1,2,17,18 Resistor 22R R3,4,19,20 Resistor 10k R5,6,21,22 Resistor 140k 1% R7,8,23,24 Resistor 100k 1% R9,10 Resistor 100k R11,12 Resistor 10k > 125mW R13,14,15,16 Resistor 4k4 1% (e.g.
Cinterion® PLPS9 Hardware Interface Description Page 66 of 125 3 GNSS Interface 68 3 GNSS Interface PLPS9 integrates a GNSS receiver that offers the full performance of GPS/GLONASS technology. The GNSS receiver is able to continuously track all satellites in view, thus providing accurate satellite position data. The integrated GNSS receiver supports the NMEA protocol via USB or ASC0 interface.
Cinterion® PLPS9 Hardware Interface Description Page 67 of 125 3.1 GNSS Interface Characteristics 68 3.1 GNSS Interface Characteristics The following tables list general characteristics of the GNSS interface. Table 20: GNSS properties Parameter Conditions Min. Typical Max. Unit Frequency GPS 1575 1575.42 1585 MHz 1597 1602 1607 -- -- -- 1597 1575.
Cinterion® PLPS9 Hardware Interface Description Page 68 of 125 3.1 GNSS Interface Characteristics 68 Through the external GNSS antenna DC feeding the module is able to supply an active GNSS antenna. The supply voltage level at the GNSS antenna interface depends on the GNSS configurationdone with AT command as shown in Table 21.
Cinterion® PLPS9 Hardware Interface Description Page 69 of 125 4 Operating Characteristics 98 4 Operating Characteristics 4.1 Operating Modes The table below briefly summarizes the various operating modes referred to throughout the document. Table 22: Overview of operating modes Mode Function Normal GSM / GPRS / operation UMTS / HSPA / LTE SLEEP Power saving set automatically when no call is in progress and the USB connection is detached and no active communication via ASC0.
Cinterion® PLPS9 Hardware Interface Description Page 70 of 125 4.2 Power Up/Power Down Scenarios 98 4.2 Power Up/Power Down Scenarios In general, be sure not to turn on PLPS9 while it is beyond the safety limits of voltage (see Section 2.1.2.1) and temperature (see Section 4.5). PLPS9 immediately switches off after having started and detected these inappropriate conditions. In extreme cases this can cause permanent damage to the module. 4.2.
Cinterion® PLPS9 Hardware Interface Description Page 71 of 125 4.2 Power Up/Power Down Scenarios 98 Please note that on USB ports these URCs are only sent if the USB interface is in state 'configured', and with AT^SCFG= "MEopMode/ExpectDTR being enabled (see also Section 4.3) the connected USB host has signaled being ready to receive data. PLPS9_HID_v00.
Cinterion® PLPS9 Hardware Interface Description Page 72 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.2 Signal States after First Startup Table 23 describes the various states each interface signal passes through after startup until the system is active. Signals are in an initial state while the module is initializing. Once the startup initialization has completed, i.e. when the software is running, all signals are in a defined state.
Cinterion® PLPS9 Hardware Interface Description Page 73 of 125 4.2 Power Up/Power Down Scenarios 98 Table 23: Signal states Signal name Pad no.
Cinterion® PLPS9 Hardware Interface Description Page 74 of 125 4.2 Power Up/Power Down Scenarios 98 Table 23: Signal states Signal name Pad no.
Cinterion® PLPS9 Hardware Interface Description Page 75 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.3 Turn off or Restart PLPS9 To switch off or restart the module the following procedures may be used: • Software controlled shutdown procedure: Software controlledby sending an AT command over the serial application interface. See Section 4.2.3.1. • Software controlled restart procedure: Software controlled by sending an AT command over the serial application interface. See Section 4.2.3.2.
Cinterion® PLPS9 Hardware Interface Description Page 76 of 125 4.2 Power Up/Power Down Scenarios 98 Start shutdown approx. 20s Deregister from network, system shut down PWR_IND Digital outputs VEXT Inputs driven by application BATT + driven by application Figure 31: Signal states during turn-off procedure Note 1: Note 2: 4.2.3.2 VEXT can be used in solutions to prevent back powering (see also Section 2.4.1). It should have a level lower than 0.3V after module shutdown.
Cinterion® PLPS9 Hardware Interface Description Page 77 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.3.3 Turn off PLPS9 Using IGT Line The IGT line can be configured for use in two different switching modes: You can configure the IGT line to switch on the module only, or to switch it on and off. This approach is useful for external application manufacturers who wish to have an ON/OFF switch installed on the host device.
Cinterion® PLPS9 Hardware Interface Description Page 78 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.3.4 Turn off or Restart PLPS9 in Case of Emergency Caution: Use the EMERG_OFF line only when, due to serious problems, the software is not responding for more than 5 seconds. Pulling the EMERG_OFF line causes the loss of all information stored in the volatile memory. Therefore, this procedure is intended only for use in case of emergency, e.g.
Cinterion® PLPS9 Hardware Interface Description Page 79 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.3.5 Overall Shutdown Sequence In case the above described dedicated software or hardware controlled shutdown procedures fail or hang for some reason, it may become necessary to disconnect BATT+ in order to ultimately shut down the module. Figure 35 shows a flow chart that illustrates how an overall shutdown sequence might be implemented. Module switch off...
Cinterion® PLPS9 Hardware Interface Description Page 80 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.4 Automatic Shutdown Automatic shutdown takes effect if: • The PLPS9 board is exceeding the critical limits of overtemperature or undertemperature • Undervoltage or overvoltage is detected The automatic shutdown procedure is equivalent to the power down initiated with the AT^SMSO command, i.e. PLPS9 logs off from the network and the software enters a secure state avoiding loss of data.
Cinterion® PLPS9 Hardware Interface Description Page 81 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.4.1 Thermal Shutdown The board temperature is constantly monitored by an internal NTC resistor located on the PCB. The values detected by the NTC resistor are measured directly on the board and therefore, are not fully identical with the ambient temperature. Each time the board temperature goes out of range or back to normal, PLPS9 instantly displays an alert (if enabled).
Cinterion® PLPS9 Hardware Interface Description Page 82 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.4.2 Deferred Shutdown at Extreme Temperature Conditions In the following cases, automatic shutdown will be deferred if a critical temperature limit is exceeded: • While an emergency call is in progress. • During a two minute guard period after power-up. This guard period has been introduced in order to allow for the user to make an emergency call.
Cinterion® PLPS9 Hardware Interface Description Page 83 of 125 4.2 Power Up/Power Down Scenarios 98 4.2.4.3 Undervoltage Shutdown If the measured battery voltage is no more sufficient to set up a call the following URC will be presented: ^SBC: Undervoltage. The URC indicates that the module is close to the undervoltage threshold. If undervoltage persists the module keeps sending the URC several times before switching off automatically. This type of URC does not need to be activated by the user.
Cinterion® PLPS9 Hardware Interface Description Page 84 of 125 4.3 Power Saving 98 4.3 Power Saving PLPS9 is able to reduce its functionality to a minimum (during the so-called SLEEP mode) in order to minimize its current consumption. The following sections explain the module’s network dependent power saving behavior. The power saving behavior is further configurable by AT command: • AT^SCFG= "MEopMode/PwrSave": The power save mode is by default enabled.
Cinterion® PLPS9 Hardware Interface Description Page 85 of 125 4.3 Power Saving 98 pause before the next paging. In the pauses between listening to paging messages, the module resumes power saving, as shown in Figure 36. Figure 36: Power saving and paging in GSM networks The varying pauses explain the different potential for power saving. The longer the pause the less power is consumed.
Cinterion® PLPS9 Hardware Interface Description Page 86 of 125 4.3 Power Saving 98 4.3.2 Power Saving while Attached to WCDMA Networks The power saving possibilities while attached to a WCDMA network depend on the paging timing cycle of the base station. During normal WCDMA operation, i.e., the module is connected to a WCDMA network, the duration of a paging timing cycle varies. It may be calculated using the following formula: t = 2DRX value * 10 ms (WCDMA frame duration).
Cinterion® PLPS9 Hardware Interface Description Page 87 of 125 4.3 Power Saving 98 4.3.3 Power Saving while Attached to LTE Networks The power saving possibilities while attached to an LTE network depend on the paging timing cycle of the base station. During normal LTE operation, i.e., the module is connected to an LTE network, the duration of a paging timing cycle varies.
Cinterion® PLPS9 Hardware Interface Description Page 88 of 125 4.4 Power Supply 98 4.4 Power Supply PLPS9 needs to be connected to a power supply at the SMT application interface - 4 lines BATT+, and GND.
Cinterion® PLPS9 Hardware Interface Description Page 89 of 125 4.4 Power Supply 98 4.4.1 Power Supply Ratings Table 25 and Table 26 assemble various voltage supply and current consumption ratings for the supported modules. Possible ratings are preliminary and will have to be confirmed. Table 25: Voltage supply ratings Description BATT+ Supply voltage Conditions Directly measured at Module. 3.
Cinterion® PLPS9 Hardware Interface Description Page 90 of 125 4.4 Power Supply 98 Table 26: Current consumption ratings IBATT+ 1 Description Conditions OFF State supply current Power Down Typical rating RTC off USB disconnected 30 USB connected 60 USB disconnected 90 USB connected 120 SLEEP @ DRX=9 (no communication with the module) USB disconnected 1.7 USB suspend 13.2 SLEEP2 @ DRX=5 (no communication with the module) USB disconnected 1.9 USB suspend 13.
Cinterion® PLPS9 Hardware Interface Description Page 91 of 125 4.4 Power Supply 98 Table 26: Current consumption ratings IBATT+ 1 Description Conditions Average GSM supply current EDGE Data transfer GSM850/900; PCL=5; 1Tx/4Rx ROPR=8 (max. reduction) EDGE Data transfer GSM850/900; PCL=5; 2Tx/3Rx Peak current during GSM transmit burst IBATT+ 1 Average GSM supply current (GNSS on) Typical rating Unit 220 mA ROPR=8 (max.
Cinterion® PLPS9 Hardware Interface Description Page 92 of 125 4.4 Power Supply 98 Table 26: Current consumption ratings Description IBATT+ IBATT+ 1 1 Average UMTS supply current Conditions 2 Typical rating Unit mA SLEEP @ DRX=9 (no communication with the module) USB disconnected 1.6 USB suspend 13.1 SLEEP2 @ DRX=8 Voice calls and (no communication with Data transfers the module) measured 2 @ maximum Pout SLEEP @ DRX=6 (no communication with the module) USB disconnected 1.
Cinterion® PLPS9 Hardware Interface Description Page 93 of 125 4.4 Power Supply 98 Table 26: Current consumption ratings Description IBATT+ 1 Conditions 2 Average LTE sup- SLEEP @ "Paging ply current (FDD)5 Occasions" = 256 2 SLEEP @ "Paging Data transfers Occasions" = 128 measured @ maximum Pout SLEEP2 @ "Paging Occasions" = 64 2 SLEEP @ "Paging Occasions" = 32 Typical rating Unit USB disconnected 1.9 mA USB suspend 13.5 USB disconnected 2.3 USB suspend 13.9 USB disconnected 2.
Cinterion® PLPS9 Hardware Interface Description Page 94 of 125 4.4 Power Supply 98 Table 26: Current consumption ratings IBATT+ 1 IBATT+ 1 Description Conditions Typical rating Unit Average LTE supply current (FDD) (GNSS on) Average LTE supply current (TDD)5 LTE active (UART/USB active); IDLE; NMEA output off 110 mA LTE active (UART/USB active); IDLE; NMEA output on4 110 mA SLEEP2 @ "Paging Occasions" = 256 USB disconnected 1.9 mA USB suspend 13.5 USB disconnected 2.
Cinterion® PLPS9 Hardware Interface Description Page 95 of 125 4.4 Power Supply 98 Table 26: Current consumption ratings Description IBATT+ 1 Average TDSCDMA supply current (GNSS off) Conditions 2 Average TDSCDMA supply current (GNSS on) mA USB disconnected 1.6 USB suspend 13.1 SLEEP2 @ DRX=8 (no communication with the module) USB disconnected 1.8 USB suspend 13.3 USB disconnected 2.3 USB suspend 13.
Cinterion® PLPS9 Hardware Interface Description Page 96 of 125 4.4 Power Supply 98 4.4.2 Minimizing Power Losses When designing the power supply for your application please pay specific attention to power losses. Ensure that the input voltage VBATT+ never drops below 3.3V on the PLPS9 board, not even in a transmit burst where current consumption can rise to typical peaks of 2A. It should be noted that PLPS9 switches off when exceeding these limits.
Cinterion® PLPS9 Hardware Interface Description Page 97 of 125 4.5 Operating Temperatures 98 4.5 Operating Temperatures Table 27: Board temperature Parameter Min Typ Max Unit Operating temperature range -30 +25 +85 °C Restricted temperature range1 -40 +95 °C >+95 °C 2 Automatic shutdown Temperature measured on PLPS9 board <-40 --- 1. Restricted operation allows normal mode data transmissions for limited time until automatic thermal shutdown takes effect.
Cinterion® PLPS9 Hardware Interface Description Page 98 of 125 4.6 Electrostatic Discharge 98 4.6 Electrostatic Discharge The module is not protected against Electrostatic Discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates a PLPS9 module.
Cinterion® PLPS9 Hardware Interface Description Page 99 of 125 5 Mechanical Dimensions and Mounting 109 5 Mechanical Dimensions and Mounting 5.1 Mechanical Dimensions of PLPS9 Figure 42 shows a 3D view1 of PLPS9 and provides an overview of the board's mechanical dimensions2. For further details see Figure 43. Length: 48mm Width: 36mm Height: 3mm Top view Bottom view Figure 42: PLPS9 – top and bottom view 1. The coloring of the 3D view does not reflect the module’s real color. 2.
Cinterion® PLPS9 Hardware Interface Description Page 100 of 125 5.
Cinterion® PLPS9 Hardware Interface Description Page 101 of 125 5.2 Mounting PLPS9 onto the Application Platform 109 5.2 Mounting PLPS9 onto the Application Platform This section describes how to mount PLPS9 onto the PCBs, including land pattern and stencil design, board-level characterization, soldering conditions, durability and mechanical handling. For more information on issues related to SMT module integration see also [3].
Cinterion® PLPS9 Hardware Interface Description Page 102 of 125 5.2 Mounting PLPS9 onto the Application Platform 109 The stencil design illustrated in Figure 45 is recommended by Gemalto M2M as a result of extensive tests with Gemalto M2M Daisy Chain modules.
Cinterion® PLPS9 Hardware Interface Description Page 103 of 125 5.2 Mounting PLPS9 onto the Application Platform 109 5.2.2 Moisture Sensitivity Level PLPS9 comprises components that are susceptible to damage induced by absorbed moisture. Gemalto M2M’s PLPS9 module complies with the latest revision of the IPC/JEDEC J-STD-020 Standard for moisture sensitive surface mount devices and is classified as MSL 4. For additional moisture sensitivity level (MSL) related information see Section 5.2.4. 5.2.3 5.2.
Cinterion® PLPS9 Hardware Interface Description Page 104 of 125 5.2 Mounting PLPS9 onto the Application Platform 109 Table 29: Reflow temperature recommendations1 Profile Feature Pb-Free Assembly Preheat & Soak Temperature Minimum (TSmin) Temperature Maximum (TSmax) Time (tSmin to tSmax) (tS) 150°C 200°C 60-120 seconds Average ramp up rate (TL to TP) 3K/second max.
Cinterion® PLPS9 Hardware Interface Description Page 105 of 125 5.2 Mounting PLPS9 onto the Application Platform 109 5.2.4 Durability and Mechanical Handling 5.2.4.1 Storage Conditions PLPS9 modules, as delivered in tape and reel carriers, must be stored in sealed, moisture barrier anti-static bags. The conditions stated below are only valid for modules in their original packed state in weather protected, non-temperature-controlled storage locations.
Cinterion® PLPS9 Hardware Interface Description Page 106 of 125 5.2 Mounting PLPS9 onto the Application Platform 109 5.2.4.3 Baking Baking conditions are specified on the moisture sensitivity label attached to each MBB: • It is not necessary to bake PLPS9, if the conditions specified in Section 5.2.4.1 and Section 5.2.4.2 were not exceeded. • It is necessary to bake PLPS9, if any condition specified in Section 5.2.4.1 and Section 5.2.4.2 was exceeded.
Cinterion® PLPS9 Hardware Interface Description Page 107 of 125 5.3 Packaging 109 5.3 Packaging 5.3.1 Trays PLPS9 is shipped in 6x3 trays as illustrated in Figure 47. The figure also shows the proper module orientation in the trays: The small round hole marking pad A1 is furthest away from the beveled corner of the tray. Figure 47: Shipping tray dimensions 5.3.
Cinterion® PLPS9 Hardware Interface Description Page 108 of 125 5.3 Packaging 109 Figure 48: Moisture Sensitivity Label PLPS9_HID_v00.
Cinterion® PLPS9 Hardware Interface Description Page 109 of 125 5.3 Packaging 109 MBBs contains two desiccant pouches to absorb moisture that may be in the bag. The humidity indicator card described below should be used to determine whether the enclosed components have absorbed an excessive amount of moisture. The desiccant pouches should not be baked or reused once removed from the MBB.
Cinterion® PLPS9 Hardware Interface Description Page 110 of 125 6 Regulatory and Type Approval Information 117 6 Regulatory and Type Approval Information 6.1 Directives and Standards PLPS9 has been designed to comply with the directives and standards listed below.
Cinterion® PLPS9 Hardware Interface Description Page 111 of 125 6.1 Directives and Standards 117 Table 33: Standards of European type approval ETSI EN 301 489-01 V2.1.1 Electromagnetic Compatibility (EMC) standard for radio equipment and services; Part 1: Common technical requirements; Harmonized Standard covering the essential requirements of article 3.
Cinterion® PLPS9 Hardware Interface Description Page 112 of 125 6.1 Directives and Standards 117 Table 35: Standards of the Ministry of Information Industry of the People’s Republic of China SJ/T 11363-2006 “Requirements for Concentration Limits for Certain Hazardous Substances in Electronic Information Products” (2006-06). SJ/T 11364-2006 “Marking for Control of Pollution Caused by Electronic Information Products” (2006-06).
Cinterion® PLPS9 Hardware Interface Description Page 113 of 125 6.2 SAR requirements specific to portable mobiles 117 6.2 SAR requirements specific to portable mobiles Mobile phones, PDAs or other portable transmitters and receivers incorporating a GSM module must be in accordance with the guidelines for human exposure to radio frequency energy.
Cinterion® PLPS9 Hardware Interface Description Page 114 of 125 6.3 Reference Equipment for Type Approval 117 6.3 Reference Equipment for Type Approval The Gemalto M2M general reference setup submitted to type approve PLPS9 is shown in the figure below: Figure 50 illustrates the setup for general tests and evaluation purposes. The evaluation module can be plugged directly onto an Audio Adapter. The GSM/UMTS/LTE/ GNSS test equipment is still connected via SMA connectors on the evaluation module.
Cinterion® PLPS9 Hardware Interface Description Page 115 of 125 6.4 Compliance with FCC and ISED Rules and Regulations 117 6.4 Compliance with FCC and ISED Rules and Regulations The Equipment Authorization Certification for the Gemalto M2M modules reference application described in Section 6.
Cinterion® PLPS9 Hardware Interface Description Page 116 of 125 6.4 Compliance with FCC and ISED Rules and Regulations 117 Table 38: Antenna gain limits for FCC and ISED for PLPS9-X Maximum gain in operating band FCC limit ISED limit All limits Unit 850MHz (GSM) 3.4 0.1 0.1 dBi 1900MHZ (GSM) 2.0 2.5 2.0 dBi Band II (UMTS) 7.5 7.5 7.5 dBi Band IV (UMTS) 4.7 7.3 4.7 dBi Band V (UMTS) 8.4 5.1 5.1 dBi Band 2 (LTE-FDD) 9.1 8.5 8.5 dBi Band 4 (LTE-FDD) 6.5 8.3 6.
Cinterion® PLPS9 Hardware Interface Description Page 117 of 125 6.4 Compliance with FCC and ISED Rules and Regulations 117 If Canadian approval is requested for devices incorporating PLPS9 modules the above note will have to be provided in the English and French language in the final user documentation. Manufacturers/OEM Integrators must ensure that the final user documentation does not contain any information on how to install or remove the module from the final product.
Cinterion® PLPS9 Hardware Interface Description Page 118 of 125 7 Document Information 122 7 Document Information 7.1 Revision History Preceding document: "Cinterion® PLPS9 Hardware Interface Description" v00.052 New document: "Cinterion® PLPS9 Hardware Interface Description" v00.052a Chapter What is new 4.2.2 Revised signal states for GPIO11 and GPIO19. 6.1 Updated NAPRD and GCF standard versions in Table 32 and Table 33. New document: "Cinterion® PLPS9 Hardware Interface Description" v00.
Cinterion® PLPS9 Hardware Interface Description Page 119 of 125 7.2 Related Documents 122 7.2 [1] [2] [3] [4] [5] Related Documents PLPS9 AT Command Set PLPS9 Release Note Application Note 48: SMT Module Integration Universal Serial Bus Specification Revision 3.0 Universal Serial Bus Specification Revision 2.0 7.
Cinterion® PLPS9 Hardware Interface Description Page 120 of 125 7.
Cinterion® PLPS9 Hardware Interface Description Page 121 of 125 7.
Cinterion® PLPS9 Hardware Interface Description Page 122 of 125 7.4 Safety Precaution Notes 122 7.4 Safety Precaution Notes The following safety precautions must be observed during all phases of the operation, usage, service or repair of any cellular terminal or mobile incorporating PLPS9. Manufacturers of the cellular terminal are advised to convey the following safety information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product.
Cinterion® PLPS9 Hardware Interface Description Page 123 of 125 8 Appendix 124 8 Appendix 8.
Cinterion® PLPS9 Hardware Interface Description Page 124 of 125 8.1 List of Parts and Accessories 124 Table 40: Molex sales contacts (subject to change) Molex For further information please click: http://www.molex.com Molex Deutschland GmbH Otto-Hahn-Str. 1b 69190 Walldorf Germany Phone: +49-6227-3091-0 Fax: +49-6227-3091-8100 Email: mxgermany@molex.com American Headquarters Lisle, Illinois 60532 U.S.A.
About Gemalto Since 1996, Gemalto has been pioneering groundbreaking M2M and IoT products that keep our customers on the leading edge of innovation. We work closely with global mobile network operators to ensure that Cinterion® modules evolve in sync with wireless networks, providing a seamless migration path to protect your IoT technology investment.
