Datasheet

PRODUCTPREVIEW
AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
www.ti.com
SPRS717E OCTOBER 2011REVISED JANUARY 2013
AM335x ARM
®
Cortex™-A8 Microprocessors (MPUs)
Check for Samples: AM3359, AM3358
1 Device Summary
1.1 Features
1234567
32KB of L1 Data Cache with Single Error-
Highlights
Detection (parity)
Up to 800-MHz ARM
®
Cortex™-A8 32-Bit
256KB of L2 Cache with Error Correcting
RISC Microprocessor
Code (ECC)
NEON™ SIMD Coprocessor
176KB of On-Chip Boot ROM
32KB of L1 Instruction and 32KB Data
64KB of Dedicated RAM
Cache with Single-Error Detection (parity)
Emulation and Debug
256KB of L2 Cache with Error Correcting
Code (ECC) JTAG
mDDR(LPDDR), DDR2, DDR3, DDR3L Embedded Trace Module
Support
Embedded Trace Buffer
General-Purpose Memory Support (NAND,
Interrupt Controller (up to 128 interrupt
NOR, SRAM) Supporting Up to 16-bit ECC
requests)
SGX530 3D Graphics Engine
On-Chip Memory (Shared L3 RAM)
LCD and Touchscreen Controller
64 KB of General-Purpose On-Chip Memory
Programmable Real-Time Unit and Industrial Controller (OCMC) RAM
Communication Subsystem (PRU-ICSS)
Accessible to all Masters
Real-Time Clock (RTC)
Supports Retention for Fast Wake-Up
Up to Two USB 2.0 High-Speed OTG Ports
External Memory Interfaces (EMIF)
with Integrated PHY
mDDR(LPDDR), DDR2, DDR3, DDR3L
10, 100, 1000 Ethernet Switch Supporting Up
Controller:
to Two Ports
mDDR: 200-MHz Clock (400-MHz Data
Serial Interfaces Including:
Rate)
Two Controller Area Network Ports (CAN)
DDR2: 266-MHz Clock (532-MHz Data
Six UARTs, Two McASPs, Two McSPI, Rate)
and Three I2C Ports
DDR3: 303-MHz Clock (606-MHz Data
12-Bit Successive Approximation Register Rate)
(SAR) ADC
DDR3L: 303-MHz Clock (606-MHz Data
Up to Three 32-Bit Enhanced Capture Rate)
Modules (eCAP)
16-Bit Data Bus
Up to Three Enhanced High-Resolution PWM
1 GB of Total Addressable Space
Modules (eHRPWM)
Supports One x16 or Two x8 Memory
Crypto Hardware Accelerators (AES, SHA,
Device Configurations
PKA, RNG)
General-Purpose Memory Controller (GPMC)
Flexible 8-Bit and 16-Bit Asynchronous
MPU Subsystem
Memory Interface with Up to seven Chip
Up to 800-MHz ARM
®
Cortex™-A8 32-Bit Selects (NAND, NOR, Muxed-NOR, SRAM)
RISC Microprocessor
Uses BCH Code to Support 4-Bit, 8-Bit, or
NEON™ SIMD Coprocessor 16-Bit ECC
32KB of L1 Instruction Cache with Single- Uses Hamming Code to Support 1-Bit
Error Detection (parity) ECC
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2SmartReflex, DSP/BIOS, XDS are trademarks of Texas Instruments.
3Cortex, NEON are trademarks of ARM Ltd or its subsidiaries.
4ARM is a registered trademark of ARM Ltd or its subsidiaries.
5EtherCAT is a registered trademark of EtherCAT Technology Group.
6POWERVR SGX is a trademark of Imagination Technologies Limited.
7All other trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the formative or design phase of
Copyright © 2011–2013, Texas Instruments Incorporated
development. Characteristic data and other specifications are design goals. Texas
Instruments reserves the right to change or discontinue these products without notice.

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