LE866 PSM Application Note [01.2017] 80471NT11483A Rev. 2 – 2017-06-06 Mod. 0809 2017-01 Rev.
SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE NOTICE While reasonable efforts have been made to assure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from use of the information obtained herein. The information in this document has been carefully checked and is believed to be reliable. However, no responsibility is assumed for inaccuracies or omissions.
USAGE AND DISCLOSURE RESTRICTIONS I. License Agreements The software described in this document is the property of Telit and its licensors. It is furnished by express license agreement only and may be used only in accordance with the terms of such an agreement. II. Copyrighted Materials Software and documentation are copyrighted materials. Making unauthorized copies is prohibited by law.
APPLICABILITY TABLE PRODUCTS LE866-SV1 LE866A1-KK LE866A1-NA LE866A1-JS 80471NT11483A Rev.
CONTENTS NOTICE ..................................................................................................... 2 COPYRIGHTS ................................................................................................ 2 COMPUTER SOFTWARE COPYRIGHTS ...................................................... 2 USAGE AND DISCLOSURE RESTRICTIONS ............................................... 3 I. License Agreements ..................................................................... 3 II.
4.5.3. SIM Lines control ........................................................................ 19 Enter and Exit from PSM States ................................................. 20 5. GLOSSARY AND ACRONYMS ................................................. 22 6. DOCUMENT HISTORY .............................................................. 23 80471NT11483A Rev.
1. INTRODUCTION Scope The LE866 includes unique advanced features in order to support the PSM according to 3GPP Rel-12. The aim of this document is the description of the suggested Application design to use this functionality. Audience This document is intended for Telit customers, who are integrators, about to implement their applications using our LE866 modules.
Text Conventions Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur. Caution or Warning – Alerts the user to important points about integrating the module, if these points are not followed, the module and end user equipment may fail or malfunction. Tip or Information – Provides advice and suggestions that may be useful when integrating the module. All dates are in ISO 8601 format, i.e. YYYY-MM-DD.
2. OVERVIEW The aim of this document is the description of some hardware solutions useful for developing a product with the Telit LE866 module. In this document all the basic functions of a mobile phone will be taken into account; for each one of them a proper hardware solution will be suggested and eventually the wrong solutions and common errors to be avoided will be evidenced. Obviously this document cannot embrace the whole hardware solutions and products that may be designed.
3. PSM DESCRIPTION The Power Saving Mode (PSM) in 3GPP Rel12 allows the Module to skip idle mode tasks for a longer time period while still maintaining the NAS context. This feature permits to reduce the overall power consumption when there is no required data activity with the network for a long time. This saves the power also related to the Paging activity. The PSM reduces the signaling load between the LE866 and the network on NAS level (24.301 Rel.12 chapter 5.3.
4. PINS ALLOCATION PIN list for PSM Mode Pin Signal I/O Function Type Comment PSM Control Lines D3 PSM_WAKE I Wake Up from PSM Mode Analog E8 PSM_STATUS O PSM Status CMOS 1.8V F8 PSM_ENA_OUT O PSM Enable for external LDOs CMOS 1.8V SIM card interface C7 SIMVCC - External SIM signal – Power supply for the SIM 1.8V Only B7 SIMRST O External SIM signal – Reset CMOS 1.8 A7 SIMCLK O External SIM signal – Clock CMOS 1.
Power Supply E2 VBATT - Main power supply (Baseband) Power E0 VBATT_PA - Main power supply (Radio PA) Power E1 VBATT_PA - Main power supply (Radio PA) Power B0 GND - Ground Power D0 GND - Ground Power F0 GND - Ground Power G0 GND - Ground Power D1 GND - Ground Power F1 GND - Ground Power G1 GND - Ground Power D2 GND - Ground Power F2 GND - Ground Power C3 GND - Ground Power E3 GND - Ground Power F3 GND - Ground Power G3 GND - Grou
LGA Pads Layout TOP VIEW A B C D E F G 0 RESERVED GND DIV ANT GND VBATT_PA GND GND 1 C105/RTS C106/CTS TX AUX GND VBATT_PA GND GND 2 C108/DTR C109/DCD RX AUX GND VBATT GND MAIN ANT 3 C107/DSR C125/RING GND PSM_WAKE GND GND GND 4 C103/TXD GPIO_06 GPIO_07 RESERVED DAC_OUT ADC_IN1 RESET* 5 C104/RXD GPIO_05 GPIO_01 GPIO_04 USB_D+ RESERVED RESERVED 6 SIMIO RESERVED GPIO_02 GPIO_03 USB_D- GND VAUX/PWR MON 7 SIMCLK SIMRST SIMVCC RESERVED RESERVED
PSM SIGNALS DETAIL 4.3.1. PSM_WAKE PSM_WAKE is the only pin that can wake the system from the PSM Mode. It is normally Low and should be set to High to wake up the module. NOTE: The pin requires to add a pull down resistor on the application. 4.3.2. PSM_STATUS PSM_STATUS is a GPIO controlled by SW that is low during the PSM mode and high during regular operation. This pin is used for the LE866/Host Controller protocol when entering/exiting PSM state. 4.3.3.
Logic Levels Specification ABSOLUTE MAXIMUM RATINGS: Parameter Min Max Input level on any digital pin (CMOS 1.8) with respect to ground -0.3V VDDIO_IN +0.3V Input level on any digital pin (CMOS 1.8) with respect to ground when VDDIO is not supplied -0.3V 0.3V Min Max Input high level 1.55V 1.9V Input low level 0V 0.35V Output high level 1.35V 1.8V Output low level 0V 0.8V OPERATING RANGE - INTERFACE LEVELS (1.8V CMOS): Parameter WARNING: If VDDIO_IN line is not powered (i.e.
General Design Rules The principal guidelines for the PSM Design embrace three different design steps: • • • 4.5.1. the Power supply the Digital IOs supply and control the SIM Interface latches. Power Supply Guidelines The below figure shows the recommended circuit: For additional details please refer to the LE866 HW User Guide 80471NT11483A Rev.
4.5.2. Digital IOs Supply Guidelines The Digital IO section requires to be supplied applying a 1.8V power supply to the VDDIO_IN input. In a normal Application design, this is done connecting the VDDIO_IN to the VAUX/PWRMON line. Using this supply line we have two effects: • • When in PSM=2 the VAUX is switched off so the Host has to ensure to avoid applying any high logic level to the IOs that could damage the module.
In systems that cannot ensure that no voltage will be applied to the LE866 IOs during PSM status, the VDDIO_IN line should be kept supplied. The LE866 lowest power consumption can be achieved powering the VDDIO_IN externally (allowing all other LE866 power supplies to be disabled). This could be done using for example an LDO with a low quiescent current (i.e.
4.5.3. SIM Lines control In order to ensure the 3GPP Rel.12 compliance when using the SIM in PSM states it is suggested to use two latches on the SIM_RST and SIM_CLK lines. The two latches are enabled by the PSM_STATUS line. 80471NT11483A Rev.
Enter and Exit from PSM States Since the LE866 outputs become inputs\non-defined during the PSM states, the module and the host should follow a specific protocol to ensure the proper system operation: • • • • • • LE866 notifies the host before going into a PSM state by setting PSM_STATUS low Host makes proper preparations and notifies the LE866 he is allowed to enter the PSM state by setting the PSM_WAKE low (this could be avoided if a pull down resistor is added to the PSM_WAKE line) LE866 enters in PSM s
The following diagram shows the process of PSM enter/exit due to RTC request: 80471NT11483A Rev.
5. GLOSSARY AND ACRONYMS Description TTSC Telit Technical Support Centre USB Universal Serial Bus HS High Speed DTE Data Terminal Equipment LTE Long Term Evolution PSM Power Saving Mode according to 3GPP Rel.
6. DOCUMENT HISTORY Revision Date Changes 0 2016-07-26 Preliminary Version 1 2016-12-22 Updated 1.4, 4.3, 4.4, 4.5.2 2 2017-06-06 2017 Template Applied 80471NT11483A Rev.
[01.2017] Mod. 0809 2017-01 Rev.
