Technical Manual

6-1
Vocoder and Controller
Boards Detailed Theory
of Operation
6
Introduction to This
Section
This section of the manual provides a detailed circuit description of
the ASTRO Digital XTS 3000 vocoder and controller boards. When
reading the theory of operation, refer to your appropriate schematic
and component location diagrams located in the back section of this
manual. This detailed theory of operation will help isolate the
problem to a particular component.
General
The controller board is the central interface among the various
subsystems of the radio. It is very similar to the digital logic portion of
the controllers on many existing Motorola radios. Its main task is to
interpret user input, provide user feedback, and schedule events in the
radio operation, and includes programming ICs, steering the activities
of the DSP, and driving the display.
The vocoder board performs the functions which were previously
performed by analog circuitry. This includes all tone signaling,
trunking signalling, conventional analog voice, etc. All analog signal
processing is done digitally utilizing a DSP56001. In addition, the
vocoder board provides a digital voice-plus-data capability, utilizing
VSELP or IMBE voice compression algorithms. Vocoder is a general
term used to refer to these DSP based systems and is short for voice
encoder.
The vocoder and controller boards are connected through a 50-pin
compression connector; they provide interconnection among the
microcontrol unit (MCU), the DSP, and (on secure-equipped radios)
the encryption board.
Vocoder Board
Refer to Figure 6 and the appropriate schematic diagram.
The vocoder board consists of a digital signal processor (DSP — U405),
32k x24 static-RAM (SRAMs — U401, U402, and U403), a 256kB FLASH
ROM (U404), and an ABACUS/DSP support IC (ADSIC — U406).
The FLASH ROM (U404) contains the program code executed by the
DSP. As with the FLASH ROM used on the controller board, the FLASH
ROM is reprogrammable, so new features and algorithms can be
updated in the field as they become available. Depending on the mode
and operation of the DSP, corresponding program code is moved from
the FLASH ROM into the faster SRAM, where it is executed at full bus
rate.

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