User Manual

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July 2017 DocID029132 Rev 2 1/25

UM2042

User manual

Discovery kit for the ST25R3911B

high performance HF reader / NFC initiator

Introduction

The ST25R3911B-DISCO is a ready-to-use development kit to evaluate the functions of the

high performance HF reader / NFC initiator ST25R3911B in Reader mode for contactless

applications.

The ST25R3911B-DISCO kit supports

• ISO 18092 (NFCIP-1) active P2P

• ISO 14443A and ISO14443B

• ISO 15693

• FeliCa™

• VHBR, with 6.8 Mbit/s PCD to PICC framing and 3.4 Mbit/s PICC to PCD framing

• Up to 1.4 W output power with differential antenna

• Possibility of driving two antennas in single ended mode, with automatic antenna tuning

(AAT) system

• Inductive and capacitive Wake-up

• User selectable and automatic gain control

• Transparent and Stream modes to implement MIFARE

Classic compliant or other

custom protocols

The evaluation kit includes

• the STM32L476RET6, a 32-bit microcontroller with 512 KB of Flash memory

• a 105 mm x 52 mm, two turns antenna etched on the PCB, and its VHBR tuning circuit

• a Micro-USB connector for communication with the host PC and board powering

• six LEDs indicating the presence of the RF field and of the protocol used to communicate.

Figure 1. ST25R3911B-DISCO PCB (top view)

www.st.com

Summary of content (25 pages)

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UM2042 User manual Discovery kit for the ST25R3911B high performance HF reader / NFC initiator Introduction The ST25R3911B-DISCO is a ready-to-use development kit to evaluate the functions of the high performance HF reader / NFC initiator ST25R3911B in Reader mode for contactless applications. The ST25R3911B-DISCO kit supports • ISO 18092 (NFCIP-1) active P2P • ISO 14443A and ISO14443B • ISO 15693 • FeliCa™ • VHBR, with 6.8 Mbit/s PCD to PICC framing and 3.4 Mbit/s PICC to PCD framing • Up to 1.
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Contents UM2042 Contents 1 2 Quick start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Getting started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 System requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Block diagram . . . . . .
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UM2042 List of tables List of tables Table 1. Table 2. NFC Forum matching alternatives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of figures UM2042 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. 4/25 ST25R3911B-DISCO PCB (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Schematics overview . . . . . . . . . . . . . . . . . . . . . . . . . . .
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UM2042 1 Quick start Quick start The ST25R3911B-DISCO is connected to a PC via USB to show the features of the ST25R3911B chip. To do so, use the software STSW-ST25R001 to control all the functions of the discovery kit. 1.1 Getting started Connect the discovery kit to a PC using a micro USB cable. The USB port of the PC must be capable of delivering at least 250 mA at 5 Volt supply. To control the board, download the software STSW-ST25R001 from www.st.com and install it.
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Hardware 2 UM2042 Hardware The PCB (Printed Circuit Board) is connected via USB to the PC. The STSW-ST25R001 PC software controls the STM32 MCU located on the PCB. The STM32 MCU then operates the ST25R3911B via SPI. The ST25R3911B is connected directly to the 5 V supply of the USB bus. An LDO converts this voltage down to 3.3 V, to supply the microcontroller. A green LED close to the USB plug indicates if the board is powered.
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UM2042 2.2.1 Hardware USB connectivity and power supply The ST25R3911B-DISCO board can be connected via USB to a host device. Right behind the Micro-USB plug, an ECMF02 common mode filter with ESD protection for USB 2.0 interface is placed. The common mode filter is connected to VBUS and to the D+/D- data lines of the USB. All the USB terminals are ESD-protected by the built-in ESD diodes of the ECMF02. Additionally, the power supply filter for the 5 V supplies the 3.
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Hardware 2.2.4 UM2042 Antenna and matching network components This schematic contains the matching network and the automatic antenna tuning capacitors, as well as the alternative NFC Forum matching components. In the default configuration, the ST25R3911B-DISCO is populated with a VHBR matching, with communication speeds up to 3.4 Mbps. To support VHBR, the antenna is matched to a system Q-Factor of 8. By switching to the NFC Forum matching components the system Q-Factor is increased to 16.
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DocID029132 Rev 2 1 2 SPI/Power_Con Antenna_Con 3 Date: 31.05.2017 Time: 10:09:36 File: Project Overview.SchDoc 3 A4 Size: Number: ST25R3911B-DISCO Title B1 Sheet 3 of 7 Revision: Antenna_Con U_Antenna Antenna.SchDoc MDG NFC & Reader Competence Center B A 4 D SPI/Power_Con U_ST25R3911B ST25R3911B.SchDoc 4 D PM/USB_con U_Microcontroller Microcontroller.SchDoc 3 C PM/USB_con U_Power Management Power Management.SchDoc 2 C B A 1 Figure 3.
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D C B 1 GND C_1μ_0603_X5R C104 V_RF 3V3 LDO μUSB GND ID D+ D- P101 PWR Shield 6 A 1 EN VI 4 4 D+ D- NC VO 5 4 5 8 7 6 GND ID GND ECMF02-4CMX8 D+ D- U101 VBUS GND LD39050PU33R 3 PG 3 3 U102 2 2 5 1 1 6 USB Interface 1 GND 2 DocID029132 Rev 2 GND 10/25 0 C105 J101 closed 0R L102 FB_0603_0R 2 C_2μ2_0402_X5R C106 3V3 GND C_10n_0402_X7R USBD_P USBD_N 2 L103 FB_0603_0R GND C102 C103 4 3 B1 Sheet 4 of 7 Revision: USBD_P USBD_N V_RF 3_3V PM/USB
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D C B A C210 C211 Pin 47+48 PC8 PC9 PC10 PC11 PC12 PC13 PC14 - OSC32_IN PC15 - OSC32_OUT 32 64 48 19 AVDD 13 1 5 6 C213 39 40 51 52 53 2 3 4 PD2 VSSA NRST BOOT0 C214 Pin 1 STM32L476RE C215 5 C216 Pin 12+13 AVDD 1 2 AVDD SCL SDA 31 63 47 18 54 12 7 60 LED4 LED5 /SS_MCU T_SWO LED3 AVDD VDD VSS/VCAP1 VDD VSS VDD/VUSB/VSA/PF7VSS/VCAP2/PF6 VDD/PF5 VSS/PF4/PA3 VDDA/VREF+ VBAT/VLCD PF0/PD0/PH0 - OSC_IN PF1/PD1/PH1 - OSC_OUT U201B Pin 63+64 Pin 31+32 C212 FB_0603 L201 PC0 P
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D C B A P301 P302 GND d.n.p. GND GND 3 GND d.n.p. GND GND 2 2 1 GND R306 C306 GND R307 C_12p_0402 C_12p_0402 C305 CSI_out CSO_out SEN_11 MISO_11 MOSI_11 SCLK_11 INTR_11 d.n.p.
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DocID029132 Rev 2 D C B A Antenna_Con 1 2 TRIM1_0 TRIM1_1 TRIM1_2 TRIM1_3 TRIM2_0 TRIM2_1 TRIM2_2 TRIM2_3 RFO1 RFO2 RFI1 RFI2 Antenna_Con TRIM1_0 TRIM1_1 TRIM1_2 TRIM1_3 TRIM2_0 TRIM2_1 TRIM2_2 TRIM2_3 RFO1 RFO2 RFI1 RFI2 RFI2 TRIM2 RFO2 RFO1 TRIM1 RFI1 1 2 J403 TRIM2_3 TRIM2_2 TRIM2_1 TRIM2_0 TRIM1_1 TRIM1_0 2 C421 C_56p_0402 TRIM1_3 C407 C404 d.n.p. d.n.p.
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Hardware UM2042 2.3 PCB layout 2.3.1 PCB overview The PCB (see Figure 8) is organized in two halves • Left side: the SPI header P204 and the digital / MCU sections • Right side: the analog parts and the ST25R3911B. The whole PCB is surrounded by a two turns NFC antenna. Figure 8. PCB overview 8$57 /'2 9 63, 67 5 % 0DWFKLQJ FRPSRQHQWV 86% 670 / -7$* 6:' , & 1)& )RUXP PDWFKLQJ 06 9 The boot button can be found right above the I2C header.
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UM2042 Hardware Top layer The top layer (Figure 9) contains most of the components and PCB traces. The unused areas around the ICs are filled with GND planes, guarded using via stitching. Furthermore, important analog traces are surrounded by GND vias. Mid layer 1 This layer (Figure 10) is a pure GND plane, providing a low ohmic DC path for the GND connection. Mid layer 2 Mid layer 2 (Figure 11) is used for the power distribution.
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UM2042 Figure 9.
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Hardware Figure 10.
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UM2042 Figure 11.
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Hardware Figure 12.
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Antenna matching 3 UM2042 Antenna matching The default matching network assembled enables VHBR operation up to 3.4 Mbps. Components for an optional NFC Forum matching are placed on the board. Exchanging the components as indicated in Table 1 will increase the Q factor of the antenna system. VHBR communication at 3.4 Mbps and 1.7 Mbps bit rate will not be supported anymore, but the read range for lower data rate applications will increase, up to 20%.
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UM2042 Antenna matching Table 1. NFC Forum matching alternatives Default assembly Value NFC Forum replacement Value C403 80 pF C403_NFCF 120 pF C410 180 pF C410_NFCF 120 pF R401 3R9 R401_NFCF 1R96 R402 3R9 R402_NFCF 1R96 With the new assembled values, the matching impedance looks as in Figure 14, with a value close to 11 + j6 . Figure 14. NFC Forum matching with an AAT setting of 11 The HW based AAT algorithm will typically adjust to an AAT value of 11.
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Federal Communications Commission (FCC) and Industry Canada (IC) compliance statements 4 Federal Communications Commission (FCC) and Industry Canada (IC) compliance statements 4.1 FCC Compliance Statement 4.1.1 Part 15.19 This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. 4.1.
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UM2042Federal Communications Commission (FCC) and Industry Canada (IC) compliance state- 4.2.2 Declaration de Conformité Le présent appareil est conforme aux CNR d’Industrie Canada applicables aux appareils radio exempts de licence. L’exploitation est autorisée aux deux conditions suivantes: (1) l’appareil ne doit pas produire de brouillage, et (2) l’utilisateur de l’appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d’en compromettre le fonctionnement. 4.
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Revision history 5 UM2042 Revision history Table 2. Document revision history Date Revision 23-Jun-2017 1 Initial release. 2 Added Section 4.1.3: Part 15.105. Updated Section 4.1.4: FCC ID and Section 4.2.3: IC ID. Updated Figure 8: PCB overview, Figure 9: PCB layout, top layer and Figure 12: PCB layout, bottom layer.
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