Application Note DN[Document ID] AS7265x Multi Spectral Chipset Design Considerations ams Application Note [v1-5] 2018-May-23 Page 1 Document Feedback
AS7265x Design Considerations Content Guide 1 General Description ........................................................................................................... 3 2 AS7265x Multispectral Chipset .......................................................................................... 3 3 Hardware Design Considerations ...................................................................................... 4 3.1 UART Interface ..............................................................
AS7265x Design Considerations 1 General Description This Application Note briefly describes system level design considerations with ams AS7265x Multispectral Chipset solution. 2 AS7265x Multispectral Chipset AS7265x Multispectral Chipset consists of AS72651, AS72652, and AS72653 devices and each device has 6 optical filters so that AS7265x Multispectral Chipset have total 18 channels for spectral identification from 400nm to 1000nm with FWHM of 20nm.
AS7265x Design Considerations Figure 2.
AS7265x Design Considerations Figure 4.
AS7265x Design Considerations Figure 5.
AS7265x Design Considerations 3.1 UART Interface AS72651 has an UART interface to communicate to the controller. AT commands can be used for data acquisition, sensors configuration, and LED drivers control. Please refer to AS72651 data sheet for complete AT commands. Pin11 of AS72651 is the RX of UART, which AS72651 receives the information from the controller. Pin12 of AS72651 is the TX of UART, which AS72651 transmits the information to the controller.
AS7265x Design Considerations Please note, the typical schematic here is configured as UART interface by default so there are no pull-up resistors on AS72651 I2C slave interface. If I2C slave interface is needed, please add the pullup resistors on either the controller side or on AS72651 I2C interface. 3.3 Light Source Selection Figure 5.
AS7265x Design Considerations 3.5 PCB Layout Considerations AS72651/AS72652/AS72653 has same 20-pin LGA package sharing same PCB footprint. Figure 6. AS72651/AS72652/AS72653 PCB Footprint Recommendation The schematic symbol and PCB layout footprint can also be provided in Altium Design format. Please contact ams support team to get the library file. The PCB layout for AS72651/AS72652/AS72653 devices is simple.
AS7265x Design Considerations is minimized. The I2C bus specification also recommends that place VDD and/or GND between SDL and SDA if the traces are longer than 10cm. The length of I2C bus depends on the load of the bus and the speed you run at. The I2C bus specification defines the maximum capacitance of the bus is 400pF. This bus capacitance limit is specified to limit rise time reductions and allow operating at the rated frequency.
AS7265x Design Considerations AS72651 does not support the slave clock stretching mode. AS72651 has only three hardware based registers, STATUS (0x00), WRITE (0x01), and READ (0x02). The rest are implemented as virtual registers in the firmware. All virtual registers are accessed through WRITE and/or READ registers. Please refer to the data sheets for complete set of virtual registers. 4.2 I2C Virtual Register Read To read an I2C virtual register, please follow the flow chart below. Figure 9.
AS7265x Design Considerations Figure 13. Sample Code of Reading a Virtual Register #define I2C_AS72XX_SLAVE_STATUS_REG 0x00 #define I2C_AS72XX_SLAVE_WRITE_REG 0x01 #define I2C_AS72XX_SLAVE_READ_REG 0x02 #define I2C_AS72XX_SLAVE_TX_VALID 0x02 #define I2C_AS72XX_SLAVE_RX_VALID 0x01 uint8_t i2cm_AS72xx_read(uint8_t virtualReg) { volatile uint8_t status, d ; while (1) { // Read slave I2C status to see if we can write the reg address.
AS7265x Design Considerations 4.3 I2C Virtual Register Write Writing to a virtual register is similar to the read. Figure 14. Flow Chart for Virtual Register Write Read STATUS I2C.Read Reg=0x00 TX_VALID bit = 1? Yes No Write the Virtual Reg Addr I2C.Write Reg=0x01 Data=0xXX|0x80 Note: 0xX X is the virtual register addres s Read STATUS I2C.Read Reg=0x00 TX_VALID bit = 1? Yes No Write the data I2C.
AS7265x Design Considerations Figure 17. Sample Code of Writing a Virtual Register void i2cm_AS72xx_write(uint8_t virtualReg, uint8_t d) { volatile uint8_t status; while (1) { // Read slave I2C status to see if we can write the reg address. status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG); if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0) // No inbound TX pending at slave. Okay to write now. break ; } // Send the virtual register address // (setting bit 7 to indicate a pending write).
AS7265x Design Considerations 5 Contact Information Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.
AS7265x Design Considerations 6 Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Information in this document is believed to be accurate and reliable.
AS7265x Design Considerations 7 Revision Information Changes from previous version to current revision 1-03 (2017-Mar-15) Updated Figure 2 Page 4 Added Light Source Selection and Optic Considerations 7, 9 Updated Moonlight with AS7265x Multispectral Chipset New generation of AS7265x firmware and hardware and splitting in gen 1 and 2 Note: Page numbers for the previous version may differ from page numbers in the current revision. Correction of typographical errors is not explicitly mentioned.
