SIGMA DESIGNS Windeo Reference Design Module USER GUIDE Title Windeo Reference Design module User Guide Document Number Product Authors Windeo Chipset Can Nguyen This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
SIGMA DESIGNS Windeo Reference Design Module User Guide Table of Contents 1. Introduction...........................................................................................................................................3 1.1 Sigma Chip set 1.1.1 Baseband Chip 1.1.2 RF chip 1.2 Main External Components 2. Theory of Operation .............................................................................................................................4 2.1 Transmit section 2.1.
SIGMA DESIGNS Windeo Reference Design Module User Guide 1. Introduction This user’s guide provides information for operating the Windeo Reference Design Module. This Reference board is the RF/Baseband UWB Transceiver using Sigma Windeo Chipset. The Windeo chip set is based on the Wimedia Aliance Multi-band OFDM (MBOA) PHY v1.1 and MAC v1.
SIGMA DESIGNS Windeo Reference Design Module User Guide 2. Theory of operation Figure 1 Windeo Block Diagram 2.1 2.1.1 Transmit section: Baseband Transmitter 2.1.1.1 MAC Packet Transmission If the host is PCI, then Windeo supports a multi-packet and multi-fragment gather process. There are no restrictions on the size or alignment of any of the packet buffer fragments. Furthermore, fragmentation on one MSDU or MCDU (if needed) is supported through the effort of both the HW and the CPU.
Windeo Reference Design Module User Guide SIGMA DESIGNS 9.Once the entire packet has been transmitted to the PHY and if no-ACK is indicated, MacTxDma informs CPU of the completion of the transmission. In response, the CPU would pop the queue entry and write the cell pointers to release buffer so that hardware can put them back to free pool of pointers. If IMM-ACK is indicated, then TX_EN is deasserted and RX_EN is asserted. Within a specified time interval, the expected ACK packet should arrive.
SIGMA DESIGNS Windeo Reference Design Module User Guide 2.2. Receive section: 2.2.1. RF receiver The B7CW101 contains 3 receive channels. Each of the receiver channels provides both I and Q outputs and contains an LNA (Low Noise Amplifier), down-converters, I and Q base-band filters, variable gain amplifiers (VGA’s) and a final fixed gain block. All inputs and outputs are differential. Each side of the differential RF input is nominally 50 Ohms.
SIGMA DESIGNS Windeo Reference Design Module User Guide •Descrambling •Header decoding •Receive signal strength calculation and reporting to MAC •Link quality (SNR) calculation and reporting to MAC •Error reporting to MAC 2.2.2.2 MAC Packet Reception The Windeo supports a receive process where the incoming packets from the PHY are moved to the system memory buffers. The basic receive process is as follows. 1.While receiving an incoming packet, the MAC performs FCS check on the fly. 2.
Windeo Reference Design Module User Guide SIGMA DESIGNS 4. Test Configuration GND Flash 5 R R BBan R SW T/R Res USB Blaster C LeCroy/Spectrum R A M A DU Head B C9 Windeo Mini Figure 2. TX test Setup USB USB GND Windeo Mini C9 Flash B Head C Res R SW R BBan R A 5 BBan R SW Combiner R R A M DU T/R Res C Head B Flash GND R A M A R T/R DU 5 C9 1/10dB step Atten Windeo Mini Figure 3.
SIGMA DESIGNS Windeo Reference Design Module User Guide 5. Basic Test Procedure 1) Connect the DUT as shown in Fig.7 for TX quality test and Fig. 8 for TX/RX PER test .
