FSC-BT826 FSC-BT826 4.0 Dual Mode Bluetooth Module Data Sheet Document Type: FSC-BT826 Document Version: V1.4 Release Date: Aug. 06. 2016 Shenzhen Feasycom Technology Co.,Ltd. Telephone: 86-755-27924639 www.feasycom.com 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT826 Release Record Version Number Revision 1.0 Revision 1.1 Revision 1.2 Release Date 2014-11-5 2015-09-09 2016-03-24 Revision 1.3 2016-04-16 Revision 1.4 2016-08-06 深圳市飞易通科技有限公司 Comments First Release 1, Modified BT Status for 33 pin, 2, Modify the application circuit diagram. 1, Modify the Pin 9 ,10 , 14, 16 , 17,28,31 function definition. 2, Modify the application circuit diagram. 3, This version of the specification is applicable to V1.2 version of the PCB.
FSC-BT826 1. INTRODUCTION FSC-BT826 is a fully integrated Bluetooth module that complies with Bluetooth 4.0 dual mode protocols(BR/EDR/BLE). It supports SPP, BLE, ANCS, iBeacon, profiles. It integrates Baseband controller in a small package（Integrated chip antenna）, so the designers can have better flexibilities for the product shapes. FSC-BT826 can be communicated by UART port. With Feasycom’s Bluetooth stack, Customers can easily transplant to their software.
FSC-BT826 2. GENERAL SPECIFICATION General Specification Chip Set Realtek RTL8761 Product ID FSC-BT826 Dimension 13mm x 26.9mm x 2mm Bluetooth Specification Bluetooth V4.0 (Dual Mode) Power Supply 3.3 Volt DC Output Power 5.5 dBm Sensitivity -82dBm@0.1%BER Frequency Band 2.402GHz -2.480GHz ISM band Modulation FHSS,GFSK,DPSK,DQPSK Baseband Crystal OSC 40MHz 1600hops/sec, 1MHz channel space,79 Hopping & channels Channels(BT 4.
FSC-BT826 3. PHYSICAL CHARACTERISTIC FSC-BT826 dimension is 26.9mm(L)x13mm(W)x2mm(H). Figure 2：Package Dimensions（TOP VIEW） 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT826 4. PIN DEFINITION DESCRIPTIONS * Special tips: PIO0,PIO1,PIO2,PIO3 I/O port for reuse. When using the OTA function upgrade (air), please send the I/O mouth dangling; If the I/O port to connect the MCU, then set the MCU I/O ports for the input port or high impedance state.
FSC-BT826 8 PCM_SYNC Bi-directional Synchronous data Sync Host MCU change UART transmission mode. (Default) If current UART transmission mode is command mode, one low pulse with 80ms duration low signal will change 9 Tran/AIO0 I/O UART transmission mode to throughput mode, and another low pulse could change UART transmission mode back to command mode. Otherwise it will be set as high always. Analogue programmable I/O line. Host MCU disconnect bluetooth.
FSC-BT826 PIO3 26 Programmable input/output line I/O * The I/O port for reuse. Programmable input/output line 27 PIO4 I/O Alternative Function: BT Power Mode, low level in run mode, it will be set to high level when fall asleep. 28 PIO5 29 PIO6 30 PIO7 31 PIO8 I/O PIO9 I/O PIO10 I/O PIO11 I/O 32 33 34 I/O With the use of the Pin 9.
FSC-BT826 Default Data Format Property Possible Values BCSP-Specific Hardware Enable Baudrate 115. 2 Kbps Flow Control None Data bit length 8bit Parity None Number of Stop Bits 1 Table 4 I2C Interface 5.2 2 ◆ Up to two I C bus interfaces can support both master and slave mode with a frequency up to 400KHZ. ◆ Provide arbitration function, optional PEC(packet error checking) generation and checking. ◆ Supports 7 –bit and 10 –bit addressing mode and general call addressing mode.
FSC-BT826 ◆ Supports Master and Slave mode ◆ Programmable long/short Frame Sync ◆ Supports 8-bit A-law/µ-law, and 13/16-bit linear PCM formats ◆ Supports sign-extension and zero-padding for 8-bit and 13-bit samples ◆ Supports padding of Audio Gain to 13-bit samples ◆ PCM Master Clock Output: 64, 128, 256, or 512kHz ◆ Supports SCO/ESCO link 5.4.1 PCM Format FrameSync is the synchronizing function used to control the transfer of DAC_Data and ADC_Data.
FSC-BT826 Figure 7：16-Bit Output Data with 8-Bit PCM Sample Data and Zero Padding Figure 8：16-Bit Output Data with 13-Bit PCM Sample Data and Sign Extension For 16-bit linear PCM output, 3-bit programmable audio gain value can be padded to 13-bit sample data. Figure 9：16-Bit Output Data with 13-Bit PCM Sample Data and Audio Gain 5.4.3 PCM Interface Timing Figure 10：PCM Interface (Long FrameSync) 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT826 Figure 11：PCM Interface (Short FrameSync) Table 5: PCM Interface Clock Specifications Table 6: PCM Interface Timing 5.4.4 PCM Interface Signal Levels The PCM signal level ranges from 1.8V to 3.3V. 深圳市飞易通科技有限公司 www.feasycom.
FSC-BT826 6. RECOMMENDED TEMPERATURE REFLOW PROFILE The re-flow profiles are illustrated in Figure 11 and Figure 12 below. Follow: IPC/JEDEC J-STD-020 C Condition: Average ramp-up rate(217℃ to peak):1~2℃/sec max. Preheat:150~200C,60~180 seconds Temperature maintained above 217℃:60~150 seconds Time within 5℃ of actual peak temperature:20~40 sec. Peak temperature:250+0/-5℃ or 260+0/-5℃ Ramp-down rate:3℃/sec.max.
FSC-BT826 2420C 2170C Figure 13 : Typical Lead-free Re-flow The soldering profile depends on various parameters according to the use of different solder and material. The data here is given only for guidance on solder re-flow. FSC-BT826 will withstand up to two re-flows to a maximum temperature of 245°C. 7. Reliability and Environmental Specification 7.1 Temperature test Put the module in demo board which uses exit power supply, power on the module and connect to mobile.
FSC-BT826 7.4 Drop test Free fall the module (condition built in a wrapper which can defend ESD) from 150cm height to cement ground, each side twice, total twelve times. The appearance will not be damaged and all functions OK. 7.5 Packaging information After unpacking, the module should be stored in environment as follows: Temperature: 25℃ ± 2℃ Humidity: <60% No acidity, sulfur or chlorine environment The module must be used in four days after unpacking. 8.
FSC-BT826 Figure 14: FSC-BT826 Restricted Area Following recommendations helps to avoid EMC problems arising in the design. Note that each design is unique and the following list do not consider all basic design rules such as avoiding capacitive coupling between signal lines. Following list is aimed to avoid EMC problems caused by RF part of the module. Use good consideration to avoid problems arising from digital signals in the design. Ensure that signal lines have return paths as short as possible.
FCC Statement： This device complies with part 15 of the FCC rules Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. NOTE: The manufacturer is not responsible for any radio or TV interference caused by unauthorized modifications to this equipment. Such modifications could void the user’s authority to operate the equipment.
and in the final product’s user manual: “This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interferences, and (2) this device must accept any interference received, including interference that may cause undesired operation.
