C a s s i o p e i a P l a t f o r m - M o d u l e C B 410 L Datasheet SEQUANS Communications 15-55 Boulevard Charles de Gaulle 92700 Colombes, France Phone. +33.1.70.72.16.00 Fax. +33.1.70.72.16.09 www.sequans.com contact@sequans.
Preface Legal Notices Copyright ©2019-2020, SEQUANS Communications All information contained herein and disclosed by this document is confidential and the proprietary property of SEQUANS Communications, and all rights therein are expressly reserved. Acceptance of this material signifies agreement by the recipient that the information contained in this document is confidential and that it will be used solely for the purposes set forth herein.
Document Revision History Revision ii Date Product Application 01 February 2019 First edition. 02 July 2019 Second edition. 03 August 2019 Third edition. 04 December 2019 Fourth edition. 05 January 2020 Fifth edition. 06 February 2020 Sixth edition. 07 March 2020 Seventh edition. See details in Changes in this Document on page iii.
About this Datasheet Purpose and Scope The CB410L is a complete LTE module including base-band, RF and memory, for CAT-4 devices for CBRS market. It meets also almost all requirements for M2M application such as automotive, metering, tracking system, security solutions, routers, wireless POS, mobile computing devices, among others. This document provides technical information about CB410L LCC module. CB410L is based on Sequans’ Cassiopeia platform.
References [1] Core technology specifications: • 3GPP E-UTRA 21 series Release 9 (EPS) • 3GPP E-UTRA 22 series Release 9 (IMEI) • 3GPP E-UTRA 23 series Release 9 (NAS, SMS) • 3GPP E-UTRA 24 series Release 9 (NAS) • 3GPP E-UTRA 31 series Release 9 (UICC) • 3GPP E-UTRA 33 series Release 9 (security) • 3GPP E-UTRA 36 series Release 9 (RAN) • 3GPP2 C.S0015-A v1.0 (SMS) • IETF, RFC 3261, 4861, 4862, 6434 For more information, see • ftp://ftp.3gpp.org/Specs/latest/Rel-9/21_series/ • ftp://ftp.3gpp.
Documentation Conventions This section illustrates the conventions that are used in this document. General Conventions Note Important information requiring the user’s attention. Caution A condition or circumstance that may cause damage to the equipment or loss of data. Warning A condition or circumstance that may cause personal injury. Italics Italic font style denotes • emphasis of an important word; • first use of a new term; • title of a document.
Table of Contents Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Legal Notices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii About this Datasheet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table of Contents Chapter 3 Signals and Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.1 CB410L Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.2 Notes on CB410L Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 High-Speed UARTs Flow Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 I2S/PCM Interface Signals . .
Product Overview 1 1.1 Product Features 1.1.1 Features Description Sequans CB410L module includes a baseband, a complete dual band RF front end, memory and required circuitry to meet 3GPP E-UTRA (Long Term Evolution - LTE, Release 9 set of specifications) and LTE UE specifications. It is compliant with CBRS networks operating on LTE band 48 (3550 MHz - 3700 MHz) in the USA. It can also operate on other networks operating on LTE band 42 (3400 MHz - 3600 MHz) and on LTE band 43 (3600 MHz - 3800 MHz).
PRODUCT OVERVIEW PRODUCT FEATURES The architecture block diagram of the CB410L is presented on Figure 1-1.
PRODUCT OVERVIEW PRODUCT FEATURES Table 1-1: General Features (Continued) Operation voltages • Vbat (range from 3.135 V to 5.5 V) Packaging • LCC module • 32 x 29 x 2.4 mm. 80 pads carrying useful signals on 134 pads in total.
PRODUCT OVERVIEW PRODUCT FEATURES Table 1-2: LTE Features (Continued) MAC • Random Access procedure in normal and special subframes • Scheduling Request, Buffer Status Reporting, and Power Headroom Reporting • Discontinuous reception (DRX) with long and short cycles • Fast scanning • Hosted configuration • Semi-persistent scheduling • IPv4, IPv6 • RoHC • Location based services • Advanced QoS features RLC • ARQ modes: UM, AM, and TM PDCP • Ciphering and deciphering: NULL, AES, SNOW 3G • Integrity and
PRODUCT OVERVIEW PRODUCT FEATURES 1.1.2 TDM-PCM Interface Specification The features of the CB410L’s TDM-PCM controller include: • Support of PCM slave mode with PCM_CLK input and PCM_FS input.
PRODUCT OVERVIEW FCC INTERFERENCE STATEMENT 1.2 FCC Interference Statement FCC ID for CB410L module is 2AAGMCB410L. This following statement applies to all products based on CB410L supporting Band 48 that would be deployed in CBRS network in USA. This device complies with Part 15 of the FCC Rules.
PRODUCT OVERVIEW FCC INTERFERENCE STATEMENT KDB 996369 D03 OEM Manual v01 rule sections: 2.2 List of applicable FCC rules This module has been tested for compliance to FCC Part 96 CBRS as an End User Device. 2.3 Summarize the specific operational use conditions The module is tested for standalone mobile RF exposure use condition.
PRODUCT OVERVIEW FCC INTERFERENCE STATEMENT 2.10 Additional testing, Part 15 Subpart B disclaimer This transmitter module is tested as a subsystem and its certification does not cover the FCC Part 15 Subpart B (unintentional radiator) rule requirement applicable to the final host. The final host will still need to be reassessed for compliance to this portion of rule requirements if applicable. As long as all conditions above are met, further transmitter test will not be required.
Physical Characteristics 2 2.1 ECCN and Part Number The ECCN of the CB410L is 5A992.c. CCATS number is G180697. The following comment from licensing officer is reported on the license information: • This encryption item is described in paragraph b to Note 3 (Mass Market Note) of Category 5 Part 2. It is authorized for export and reexport under section 740.17(b)(3) of the Export Administration Regulations.
PHYSICAL CHARACTERISTICS ELECTRICAL OPERATING CONDITIONS 2.2 Electrical Operating Conditions 2.2.1 Detailed Information Table 2-2presents the electrical operating conditions for the CB410L module. Table 2-2: Electrical Operating Conditions Direction Minimum Typical Maximum VBAT (recommended for performance) In 3.3 V 4.42 V VBAT (functional) In 3.135 V 5.5 V SIM_VCC (1.8 V or 3.0 V) Out 1.62 V 1.8 V 1.98 V 2.7 V 3.0 V 3.3 V 1.71 V 1.8 V 1.89 V 1V8 See note below.
PHYSICAL CHARACTERISTICS POWER SUPPLY DIMENSIONING 2.4 Power Supply Dimensioning Table 2-3 presents peak power consumptions (in worst case conditions) in order to help designers with the power supply dimensioning of the system. Table 2-3: CB410L Estimated Peak Power Consumption Voltage (V) Current (mA) Power (W) 1.1 V 1000 mA 1.1 W 1.2 V 15 mA 0.018 W 1.8 V 775 mA 1.395 W 3.2 V 100 mA 0.320 W 3.3 V 500 mA 1.65 W Total: 11 4.
PHYSICAL CHARACTERISTICS I/O CHARACTERISTICS 2.5 I/O Characteristics The voltage and current characteristics of the various IO pads of the CB410L versus IO bank supply voltage are illustrated in the tables below. Caution: Note that the Voh values in the tables below do not apply to GPIOs configured in open drain mode. GPIOs can be individually configured in open drain mode. When in open drain mode they either drive the line to Vol, or leave it floating, to be pulled up by an external pull-up resistance.
PHYSICAL CHARACTERISTICS I/O CHARACTERISTICS • The Maximum values for Iol and Ioh represent the maximal values for the pad type. They are provided for information only. Table 2-5: DC Characteristics for Digital IOs, Voltage 1.8 V Parameter Drive Strength Min. Nom. Max. Unit VIL Input Low Voltage -0.3 0.63 V VIH Input High Voltage 1.17 3.6 V VT Threshold Point 0.79 0.87 0.94 V VT+ Schmitt Trigger Low to High Threshold Point 1 1.12 1.
PHYSICAL CHARACTERISTICS I/O CHARACTERISTICS Table 2-5: DC Characteristics for Digital IOs, Voltage 1.8 V (Continued) Parameter Drive Strength RPD Pull-down Resistor Min. Nom. Max. 52 90 167 kOhm 0.45 V VOL Output Low Voltage 1.35 VOH Output High Voltage IOL Low Level Output Current at VOL(max) IOH High Level Output Current at VOH(max) Unit V 2 mA 1.2 2.2 3.6 mA 4 mA 2.3 4.3 7.1 mA 8 mA 4.6 8.6 14.3 mA 2 mA 1.0 2.4 4.6 mA 4 mA 2.0 4.7 9.2 mA 8 mA 4.0 9.4 18.
PHYSICAL CHARACTERISTICS I/O CHARACTERISTICS Table 2-6: DC Characteristics for Digital IOs, Voltage 1.8 V - DDR IO Pins (BIDIR_DDR Type) (Continued) Parameter Drive Strength VOH Output High Voltage (IOH=-0.1mA) Min. Nom. Max. 0.9 * VDDQ IOL Low Level Output Current at VOL(max) IOH High Level Output Current at VOH(max) Unit V 2 mA 2.00 mA 4 mA 4.00 mA 8 mA 8.00 mA 10 mA 10.00 mA 2 mA 2.00 mA 4 mA 4.00 mA 8 mA 8.00 mA 10 mA 10.
PHYSICAL CHARACTERISTICS PACKAGE DESCRIPTION 2.6 Package Description 2.6.1 Module Weight The module weight is 5.1 g. 2.6.2 Module Footprint Figure 2-1: Module Pads and Numbering View Dimensions on Figure 2-1 are indicated in mm. Attention: CB410L DATASHEET Pads 81 to 110 are used as both GND and thermal drops.
PHYSICAL CHARACTERISTICS PACKAGE DESCRIPTION 2.6.
PHYSICAL CHARACTERISTICS PACKING INFORMATION 2.7 Packing Information The CB410L is delivered in Tape-and-Reel. One reel can hold up to 500 pieces. Each reel is included in a box, and a carton can contain five boxes, hence up to 2500 pieces. This is represented on Figure 2-3.
PHYSICAL CHARACTERISTICS STORAGE CONDITIONS Figure 2-4: Tape Dimensions Details 2.8 Storage Conditions 1. Calculated shelf life in sealed bag: 6 months at <40 degree and <90% relative humidity (RH). 2. Peak package body temperature: 250 °C. 3. After bag was opened, devices that will be subjected to reflow solder or other high temperature process must: a) Mounted within: 168 hours of factory conditions <30 °C / 60% RH. b) Stored at ≤10% RH with N2 flow box. 4.
PHYSICAL CHARACTERISTICS MOUNTING CONSIDERATIONS 2.9 Mounting Considerations This section provides reflow information.
PHYSICAL CHARACTERISTICS COMPONENT RELIABILITY 2.10 Component Reliability Notes: 1. This section does not apply to part number CB41Q85QRZ (engineering samples). 2. Relability test results will be provided in a future edition of this document.
PHYSICAL CHARACTERISTICS RF PERFORMANCE Table 2-9: Reliability Test Plan (Continued) Item Test conditions ESD 2.11 Standard HBM Start: ±1000V, Stop:± 1000V Target: Classification 2 (±2000V to ±4000V) ANSI/ESDA/JEDEC JS-001-2014 CDM Start: ±150V, Stop: ±150V Target: Classification C1 (±250V to <±500V) ANSI/ESDA/JEDEC JS-002-2014 Result RF Performance This section presents the module’s performance in LTE Band 42 and 43, and in CBRS Band 48.
Signals and Pins 3 3.1 CB410L Pinout Table 3-1 lists the function and main information for CB410L pads for part numbers CB41Q85QRZ and CB41Q85QRA defined in Table 2-1 on page 9. The pads listed in Table 3-2 are connected to ground. The pads listed in Table 3-3 are to be left unconnected. Refer also to Section 3.2.1 High-Speed UARTs Flow Control Signals on page 28 that represents the typical implementation for UART hardware flow control.
SIGNALS AND PINS CB410L PINOUT Table 3-1: Pinout (Continued) Pad # Pad Name Alternate Function Direction (HW) Comments RevZ RevA 17 WAKE_0 18 NETWORK_LED 19 AUX_ADC1 In 20 AUX_ADC0 In 21 UART0_SIN GPIO_34 In X 22 UART0_SOUT GPIO_35 Out X 23 UART2_CTS GPIO_6 In 24 UART2_RTS GPIO_7 Out X 25 UART2_SIN GPIO_4 In X 26 UART2_SOUT GPIO_5 Out X 27 RFDATA_16 Out 28 RFDATA_17 Out 30 SPI _CS_N_1 31 SPI _CS_N_2 32 SPI SDO GPIO_45 In Data from SPI device to mod
SIGNALS AND PINS CB410L PINOUT Table 3-1: Pinout (Continued) Pad # Pad Name 41 RGMII_RX_DV 42 RGMII_RXCLK 43 RGMII_RXD0 44 RGMII_RXD1 45 RGMII_RXD2 46 RGMII_RXD3 47 RGMII_TX_EN 48 RGMII_TXD0 49 RGMII_TXD1 50 RGMII_TXD2 51 RGMII_TXD3 52 RGMII_TXCLK 53 RGMII_GTXCLK 54 RGMII_MDC 55 RGMII_MDIO 56 USB_EXT_VBUS_VLD 57 Alternate Function RevZ RevA Comments In X USB_D+ In/Out X 58 USB_D- In/Out X 59 VBAT1 In X 60 VBAT1 In X 62 1V8_D Out 63 RESET_N In 64
SIGNALS AND PINS CB410L PINOUT Table 3-1: Pinout (Continued) Pad # Pad Name Alternate Function Direction (HW) Comments RevZ RevA 65 SIM_VCC Out X 66 SIM_RST Out X 67 SIM_IO In/Out X 68 SIM_CLK Out X 69 SIM_DETECT In X 70 PCM_CLK GPO_1 In See Section Notes on Signals 71 PCM_FS GPIO_9 In/Out See Section Notes on Signals 72 PCM_RXD GPIO_10 In See Section Notes on Signals 73 PCM_TXD GPIO_8 Out See Section Notes on Signals 74 UART3_CTS GPIO_16 In See Section Not
SIGNALS AND PINS CB410L PINOUT Table 3-2: Ground Pads Pad # Pad Name Comment 1 3 5 10 13 29 61 GND All GND pads shall be connected to the same copper. 81 to 110 GND All GND pads shall be connected to the same copper. Those pads have a thermal dissipation function also.
SIGNALS AND PINS NOTES ON CB410L SIGNALS 3.2 Notes on CB410L Signals 3.2.1 High-Speed UARTs Flow Control Signals CB410L DATASHEET • UART2_CTS: UART2 flow control, Clear-To-Send, active low, of the CB410L. To be connected to the RTS of the remote UART device. Provision a 1 kOhm pull-down on CTS pin when flowcontrol is not used. If it is connected to an external component (like a RS232 driver), the user should make sure that this component will present a low level to the CB410L. See Figure 3-1.
SIGNALS AND PINS NOTES ON CB410L SIGNALS Figure 3-1 represents the typical implementation for the hardware flowcontrol. ^ĞƋƵĂŶƐ ^/ ZĞŵŽƚĞ ĞǀŝĐĞ ^/E Zy ^Khd dy d^ d^ Zd^ Zd^ 'E 'E 'E 'E Figure 3-1: UART Flow Control Note: 29 High-Speed UART can be used as low-speed UART, given a specific software registers configuration and the setting of the CTS signal to 0. Please contact Sequans customer support for details.
SIGNALS AND PINS NOTES ON CB410L SIGNALS 3.2.2 I2S/PCM Interface Signals • PCM_RXD: PCM receive data. PCM data block is 8-bits or 16-bits. Only one data block is received per frame. Receive time-slot offset is programmable by using the RX_SLOT register. For instance, if RX_SLOT=5, then the 8-bit data block is received from time-slot #5 to #12. Bit-order is configurable. • PCM_CLK: PCM clock input, from 128 kHz to 8192 kHz Sequans PCM interface takes PCM_CLK as an input in both master and slave modes.
SIGNALS AND PINS POWER-UP SEQUENCE 3.3 Power-Up Sequence Important: The RESETN (pin 63) should be driven by the Host (active low). This signal should be kept high (100K pull up, 1V8). The following timing requirement applies to the signals VBAT1, VBAT2, MODULE_PWR_EN and RESET_N. It must be respected for proper CB410L’s behavior. The RESET_N signal is controlled automatically in case of cold start and warm start. Caution: VBAT1 and VBAT2 should remain stable in the voltage range listed in 2.
A Acronyms Acronym Definition CBRS Citizens Broadband Radio Service CPU Central Processing Unit DL Downlink ECCN Export Control Classification Number ECM Ethernet Control Model, USB interface EEM Ethernet Emulation Model, USB interface ESD Electro-static discharge GND Ground GPIO General Purpose Input Output HBM Human Body Model (ESD) I/O Input/Output IMEI International Mobile Equipment Identity IMS Instant Messaging Service IP Internet Protocol LTE Long Term Evolution, or 4
Acronym Definition Rx Reception S/N or SN: Serial Number SIM Subscriber Identification Module SMS Short Message Service SPI Serial Peripheral Interface Tx Transmission UE User Equipment UL Uplink USB Universal Serial Bus 33 PROPRIETARY SEQUANS Communications CB410L DATASHEET
PCB Layout Rules B This section provides general good practices in defining a PCB layout. B.1 Placement It is good to perform the placement of all the major components blocks before routing any section of the PCB design. The considerations here are: • CB410L module • RF interface • Reset circuit Initial placement of these parts allows assessment of the PCB floor plan usage and avoids any significant changes to final routed areas of the design if a placement issue is found.
TRACE CHARACTERISTIC DESIGN B.2 Trace Characteristic Design This section explains some standard design rules when considering different types of signals involved (digital, power supply, RF). B.2.1 Digital Traces 1. Careful and logical placement of digital signals are required to ensure separation of digital interference between each other and unrelated traces. 2. Consider the flow of ground currents during routing.
TRACE CHARACTERISTIC DESIGN B.2.3 RF Traces 1. Avoid burying these traces as much as possible, because it increases RF losses compared with routing on the top. 2. Keep as short as possible to help reduce RF losses. 3. Design the impedance of the trace keeping in mind that the footprint of the RF components should be of similar width. This help avoid impedance discontinuities. 4. Ensure the steps provided in Section Controlled Impedance Traces are taken into account when making the trace width. B.2.
TRACE CHARACTERISTIC DESIGN B.2.5 Grounding 1. Stitch ground areas together with vias where flooded ground remains unterminated. 2. Stitch ground areas together in general to keep common ground impedance the same across the region. 3. RF ground planes should be as large and continuous as possible and not be cut into small islands. Check that strings of vias do not inadvertently create slots in ground or power planes.