THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION AND SUCH INFORMATION MAY NOT BE DISCLOSED TO OTHERS FOR ANY PURPOSES WITHOUT WRITTEN PERMISSION FROM SELEX Sistemi Integrati Inc. Copyright © 2008, SELEX Sistemi Integrati Inc. Operations and Maintenance Manual Model 1150A Doppler VHF Omnirange (DVOR) 571150A-0002 Rev - November, 2008 SELEX Sistemi Integrati Inc. 11300 West 89th Street Overland Park, KS U.S.A.
THIS SHEET INTENTIONALLY BLANK
SAFETY SUMMARY The following are general safety precautions that are unrelated to specific procedures and therefore do not appear elsewhere in this publication. These are recommended precautions that personnel should understand and apply during through the many phases of operation and maintenance.
THIS SHEET INTENTIONALLY BLANK
SELEX Sistemi Integrati Inc. This equipment is supplied by SELEX Sistemi Integrati Inc. For replacement parts and repair service, contact SELEX Sistemi Integrati Inc. using the contact information provided below. HOW TO ORDER REPLACEMENT PARTS When ordering replacement parts, you should contact SELEX Sistemi Integrati Inc. by fax, phone or email. Please address the following items (as applicable) in your correspondence to enable us to provide the best possible service. 1. SELEX Sistemi Integrati Inc.
THIS SHEET INTENTIONALLY BLANK
MANUFACTURER’S WARRANTY SELEX Sistemi Integrati Inc. The following warranty is applicable in all cases, except where modified or superseded by specific contract terms. Contact SELEX Sistemi Integrati Inc. if clarification is required. A.
MANUFACTURER’S WARRANTY (cont.) F. Manufacturer does not warranty any Products, components, subassemblies, or parts not of its own manufacture. Manufacturer hereby transfers to Customer any and all warranties (if any) which it receives from its suppliers. G. Periodic calibration / re-calibration of test equipment is not covered under this or any Seller’s warranty, and is the sole responsibility of the Purchaser. H.
Model 1150A DVOR TABLE OF CONTENTS Paragraph # Description 1 1.1 1.2 1.2.1 1.2.1.1 1.2.1.2 1.2.1.3 1.2.1.4 1.2.1.5 1.2.1.6 1.2.1.7 1.2.1.8 1.2.1.9 1.2.1.10 1.2.1.11 1.2.1.12 1.2.1.13 1.2.1.14 1.2.1.15 1.2.1.16 1.2.2 1.2.3 1.2.3.1 1.2.3.2 1.2.3.3 1.2.3.4 1.2.3.5 1.2.3.6 1.2.3.7 1.2.4 1.2.5 1.2.6 1.2.7 1.3 1.3.1 1.3.1.1 1.3.1.2 1.3.1.3 1.3.2 1.3.3 1.3.4 1.3.4.1 1.3.4.2 1.3.4.3 1.3.5 1.3.5.1 1.3.5.2 1.4 1.5 2 2.1 GENERAL INFORMATION AND REQUIREMENTS..........................................................
Model 1150A DVOR TABLE OF CONTENTS (cont.) Paragraph # Description 2.2 2.2.1 2.3 2.3.1 2.3.1.1 2.3.2 2.3.2.1 2.3.2.1.1 2.3.2.1.2 2.3.2.1.2.1 2.3.2.1.2.2 2.3.2.1.2.3 2.3.2.1.2.4 2.3.2.2 2.3.2.2.1 2.3.2.3 2.3.2.4 2.3.2.4.1 2.3.2.4.2 2.3.2.5 2.3.2.6 2.3.2.6.1 2.3.2.6.2 2.3.2.7 2.3.2.8 2.3.2.8.1 2.3.2.9 2.3.2.9.1 2.3.2.10 2.3.2.10.1 2.3.2.11 2.3.2.12 2.3.2.12.1 2.3.2.13 2.3.2.13.1 2.3.2.13.2 2.3.2.14 2.3.2.14.1 2.3.2.14.1.1 2.3.2.14.1.2 2.3.2.14.1.3 2.3.2.14.1.4 2.3.2.14.1.5 2.3.2.14.1.6 2.3.2.14.1.7 2.3.2.
Model 1150A DVOR TABLE OF CONTENTS (cont.) Paragraph # Description 2.3.2.14.1.14 2.3.2.15 2.3.2.15.1 2.3.2.15.2 2.3.2.16 2.3.2.16.1 2.3.2.16.2 2.3.2.17 2.3.2.17.1 2.3.2.17.2 2.3.2.18 2.3.2.19 2.3.2.19.1 2.3.2.20 2.3.2.21 2.3.2.22 2.3.2.22.1 2.3.2.22.2 2.3.2.23 2.3.2.23.1 2.3.2.23.2 2.4 2.5 2.6 3 3.1 3.2 3.3 3.4 3.5 3.5.1 3.5.1.1 3.5.1.2 3.5.1.3 3.5.2 3.5.2.1 3.5.2.2 3.6 3.6.1 3.6.2 3.6.3 3.6.4 3.6.5 3.6.6 3.6.6.1 3.6.6.2 3.6.7 3.6.7.1 3.6.7.1.1 3.6.7.1.2 3.6.7.1.3 System Configuration Inputs............
Model 1150A DVOR TABLE OF CONTENTS (cont.) Paragraph # Description 3.6.7.1.4 3.6.7.2 3.6.7.2.1 3.6.7.2.2 3.6.7.2.3 3.6.7.2.4 3.6.7.2.5 3.6.7.3 3.6.7.3.1 3.6.7.3.2 3.6.7.3.3 3.6.7.3.4 3.6.7.3.5 3.6.7.4 3.6.7.4.1 3.6.7.4.2 3.6.7.4.3 3.6.7.4.4 3.6.7.4.5 3.6.7.4.5.1 3.6.7.4.5.2 3.6.7.4.5.3 3.6.7.4.5.4 3.6.7.5 3.6.8 3.6.8.1 3.6.8.1.1 3.6.8.1.1.1 3.6.8.1.1.2 3.6.8.1.1.3 3.6.8.1.2 3.6.8.1.2.1 3.6.8.1.2.2 3.6.8.1.3 3.6.8.2 3.6.8.2.1 3.6.8.2.1.1 3.6.8.2.1.2 3.6.8.2.2 3.6.8.2.2.1 3.6.8.2.2.2 3.6.8.2.2.3 3.6.8.2.
Model 1150A DVOR TABLE OF CONTENTS (cont.) Paragraph # Description 3.6.8.3.4 3.6.8.4 3.6.8.4.1 3.6.8.4.2 3.6.8.5 3.6.8.6 3.6.8.6.1 3.6.8.6.2 3.6.8.7 3.6.8.7.1 3.6.8.7.2 3.6.8.7.3 3.6.8.7.4 3.6.8.7.5 3.6.8.7.6 3.6.8.7.7 3.7 3.8 3.8.1 3.8.2 3.8.2.1 3.8.2.1.1 3.8.2.1.2 3.8.3 3.8.4 3.8.5 3.8.6 3.8.7 3.8.8 3.8.9 3.8.10 3.8.11 3.8.12 3.8.13 4 4.1 5 5.1 5.2 5.3 6 6.1 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.2 6.2.1 6.2.2 6.2.3 Transmitter Status Screen ...................................................................
Model 1150A DVOR TABLE OF CONTENTS (cont.) Paragraph # Description 6.2.4 6.2.5 6.2.6 6.2.7 6.2.8 6.2.9 6.2.10 6.2.10.1 6.2.10.2 6.2.11 6.3 6.3.1 6.3.2 6.3.3 6.3.4 6.3.5 6.4 6.4.1 6.4.1.1 6.4.1.2 6.4.1.3 6.4.1.4 6.4.2 6.4.3 6.4.4 6.4.5 6.4.6 6.4.7 6.4.8 6.4.9 6.4.10 6.4.11 6.4.12 6.4.13 6.4.14 6.4.15 6.4.16 7 7.1 7.2 7.3 7.3.1 7.3.2 7.4 7.5 8 8.1 9 9.1 9.2 9.2.1 Monitor 30 Hz and 9960 Hz Modulation Percentage and Deviation Ratio Performance Check ..........6-2 Modulation Frequency Performance Check......
Model 1150A DVOR TABLE OF CONTENTS (cont.) Paragraph # Description 9.3 9.3.1 9.4 9.5 9.5.1 9.5.2 9.5.3 9.5.4 9.5.5 9.5.6 9.5.7 9.5.8 9.5.8.1 9.5.9 9.5.10 9.5.11 9.5.12 9.5.13 9.5.14 9.5.15 9.5.16 9.5.17 9.5.18 9.5.19 9.5.20 9.6 9.6.1 9.7 9.7.1 9.7.2 9.7.3 9.7.4 9.7.5 9.7.6 9.7.7 9.7.8 9.7.9 9.7.10 9.7.11 9.7.12 9.7.12.1 9.7.12.2 9.7.12.3 9.7.13 9.7.13.1 9.7.13.2 9.7.13.3 9.7.13.4 9.7.13.5 9.7.13.6 9.7.13.7 UNPACKING AND REPACKING...........................................................................
Model 1150A DVOR TABLE OF CONTENTS (cont.) Paragraph # Description 9.7.13.8 9.7.14 9.7.14.1 9.7.14.2 9.7.14.3 9.7.14.4 9.7.14.5 9.7.14.6 9.7.14.7 9.7.14.8 9.7.14.9 9.7.14.10 9.7.15 9.8 9.8.1 10 10.1 11 11.1 Saving No. 1 Transmitter Operating Parameters.................................................................................9-21 Setting Monitor Alarm Limits.............................................................................................................
Model 1150A DVOR LIST OF FIGURES Figure # Description Figure 1-1 Figure 1-2 Figure 1-3 Figure 1-4 Figure 1-5 Figure 1-6 Figure 1-7 Figure 1-8 Figure 1-9 Figure 1-10 Figure 1-11 Figure 1-12 Figure 2-1 Figure 2-2 Figure 2-3 Figure 2-4 Figure 2-5 Figure 2-6 Figure 2-7 Figure 2-8 Figure 2-9 Figure 2-10 Figure 2-11 Figure 2-12 Figure 2-13 Figure 2-14 Figure 2-15 Figure 2-16 Figure 2-17 Figure 2-18 Figure 2-19 Figure 2-20 Figure 2-21 Figure 2-22 Figure 2-23 Figure 2-24 Figure 2-25 Figure 2-26 Figure 2-27 Figur
Model 1150A DVOR LIST OF FIGURES (cont.
Model 1150A DVOR LIST OF FIGURES (cont.) Figure # Description Figure 3-64 Figure 3-65 Figure 3-66 Figure 3-67 Figure 3-68 Figure 3-69 Figure 3-70 Figure 3-71 Figure 3-72 Figure 7-1 Figure 7-2 Figure 7-3 Figure 7-4 Figure 7-5 Figure 7-6 Figure 7-7 Figure 7-8 Figure 9-1 Figure 9-2 Figure 9-3 Figure 9-4 Figure 9-5 Figure 9-6 Figure 9-7 Figure 9-8 Carrier Amplifier Assembly Controls and Indicators ...........................................................................................3-68 Monitor CCA ...
Model 1150A DVOR LIST OF TABLES Figure # Description Table 1-1 Table 1-2 Table 1-3 Table 1-4 Table 1-5 Table 1-6 Table 1-7 Table 1-8 Table 1-9 Table 1-10 Table 2-1 Table 2-2 Table 3-1 Table 3-2 Table 3-3 Table 3-4 Table 3-5 Table 3-6 Table 3-7 Table 3-8 Table 3-9 Table 3-10 Table 3-11 Table 3-12 Table 3-13 Table 3-14 Table 3-15 Table 3-16 Table 3-17 Table 4-1 Table 5-1 Table 6-1 Table 6-2 Table 8-1 Table 8-2 Table 9-1 Table 9-2 Table 9-3 Table 9-4 DVOR Equipment Specifications (Transmitter).............
Model 1150A DVOR 1 GENERAL INFORMATION AND REQUIREMENTS 1.1 INTRODUCTION This manual provides the data required to operate and maintain the Model 1150A Single or Dual Doppler VHF Omni-range (DVOR) Station. Figure 1-1 is a typical DVOR/TACAN site. Figure 1-2 is a typical DVOR/DME site. The counterpoise structure may vary based upon customer requirements.
Model 1150A DVOR Figure 1-2 Dual Doppler VHF Omni-range (DVOR) Station with DME 1.2 EQUIPMENT DESCRIPTION The DVOR system provides a reference from which aircraft bearing can be determined. To do this, a carrier is radiated in the 108 to 118 MHz band and modulated by two 30 Hz signals. One amplitude modulates and the other frequency modulates (also called the reference phase and variable phase signals, respectively) the carrier signal.
Model 1150A DVOR 1.2.1.1 Local Control Unit (LCU) (1A1) The Local Control Unit (LCU) is located in the upper portion of the VOR cabinet and provides station status information. The LCU provides for Transmitter, Monitor and System setup, monitoring and control. Alarm indication from the VOR Monitors initiates transfer or VOR shutdown. 1.2.1.2 Synthesizer Assembly (1A3A1, 1A3A11) The Synthesizer assembly generates three RF signals (carrier, upper and lower sidebands) for the VOR transmitter.
Model 1150A DVOR Figure 1-3 Location of Major Assemblies in the Electronics Cabinet (Front View) 1-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Figure 1-4 Location of Major Assemblies in the Electronics Cabinet (Rear View) Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Figure 1-5 Location of Commutator (1A10) Assembly in the Electronics Cabinet (Left Side View) Figure 1-6 Location of Commutator (1A11) Assembly in the Electronics Cabinet (Right Side View) 1-6 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 1.2.1.4 Monitor CCA (1A3A3, 1A3A10) The Monitor CCA amplifies the RF input from the field monitor antenna, then band pass filters and analyzes the signals. The parametric data is displayed on the PMDT and the Monitor CCA initiates an alarm status indication to the LCU if the DVOR fails to operate within specified limits. 1.2.1.5 Low Voltage Power Supply (LVPS) CCA (1A3A4, 1A3A8) There are two LVPS assemblies used in the transmitter cabinet.
Model 1150A DVOR The switch positions start at 0 and increment by one until 15. Each position represents 22.5 degrees of antenna rotation from the nominal position. At each position the Monitor CCA determines the azimuth angle at the Field Monitor antenna location. From this data the errors are measured and a Fourier Analysis is performed to generate the display data. The error as determined during the ground check is analyzed to determine the bias, the duantal error, quadrantal error and octantal error.
Model 1150A DVOR Station security control is provided through a three-level password system. Complete access to the system for adjustments and measurements is provided at level 3. Modification of non-critical parameters is available at level 2, and read-only access is available at level 1. All functions available on the local PMDT are available remotely via a modem and dial-up telephone line to an optional remote laptop or desktop PC running the PMDT software. Refer to Section 3 on the use of the PMDT. 1.
Model 1150A DVOR Figure 1-7 Carrier Antenna for collocation with DME/TACAN 1-10 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Figure 1-8 Carrier Antenna without DME/TACAN Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 1.2.3.2 Sideband Antenna Refer to Figure 1-9. Each sideband antenna is an Alford loop, similar to the carrier antenna but without the large hole in the support plate. This antenna is electrically tuned to the station frequency by means of single high voltage, glass capacitor. The antennas are mounted independently on individual support plates, supported above the counterpoise by metal pedestals equal in height to the carrier antenna. Figure 1-9 Sideband Antenna 1-12 Rev.
Model 1150A DVOR 1.2.3.3 Balun Refer to Figure 1-10. The balun is a line section approximately 180 degrees in length that hangs directly under the center of the antenna inside the pedestal and is used to develop a balanced signal output from a coaxial line input. Figure 1-10 Balun, Tuning Stub, and Positioning Piece Rev.
Model 1150A DVOR 1.2.3.4 Tuning Stub Refer to Figure 1-10. The tuning stub is a line section made out of RG-214 cable with a connector on one end and open at the other end. The function of the stub is to supply the needed capacitive reactance to make the point of the stub attachment pure resistive. 1.2.3.5 Positioning Piece Refer to Figure 1-10. The positioning piece is a length of RG-214 cable with a connector at each end.
Model 1150A DVOR 1.2.4 Field Monitor Antenna Refer to Figure 1-12. There are one or two field monitor antennas in each DVOR system. The single dipole antenna is the standard configuration and two antennas are the optional configuration. A cable from the field monitor antenna enters a two way power splitter in the VOR transmitter cabinet. The two outputs from the power splitter are connected to the two Monitor CCAs. The antenna is installed on a support tower 300 to 360 feet from the carrier antenna.
Model 1150A DVOR 1.2.6 Equipment Shelter The electronic part of the DVOR (transmitter cabinet and commutator rack) is housed in a shelter environmentallycontrolled with heating, cooling and ventilation. Normally, the shelter is installed below the counterpoise and directly underneath the carrier antenna. 1.2.7 Battery Backup Unit (Optional) The battery backup supply contains two battery boxes each containing two lead-acid maintenance-free batteries in a 48VDC configuration.
Model 1150A DVOR Table 1-1 DVOR Equipment Specifications (Transmitter) Parameter Specification Reference Phase Signal (30 Hz AM) Frequency: 30 Hz ±0.01% Modulation Depth: 30% Nominal, 0 to 40% digitally controlled Variable Phase Signal Frequency: (30 Hz FM) 30 Hz ±0.01% Sub-Carrier Signal Center Frequency: Deviation Ratio: Modulation Depth: (9960 Hz FM) 9960 Hz ± 0.
Model 1150A DVOR 1.3.1.2 Antenna System Type: Table 1-2 DVOR Equipment Specifications (Antenna System) Parameter Specification Alford loop Frequency Range: 108 to 118 MHz, field-tunable Polarization: Horizontal Antenna System Bearing Error: less than 0.5° DME Co-Location: Permits coaxial mounting of DME antenna above carrier Weather Protection Fiberglass radome Blending Function: COS .
Model 1150A DVOR 1.3.2 Monitor Parameter Configuration: Table 1-4 DVOR Equipment Specifications (Monitor) Specification Dual (“And”, “Or” user selectable) Azimuth Measurement Resolution: ±0.01° Azimuth Measurement Range: 0 to 360° Azimuth Measurement Accuracy: ±0.
Model 1150A DVOR 1.3.3 Mechanical and Electrical Table 1-5 DVOR Equipment Specifications (Mechanical and Electrical) Parameter Specification Size of Cabinet: 72" H x 24" W x 24" D (183cm H x 61cm W x 61cm D) Weight of Cabinet: 450 lb (205 kg) maximum Mounting Floor mount Primary Power: 85 to 264 VAC, 47 to 63Hz, single phase Standby Power: Standard 48 VDC no-break battery backup system (four 12V-65Ah batteries) with charger provides approximately 4.0 hours of operation.
Model 1150A DVOR 1.3.4.
Model 1150A DVOR 1.3.5 Remote Maintenance Monitoring System (RMM) 1.3.5.1 Design Features The Remote Maintenance Monitoring (RMM) system operates in conjunction with the local control system and Portable Maintenance Data Terminal (PMDT). The RMM is an integral part of the DVOR system and consists of the various embedded sensors, internal monitoring points, microcomputers and built-in test equipment to remotely monitor, control, record and certify proper operation of the system.
Model 1150A DVOR 1.4 EQUIPMENT AND ACCESSORIES SUPPLIED Table 1-8 is a list of all major equipment and accessories supplied.
Model 1150A DVOR Table 1-10 Optional Station Equipment Nomenclature Battery Backup System 12V-100Ah Part No. 470639-0003 1 Environmental Sensors (Smoke, Temperature, Intrusion) 470357-0003 1 Extender Cables 470449-0001 1 Wattmeter Bodies Kit 470451-0001 1 Field Monitor Obstruction Lighting Incandescent - 120V - 240V LED - 120V - 240V 470630-0001 470630-0002 470630-0003 470630-0004 Printer – Universal AC Input 950311-0003 Quantity 1 1 1-24 Rev.
Model 1150A DVOR 2 TECHNICAL DESCRIPTION 2.1 INTRODUCTION The Model 1150A DVOR system is a dual transmitter system, with dual monitoring facilities. It is designed for terminal and en route navaid operation. The VOR is identified by a specifically assigned two to four letter Morse code identity and may also include voice identification. In addition automatic terminal information service (ATIS) information may be modulated onto the VOR signal with a standard input connection.
Model 1150A DVOR Figure 2-1 RF Spectrum of a Doppler VOR The deviation frequency is determined by the formula: fd= x x Where: fd equals the deviation frequency in hertz. W equals the angular velocity of the signal (30 Hz). X equals the diameter of the ring in wavelengths. Y equals 3.14. rd = fd 30 In the aircraft receiver, a 30 Hz signal is extracted from the 9960 Hz FM subcarrier.
Model 1150A DVOR The sequential energizing of the sideband antennas and the 30 Hz amplitude modulation of the carrier are time related in such a way that the reference and the variable phase 30 Hz signals are in phase at zero degrees (0) magnetic from the DVOR station. As the receiving point is moved clockwise around the station, the variable phase signal (30 Hz FM) begins to lead the reference signal (30 Hz AM).
Model 1150A DVOR The RF monitor assembly functions as an RF detector/amplifier and distributor of the detected RF signals. The assembly also contains the dummy load for the standby transmitter carrier RF signal. The RF Monitor includes builtin dummy loads for the four sideband signals. The Audio Generator CCA generates and processes all of the modulation signals transmitted by a DVOR transmitter and generates the power level and phase control signals needed to operate the transmitter and commutator.
Model 1150A DVOR Carrier Antenna Bank4 COMMUTATOR CONTROLLER RS422 Control Signals Bank3 48 Cables To Sideband Antennas Bank2 Bank1 RF SWITCH Modulation SIDEBAND 4 SIDEBAND 4 SIDEBAND 3 SIDEBAND 3 RF Monitor RF SWITCH Modulation CW (0 dBm) RF SWITCH SIDEBAND 2 SIDEBAND 2 SIDEBAND 1 SIDEBAND 1 RF SWITCH 30 dB CW (0 dBm) 30 dB CARRIER AMP SYNTH AUDIO GENERATOR CARRIER AMP RF SWITCH SERIAL DATA TO RMS SYNTH AUDIO GENERATOR SERIAL DATA TO RMS Figure 2-3 Simplified DVOR Transmitter
Model 1150A DVOR Refer to Figure 2-3. The Remote Maintenance System Processor (RMS) handles all command, control, communications and information for the DVOR system. A monitor antenna located on any radial in the far field provides an RF signal which is equally divided and sent to the VOR monitors for processing and analysis.
Model 1150A DVOR The Audio Generator CCA generates the carrier modulation signals, monitors and controls power levels, and directs the RF phase control signals for the DVOR transmitter. Each sideband generator contains one CCA within the assembly. Functionally, each sideband generator has two sideband amplifiers on the one sideband amplifier CCA. Each sideband amplifier is designed to amplify and modulate one of the four individual sideband signals used by the DVOR system.
Model 1150A DVOR Refer to Figure 2-4. The carrier frequency is generated by a PLL synthesizer, referenced to the precision 200 KHz signal. A voltage controlled oscillator, or VCO, generates the RF signal. This signal is buffered, and a portion of the signal fed back to the PLL controller, where it is divided by a programmable divider. The divided output is compared to the precision 200 KHz reference signal in the PLL controller’s phase comparator.
Model 1150A DVOR The output of the carrier phaser is amplified by the carrier buffer amplifier, and feeds the high power carrier amplifier module in the VOR system. In the process of amplitude modulation, the VOR carrier amplifier generates undesired phase modulation of the output signal. In addition, the transfer phase of the RF amplifier chain will drift due to temperature. The carrier phaser is used to counter both of these effects.
Model 1150A DVOR The output of Y1 routes to buffers U15:A and U15:B. The buffer U15:B routes to 1/2 of a dual decade counter U16:A. This counter divides the input signal by 5, then routes it to U16:B, the other half of this IC. Here it is divided by 10 again, creating a 200 KHz signal. The 200 KHz signal is provided to the PLL circuit on the 012263 CCA. The 200 KHz signal is used as a reference for the PLL circuit. The output of buffer U15:A is the 10.
Model 1150A DVOR Voltage regulator U2 provides a +5 volt source for U4, the carrier loop controller IC. By using a separate +5V source, the sensitive charge pump output of U4 will not be affected by other VOR system +5V circuitry. U4 provides a number of functions.
Model 1150A DVOR While serving as an interconnect board, the 012262 CCA also contains a temperature sensor, U12 and an EEPROM, U10. These are serial interface circuits that use a port expander, U9 digital gates to select the devices. The port expander U9 along with U8:B, U11, U13, and U14 allows serial communication using a single chip select signal. U1, U2, U7, U8:A, U21, and U22 are buffers for the digital signals coming into the 012262 CCA.
Model 1150A DVOR HY1 provides a DC output that is proportional to the phase difference between the reference input signal and the variable input signal. When the two signals are in quadrature (the normal operating condition), the output is zero volts. Output voltage increases with the variable phase input signal delayed with respect to the reference phase, and decreases with the variable phase input signal advanced with respect to the reference phase.
Model 1150A DVOR The output of T4 is then routed to buffer amplifier U21. Amplifier U21 feeds signal to the carrier amplifier in the VOR system. C102 couples a small RF sample from the output of U21 and is sent to the detector U22 and a buffer amplifier for monitoring of the output power to the carrier amplifier. U22 is a detector integrated circuit that generates a voltage on the output proportional to the RF input power.
Model 1150A DVOR The RF signal is attenuated after the U1 amplifier and sent through a phase shift network similar to the phase shift networks in the carrier CCA (012263). The phase shifter provides a fine adjustment for the carrier to sideband phase relationship. The phase shifter provides a minimum of +/- 45 degrees of phase shift. The control signal for the phase shifter is amplified through U2:B. Filtering is done through R5, C8, R11, and C10.
Model 1150A DVOR All signals and power supplies of the Audio Generator CCA enter and exit through right-angle DIN connectors P1 and P2; which connect to the Control Backplane CCA. Digital Signal Processor (DSP) U6 communicates to the RMS CCA through UART U12 and TTL-RS232 converter U14. Oscillator Y1 clocks the DSP U6 while uP supervisor U13 monitors the watchdog strobe, external ~MRESET, and on-board power; resetting DSP U6 if necessary.
Model 1150A DVOR Figure 2-8 Audio Generator CCA Block Diagram 2.3.2.3 Audio Generator CCA Detailed Circuit Theory Refer to Figure 11-13. All signals and power supplies of the Audio Generator CCA enter and exit through rightangle DIN connectors P1 and P2; which connect to the Control Backplane CCA. The +5V from connector P1-C1is filtered by capacitors C48 and C51 as well as inductor L4 to create +5VA for powering analog circuitry. +5V is also regulated by U17 to create +3.3V for powering digital circuitry.
Model 1150A DVOR Oscillator Y1 (available at test point TP22) clocks DSP U6-10 and UART U14-13 at 10 MHz through buffers U5D, U5E and U5C. Supervisor U13 will reset (~RESET) DSP U6-13 if the +3.3V supply drops too low, if ~EXTERN_RESET is active on SPI header J1-2 (factory only), if ~MRESET is active on connector P1-B16 (filtered by inductor FL1 and capacitor C65), or if watchdog (WDOG) from DSP U6-50 doesn’t transition often enough.
Model 1150A DVOR The outputs of DACs U18-6 and U18-8 are input to op-amps U34C-10 and U34D-12 as SB1_MOD and SB3_MOD. The outputs of DACs U20-6 and U20-8 are input to op-amps U34A-3 and U34B-5 as SB2_MOD and SB4_MOD. The power levels of DACs U44-16, U18-1 / U18-2, and U20-1 / U20-2 are set by DACs U31-6, U32-3, U32-4, U325, and U32-6. DACs U31, U32, and U33 are directly written by DSP U6. DACs U32 establish the sideband modulation levels while DACs U33 set the sideband phase levels.
Model 1150A DVOR Figure 2-9 Carrier Amplifier Assembly Block Diagram 2.3.2.4.2 Power Amplifier Assembly Detailed Circuit Theory Refer to Figure 11-19 An input CW RF signal is generated from the VOR synthesizer module with a minimum output power level of 100mW. The RF is sent through a cable to the carrier amplifier assembly. Once the RF enters the amplifier, it is attenuated through a 3 dB attenuator before entering the driver stage of the amplifier.
Model 1150A DVOR From U21 the demodulated signal is sent through a non-inverting unity gain buffer amplifier, U22:D. The output of U22:D is split into three different paths: CSB Power, Reflected Shutdown, and Detected. The CSB Power circuit is non-inverting amplifier (U22:C) circuit that uses R85 and R87 to set the gain of the circuit. Potentiometer R87 is adjusted to set the voltage level at TP20 to 3.0V with a 100W output CW RF power.
Model 1150A DVOR is approximately 10K ohms with the amplifier at 25 degrees C. R108 has a negative temperature coefficient, meaning as the temperature of the heat sink rises, the resistance of R108 reduces. In the event of excessive heat sink temperature, the output of comparator U23:B will travel to a low state. When the comparator goes low, this will make Q2 stop conducting, disabling transmission. The comparator will not reset until the temperature of the heat sink cools down.
BI-PHASE (CVOR only) Phase Difference Test point SB1 to SB2 Buffer -3dBm Manual Phaser Phase Det ~SHUTDOWN (Carrier Thermal or Audio Gen Off Command) ~VSWR FAULT Detected RFL PWR Detected FWD PWR Reference Modulation From Audio Generator 0 Deg from Hybrid -3 dBm Phase Sample Sideband 2 Audio Generator Phase Control High Pass Filter Sideband 2 Input -1 -1 Bi-Phase Modulator In- In+ Mean Phaser Control Mux Out Vref Control In+ Mux Mux Control In- 6 dB 6 dB Rev.
Model 1150A DVOR The signal then enters a buffer then a passes through a 6 dB fixed attenuator. The signal then passes through a voltage controlled phase shifter with up to 360 degrees of phase shift. This phase shifter is used in a control loop to correct for any phase shift due to temperature, and aging so that the output phase remains constant. After the phase the signal passes through a buffer then a fixed 6 dB attenuator and then a voltage variable attenuator used to amplitude modulate the RF signal.
Model 1150A DVOR The signal then enters the Bi-phase modulator circuit. This circuit provides either 0 or 180 degrees of RF phase shift. In a DVOR the selection is controlled by jumper J11 (SB1_BI_PHASE_CVOR is low) to allow operation over the band from 108 to 118 MHz. In a CVOR the SB1_BI_PHASE_CVOR changes from low to high with each sinusoidal lobe of modulation signal. This technique is used to remove the carrier from the sideband signal (carrier suppression) necessary for a CVOR sideband signal.
Model 1150A DVOR Refer to page 2 of Figure 11-21. Circuit U22 is a phase comparator circuit that forms part of the phase control loop of the Sideband Generator. The reference phase (SB1_REF_PHASE) is the unmodulated CW signal that is sampled after the manual phaser. The SB1_RF_SAMPLE1 signal is a sample of the final output signal from the from the forward power coupler DC1. The phase detector is most accurate when the Input A (INPA) and Input B (INPB) ports are separated by 90 degrees.
Model 1150A DVOR The Sideband Generator contains a temperature sensor U56 attached close to the heat sink to monitor the temperature of the heat sink. The RMS has the ability to read the temperature through the SPI interface. The signal SPI_SCK is the clock used to clock in and out the serial data. The SCK signal is buffered by U43 and U53A. The SPI_MOSI (master out slave in) line is serial data coming from the RMS. Data on this line enters U53A pin 2 and is buffered and exits at the Y1output.
Model 1150A DVOR 50 OHMs SIDEBAND 1 20 dB Attenuator 48 V1 50 OHMs DC-DC Converter + 5V SIDEBAND 2 48 V2 20 dB Attenuator 50 OHMs SIDEBAND 3 RMS Parallel Data (SPI) Temperature Sensor Storage memory (EEPROM) 20 dB Attenuator 50 OHMs SIDEBAND 4 20 dB Attenuator STANDBY CARRIER 50 OHMs Standby Detector CARRIER FORWARD Forward Detector CARRIER REFLECTED Reflected Detector Monitor 1,2 Audio Generator 1,2 Monitor 1,2 Audio Generator 1,2 Audio Generator 1,2 Carrier Amplifier 1,2 Figure 2-11
Model 1150A DVOR Test point TP3 is mounted on the front panel and allows for convenient monitoring of the Standby transmitter composite signal. Differential driver U19 is used to buffer the output signal to the Monitor and Audio Generator. Jumpers JP5 and JP6 provide selection of single ended or differential signals to the Monitor and Audio Generator. In position 1to 2 the signal is single ended. In position 3 to 4 the signal is differential with the output centered about 2.5 Vdc.
Model 1150A DVOR The RF Monitor contains a temperature sensor U11 attached close to the heat sink to monitor the temperature of the heat sink. The RMS has the ability to read the temperature through the SPI interface. The signal SPI_SCK is the clock used to clock in and out the serial data. The SCK signal is buffered by U8A. The SPI_MOSI (master out slave in) line is serial data coming from the RMS. Data on this line enters U8A pin 2 and is buffered and exits at the Y1output.
Model 1150A DVOR Figure 2-12 RMS CCA Block Diagram Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 2.3.2.9.1 RMS CCA Detailed Theory Refer to Figure 11-17. Battery-backed DC power 1_+48V and 2_+48V enter via connector P2-25 and P2-26, diodeOR’D by diodes CR13 and CR14, and fused by F2. This voltage is further regulated to +5V by DC-DC converter U39, diode CR15, and inductor L3. Over-voltage protection for the +5V is provided by SCR Q5, zener diodes CR19 and CR20, capacitor C115, and resistor R65. The +5V supply is further regulated by linear regulator U40 to create DVCC (+3.3V).
Model 1150A DVOR A reset can also be initiated by voltage supervisor / watchdog U6 when the power supply voltage on U6-2 drops too low; causing U6-7 to activate. Latches U29 and U31, as well as buffer U32, establish an 8-bit parallel port for LCU communications. Latch U29 signals PWRITE, PADDR, ~PREAD_EN, and PIN/~POUT determine a read or write bus access. The PWRITE and PADDR signals are converted to RS422 by U30 before routing to connector P1.
Model 1150A DVOR Decoding of the address space used by the U8 microcontroller is provided by decoders U23, U24, U21, and U18. All decoder outputs are used for on-board devices except for U24-10, named ~EXT_CS. This output defines the address space that is used to decode the Facilities CCA devices. Buffers U43 and U44 establish an 8-bit asynchronous bus for communications to/from the Facilities CCA. The inputs and outputs of buffers U43 and U44 as well as ~EXT_CS route to connector P2.
Model 1150A DVOR U31 and U32 buffer the power OK signals of the Carrier Amplifier CCAs, Sideband Amplifier CCAs, RF Monitor and two BCPS CCAs as well as the A-D status signal, the INTERLOCK signal, the ~FANS_OK signal, the SMOKE_DETECTOR signal, and the INTRUSION_SENSOR signal. All of these signals originate at various cards in the three racks in the VOR except the last four signals, which originate at the Interface CCA.
Model 1150A DVOR 2.3.2.10.1 Facilities CCA Detailed Theory Refer to Figure 11-18. System1 and System2 +48V power from connector P2-25 and P2-26 are scaled down by resistor networks RN1 and RN2 for input to the A-D converter as well as diode-OR’D by CR1 and CR2 to create the facilities +48V supply. This supply (also named LED_PWR) lights the CR24 PWR_OK LED when transistor Q1 is turned on under software control by U22-19; indicating all monitored power supplies are within range.
Model 1150A DVOR The tip and ring signals from dedicated modem U14 are isolated, TVS-protected, and filtered by T1, CR8, FL4, and FL5 before exiting connector P2-A14 and P2-A15. Audio from U14-64 is scaled by R28 and R30 before audio header JP1-3. Three more sources of audio (other than the modems) are controlled by analog multiplexer U16. MON1_AUDIO_ID and MON2_AUDIO_ID from P1-C1 and P1-C2 (originally from the Monitor CCAs) connect to multiplexer U16-15 and U16-12.
Model 1150A DVOR The U37 buffer reads TACAN antenna controller signals which enter through connector P1 and are converted to TTL by U34. The U38 output latch directs activity of the TACAN antenna controller after the U38 latch signals are converted to RS422 by U35 and U36. The U38-19 loop-back signal may be used for fault-isolation purposes to buffer U37-9. Latch U38-16 also controls ~TACAN_RESET though transistor Q5 and TVS diode CR42 before routing to P1-C8. 2.3.2.
Model 1150A DVOR Figure 2-14 Interface CCA Block Diagram 2.3.2.12.1 Interface CCA Detailed Theory Refer to Figure 11-8. The Interface CCA provides interface connections between the Backplane CCA and the outside world. All signals are protected by transient voltage suppression (TVS) devices. All connections between the Interface CCA and the Backplane CCA are accomplished via headers J1 and J2.
Model 1150A DVOR Ethernet module J9 has an RJ45 connector, is TVS-protected by U4 through U6, is powered by DC-DC converter PS1, and has its TTL signals converted to RS232 by U7 before routing eventually to the RMS CCA. Diodes CR41 through CR43 insure the proper voltage level before entry into PS1. PS1 converts +24VDC to +3.3VDC and diode CR72 provide TVS protection. All TACAN antenna system controller signals are TVS-protected by diodes CR45 through CR67 before routed to DB37 connector J3.
Model 1150A DVOR 2.3.2.13.1 AC Power Monitor CCA Block Diagram Theory Refer to Figure 2-15. The AC Monitor provides a method of measuring the AC voltage for the Transmitter and obstruction light circuits individually. A step down transformer with a full wave rectifier is provided for each channel. The AC current for the Transmitter and obstruction lights travel through individual current transformers. The resultant AC voltage is provided to the BCPS CCA for rectification and current to voltage conversion.
Model 1150A DVOR Figure 2-15 AC Power Monitor Block Diagram 2.3.2.14 Local Control Unit Theory Refer to Figure 2-16. The Local Control Unit (LCU) controls the normal operation of the VOR. All operational functions are performed by the LCU and are controlled by either front panel keyboard when in the local mode or by the Remote Maintenance Subsystem (RMS) through the parallel interface.
Model 1150A DVOR Figure 2-16 LCU Simplified Block Diagram 2.3.2.14.1 Local Control Unit Block Diagram Theory Refer to Figure 2-17. 2.3.2.14.1.1 DC to DC Converter The LCU receives +48V from the two independent system power supplies and diode OR’s the two sources to provide input power to a DC to DC converter which supplies all required voltages for the LCU. 2.3.2.14.1.
Model 1150A DVOR 2.3.2.14.1.5 1.8432MHz Oscillator/Divider Chains The LCU employs a 1.8432MHz crystal oscillator to produce all frequencies required by the design. The frequency is divided by 512 to produce 3600Hz used to produce the audible alarm tone and the Transmit On clocks driven back to the monitors. The signal is further divided by 8 to produce 450Hz used as the system clock within the design.
Model 1150A DVOR 2.3.2.14.1.9 LCU Transfer Control State Machine #1 and #2 and Discrete Controls The heart of the LCU is the two redundant transfer control state machines. These are configured by the RMS; receive key commands from the front panel or from the RMS, and process alarms reported by the monitors after being filtered by the Positive and Negative Alarm Registers.
Model 1150A DVOR The following functions can be performed by the RMS through the parallel interface: a. b. c. d. e. Functions a-g listed above. Enable or disable the alarm signals from either one of the monitors. When a monitor's alarm signals are disabled, it is functionally equivalent to the monitor producing constant alarms. Set the “AND/OR” state of the alarm logic when it combines the alarm signals from Monitor 1 with the alarm signals from Monitor 2.
Model 1150A DVOR The ~TEST signal when asserted from the LCU via connector P2 will insure the power-OK LED is lighted no matter the output of the window comparators. Serial signals (SPORT) from connector P2 program the 32Kx16 static RAM (SRAM) via the U1 programmable logic device (PLD) with data to be clocked out to the 14-bit D-A converter. The test waveform from the D-A converter is amplified and buffered before exiting connector P1 and eventually routing to the Monitor CCAs. The 19.
Model 1150A DVOR From Control Backplane 1_+48Vdc 2_+48Vdc DC-DC Converter Linear Regulator P2 60 Pin DIN41612 Hybrid Connector -5VA +5V Diode-OR and Fuse +3.3V DC-DC Converter Power OK Window Comparators and Power OK LED ~POWER_OK ~TEST SPI Signals SPORT Signals J3 ISP Connector Digital Buffers Parallel Bus ~RESET ~MRESET Reset Circuitry U1 Programmable Logic Device 19.
Model 1150A DVOR Two types of over-voltage protection are utilized for DC-DC converter U10. SCR Q1 in conjunction with CR7, R33, R28, and C30 will activate and open fuse F1 if the output voltage exceeds approximately +6.8VDC. Zener diode CR8 provides redundant over-voltage protection. The +5VDC supply powers linear regulator U11, which creates the +3.3VDC output. The +3.3VDC output is measurable on test point TP12 and is filtered by capacitor C36.
Model 1150A DVOR Analog buffer U8:A sends a single-ended test generator waveform to A-D converter U14 for on-board testing and verification. The U14 A-D converter is serially controlled by signals SPI_SCK, SPI_MISO, and ~SPI_CS3X of the RMS CCA via connector P2. The U14 D-A converter has a built-in +2.5VDC reference which is filtered by capacitors C41 and C42, buffered by amplifier U21:A, and presented to the U12 Audio D-A converter.
Model 1150A DVOR From Control Backplane Filter +48Vdc DC-DC Converter Filter Load Resistors Fuse P2 60 Pin DIN41612 Hybrid Connector DC-DC Converter Ground ~TEST Power OK LED VCO_EN VCO_PWR ~LVPS_OK Power OK Window Comparators Ground +28Vdc +5Vdc P1 96 Pin DIN41612 Connector -12Vdc +12Vdc Figure 2-19 LVPS CCA Block Diagram 2.3.2.16.2 Low Voltage Power Supply (LVPS) CCA Detailed Circuit Theory Refer to Figure 11-15.
Model 1150A DVOR The VCO_EN signal from connector P2:C7 is filtered by inductor L5 and routed out connector P2:C9 as signal VCO_PWR. +48VDC, which originates at connector P2:C26, sources Zener CR11 through current-limit resistors R18 and R19 to create a precision +10VDC that can be measured at TP10. The precision +10VDC powers “window” comparators U5:A and U5:B; which compare the +5VDC voltage at U5-4 and U5-7 to the trip points established by resistors R21, R22, and R23 at U5-5 and U5-6.
Model 1150A DVOR The signal is routed into the receiver section of the monitor CCA. The signal passes through a selectable 16 dB attenuator on the monitor board. At high signal levels the 16 dB attenuator is switched into the circuit otherwise it is switched out. The user enables this attenuation using the PMDT configuration settings. The signal then passes through a pre-selector band pass filter that rejects high input level radar and communication band signals.
2-54 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 2.3.2.17.2 Monitor CCA Detailed Circuit Theory The microcontroller used on the Monitor CCA is in a product category called digital signal processor (DSP) that utilizes external flash ROM, non-volatile RAM (NVRAM), synchronous dynamic RAM (SDRAM), a voltage supervisor/watchdog reset circuit, and an oscillator to form the core microcomputer. The DSP also includes a direct memory access (DMA) controller, serial ports, and general purpose input/output (I/O).
Model 1150A DVOR The U6 DSP communicates serially through one internal and two external UARTs (both in U25). The buffer circuit U28 converts the TTL levels to and from RS232 levels (+8 to – 8 Volts Dc) using an internal power supply circuit. The internal UART of U6 is connected to the factory debug port at J9. The other two UARTs control communications to the RMS processor and provide a spare serial port.
Model 1150A DVOR The U75 DSP is used to provide high speed data collection and processing of the VOR signals. U6 is considered the “master” and U75 is the “slave”. The U75 DSP does not utilize external flash ROM, NVRAM or SDRAM. The U75 DSP includes an internal direct memory access (DMA) controller, serial ports, and general purpose input/output (I/O). The instruction set for the U75 DSP is downloaded by the U6 DSP at startup. The U75 DSP operates using only internal RAM.
Model 1150A DVOR U75 DSP IF ADC U24 125 kHz A/D Sample Controller DMA Controller Input Buffer (1000 Samples) Buffer1 TIMER0 LP 20 KHz ABS BP 125 KHz Detected Audio Buffer (4000 Samples) DMA Controller SPORT 1 Serial Interface DSP1 U6 Buffer 2 Thresholder BP 1020 Hz BP .
Model 1150A DVOR The signal is first changed by removing the DC bias and which provides an RF level value in dB from the nominal set point. The signal is then sent through three separate paths, 30 Hz am recovery, identification recovery, and 9960 Hz recovery. The 30 Hz am recovery path has a 30 Hz low pass filter. The signal is decimated to 1 KHz then enters a 30 Hz band pass filter. The output is the 30 Hz mod% and the 30 Hz used for the internal audio frequency counter.
Model 1150A DVOR 80 KHz Baseband Sources Integral Detected IF (from DSP2) Test Generator (From SPI ADC) SRC Mux Standby Detected (From SPI ADC) Remove DC-Bias RF_Level (dB) 30 Hz LPF Decimate to 1 KHz 30 Hz BPF Angle 30 Hz AM Freq (zero crossing) 500 ms FIFO 30 Hz LO 30 Hz Mod % 90 Deg SUB Az Angle Relative Phase Angle Detector (Dual 30 Hz Quadrature Mixers) 9960 BPF Mod % Angle 9960 Freq Detector (Zero Crossing) FM Detector 30 Hz Freq (zero crossing) 10 KHz LO 90 Deg Angle Diff 3
Model 1150A DVOR 2.3.2.18 Power Panel Theory Refer to Figure 1-3. The power panel, located on the lower front portion of the electronics cabinet, contains the AC input the Battery input and DC Buss circuit breakers for Transmitters 1 and 2. AC input power for the Transmitters enters the cabinet via the AC Monitor (REF DES 1A6) terminal block 1A9TB3 terminals 1, 2 and 3.
Model 1150A DVOR System AC voltage and current as well as obstruction light (oblite) AC voltage and current are sensed and scaled on the AC Monitor CCA before arriving at the BCPS CCA. Op-amps U10A and U10D, with potentiometers R29 and R30, calibrate the system and oblite VAC signals. Op-amp U14, with potentiometers R44 and R56, calibrate the system and oblite IAC signals. The calibrated signals pass to analog multiplexer U11 before analog-to-digital conversion by microcontroller U8.
Model 1150A DVOR 2.3.2.20 Battery Charger Detailed Circuit Theory Refer to Figure 11-20. The Fanless BCPS CCA provides over 700 watts of DC power which may include up to 250 watts of battery charging power. The Fanless BCPS CCA connects to the Carrier Backplane CCA through 47-pin right angle cPCI connector P1. AC input power (line, neutral, and earth) enters through the cPCI connector P1 and fuse F3 to terminal block TB1.
Model 1150A DVOR Battery back-up is switched on when the diode OR’d output of diodes CR45 and CR47 (48VPS1 or 48VPS2) is too low; approximately +43Vdc. Comparator U19 monitors this diode OR’d output (scaled by RN1 and renamed 48VPS_MON) at comparator U19-2 and compares it to the scaled +5VREF at U19-3. When 48VPS_MON is too low, comparator U19-7 switches low which turns on isolator U2 and transistors Q1 and Q2; connecting the battery to +48BUSS.
Model 1150A DVOR Microcontroller U8 contains a multi-channel 10-bit A-D converter. One analog channel of microcontroller U8-8 is used to convert the temperature signal of U21. Temperature circuit U21 is mechanically coupled to the heat-sink with a screw through a mounting hole. Microcontroller U8 reports the temperature along with other data to the RMS CCA via serial communications TX (U8-27) and RX (U8-29).
Model 1150A DVOR Figure 2-25 Extender Board 2.3.2.22 Commutator Control CCA Theory The Commutator Control CCA connects to a 25 conductor cable on the Control Backplane CCA. This cable originates from one of the two Audio Generators in the Control rack. The output of the Commutator Control CCA exits onto the backplane and to two 40-pin connectors that connect to ribbon cable from the Commutator CCAs. A 4-pin header on the Commutator Control CCA may be strapped to enable/disable automatic ground-check.
Model 1150A DVOR 2.3.2.22.1 Commutator Control CCA Block Diagram Theory Refer to Figure 2-26. The Commutator Control CCA processes all signal steering for antennas 1 through 48. Commutator switch control signals from the Audio Generator CCA are applied through connectors P1 and P2 to a differential line receiver circuit on the Commutator Control CCA. The line receiver circuit which consists of line receivers U5A, U5B, U5C, U5D, U6A, and U6B converts the differential signals to TTL signal levels.
Model 1150A DVOR Even Commutator CCA 012104-0001 Dipole Antenna Array - 48 elements 012260-0001 Sideband Backplane Odd Commutator CCA 012104-0001 Power OK LED ~TEST ~MRESET ~PWR_OK +3.
Model 1150A DVOR The antenna switch signals are applied to PLD U4. PLD U4 is programmed to perform all decoding and distribution of the antenna and transfer signals. The clock signal provides a synchronous timing signal for all switching activities. The ground check switch control lines are translated to TTL levels by differential line receiver U3. If the automatic ground check feature is enabled at J5, the ground check control lines are added as an offset inside PLD U4.
Model 1150A DVOR Scope Synch is available on the ODD XFR signal at test point TP1. Power for the CCA enters via P1-17, P1-18, P1-20, and P1-21. Diodes CR4 and CR6 form an “OR” for the two +28V supplies into Switch S1. If switch S1 is on and fuse F1 is intact, the DC-DC converter PS1 converts the +28V to +5V, +12V and -12V supplies. Regulator U1 regulates the -12V supply to -10V. Regulator U2 regulates the +5V to +3.3V for powering the PLD U4.
Model 1150A DVOR U12 (U27) Decoder Output 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3 4 5 6 7 8 9 10 11 Antenna # (0-47) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Table 2-1 Commutator Driver/Antenna Switch Sequence Antenna Number Commutator CCA Display Driver Position Odd (Even) U8 (U23) U13 (U28) U18 (U32) U9 (U24) U14 (U29) U19 (U33) U10 (U25) U15 (U30) U20 (U34) U11 (U26) U16 (U31) U21 (U35) U8 (U23) U13 (U28) U18 (U32) U9 (U24) U14 (U29) U19 (U33) U10 (U25) U15 (U30) U20 (U34) U11 (U26) U16 (U31) U21 (U35) 1A 2A 3A 4A
Model 1150A DVOR Antenna # (0-47) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Table 2-2 VOR Ground check Offset Table Ground Check Final Antenna # Antenna # Ground Check (GCSC4..1) (0 -47) (0-47) (GCSC4..1) 0 1 4 0 1 4 4 1 2 7 4 2 3 10 4 3 4 13 4 4 5 16 4 5 6 19 4 6 7 22 4 7 8 25 4 8 9 28 4 9 10 31 4 10 11 34 4 11 12 37 4 12 13 40 4 13 14 43 4 14 15 46 4 15 0 2 \ \ 1 5 \ \ 2 8 \ \ 3 11 47 0 4 14 47 1 5 17 47 2 6 20 47 3 7 23 \ \ 8 26 \ \ 9 29 47 14 10 32 47 15 11 35 12 38 13 41 14 44 1
Model 1150A DVOR Each individual antenna switch circuit on a Commutator CCA is functionally identical with the others. Pin diodes are used to perform the active switching of the RF to the individual antennas, and to swap the LSB and USB signals between each half of a switch assembly. Each Commutator CCA can be thought of as having two halves; each half is connected to twelve antennas. One half is energized by the LSB RF and the other half by USB RF.
Model 1150A DVOR Figure 2-27 Commutator CCA, Block Diagram Each antenna pair is selectively enabled by the selection of its assigned display driver. Each antenna line is also protected from extreme voltage spikes caused from lightning or other EMF generators by a gas surge suppressor. 2.3.2.23.2 Commutator CCA (2A2, 2A3) Detailed Circuit Theory Refer to Figure 11-6.
Model 1150A DVOR To simplify the interconnection of the signals and antennas used in the 48 antenna system, Table 2-1 is available as an aid. Each individual antenna switch circuit on a Commutator CCA is functionally identical with the others. Pin diodes are used to perform the active switching of the RF to the individual antennas, and to swap the LSB and USB signals between each half of a switch assembly.
Model 1150A DVOR 2.4 PMDT (PORTABLE MAINTENANCE DATA TERMINAL (UNIT 2) The lap top computer is a commercially obtained computer used for local control, monitoring and maintenance analysis of the DVOR system. The PMDT is typically located on a shelf or desk in the vicinity of the electronics cabinet. The PMDT is interconnected to the VOR via a USB cable to the front of the RMS CCA. The USB cable has a standard USB connector on one end that mates with a connector on the back of the PMDT.
Model 1150A DVOR 3 OPERATION 3.1 INTRODUCTION The operation of the Model 1150A VOR is controlled by a system of local and remote controls and status displays that provides the following general capabilities: 1. 2. 3. Control of operational parameters and comprehensive display of operational status through the use of user friendly Windows XP™ or VISTA™ based PMDT application running on a standard PC or notebook computer.
Model 1150A DVOR 3.5.1.2 Starting the PMDT Application To start the PMDT application double-click on the PMDT icon on the desktop or select the Start >> Programs >> SELEX-SI >> PMDT menu item. Note that the PMDT application is best viewed on a monitor with a resolution of 1024x768 or larger, using the “Normal (96DPI)” font size. Using the “Large size (120DPI)” Windows font will distort some PMDT screen controls making the data hard to read.
Model 1150A DVOR Refer to Table 3-1 for a list of functions available through the PMDT. Note that throughout this manual, the nomenclature used to indicate the navigation through the PMDT application(s menus and selections is as follows: System >> Connect >> Navaid >>Serial/USB Using the mouse (left-click) or keyboard (highlight & press Enter), select the System menu, then the Connect menu item, then the Navaid menu item, then the Direct menu item.
Model 1150A DVOR 3.6.3 System Status at a Glance - Sidebar Status and Control The Sidebar Status and Control is presented on every screen as shown in Figure 3-1 (Dual Transmitter shown). The portion of the screen under the “Connected” indication is called the “Sidebar”. The Sidebar presents the current status of the VOR. The data is refreshed approximately once every two seconds. At a glance, the technician can determine the state of the VOR.
Model 1150A DVOR 3.6.4 Screen Area The screen area displays selected common parameters and status data. The screen may present tabs and buttons that allow the operator to make further selections. Shortcuts have been implemented in the PMDT allowing keyboard entry of the Next, Close, Apply, and Reset functions. These buttons are enabled as applicable when navigating through the various PMDT screens.
Model 1150A DVOR Figure 3-2 PMDT Configuration Screen 3.6.6 Connecting to the VOR 3.6.6.1 Security Levels Access to the VOR system via the PMDT is restricted through the use of four security levels. Level 1 is the lowest security level, and Level 4 is the highest security level. These security levels are accessed as shown in Table 3-2: Security Level Level 1 Level 2 Level 3 Level 4 Table 3-2 VOR Security Levels Accessed by Permissions Logging on with either: User ID of System Status and Parameters.
Model 1150A DVOR To maintain system security, this default user account information should be changed by the authorized personnel. NOTES After 3 failed attempts to logon (ie. invalid User ID or Password), further logon attempts will be blocked for a period of 5 minutes. The PMDT software contains an Activity Detector feature that will automatically log off a user after 15 minutes of inactivity (either mouse or keyboard activity). This feature is disabled when the system is in Local Mode. 3.6.6.
Model 1150A DVOR The “Add Phone Number” screen shown in Figure 3-4 is used to specify how the call will be placed. A Windows TAPI-based call allows for the use of a long distance calling card, or handling specific Country Code or Area Code rules, which must be configured using the “Change Dialing Properties” button on the System Directory screen. For basic phone calls, the phone number can be entered in the “Just dial this Phone Number” field, including any required dialing prefixes such as “9”.
Model 1150A DVOR 3.6.7 RMS Screens 3.6.7.1 RMS Status Screens The PMDT contains the following screens that provide summary level status for the various system modules. 3.6.7.1.1 VOR/DME Status Screen The VOR/DME Status Screen is shown in Figure 3-6. This screen contains indicators for VOR status provided directly by the Remote Monitoring Subsystem (RMS). If a DME is collocated with this VOR, its summary level status will also be displayed.
Model 1150A DVOR 3.6.7.1.2 Monitor/Transmitter Status Screen The Monitor/Transmitter Status screen is shown in Figure 3-7. This screen shows the current summary-level operational status of the monitors and transmitters. Figure 3-7 Monitor/Transmitter Status Screen 3-10 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 3.6.7.1.3 Software Revisions Screen The Software Revisions screen is shown in Figure 3-8. This screen contains lists the software revision number for each embedded processor in the navaid. Figure 3-8 Software Revisions Screen Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 3.6.7.1.4 Hardware Revisions Screen The Hardware Revisions Screen is shown in Figure 3-9. This screen is used to maintain configuration management information for each of the installed modules. Data can be entered in each of the available fields by the technician. This data is then written into the on-board memory in the associated module, for use in Customer Service, module history records, and general system maintenance. Figure 3-9 Hardware Revisions Screen 3-12 Rev.
Model 1150A DVOR 3.6.7.2 RMS Data Screens The PMDT contains the following screens to provide detailed system data collected by the RMS. 3.6.7.2.1 RMS Maintenance Alerts Screen The RMS Maintenance Alert screen is shown in Figure 3-10. This screen shows the source of any maintenance alerts in the system. From this screen the operator can determine the alert/alarm and proceed to the associated screen to observe the specific data driving the alert/alarm.
Model 1150A DVOR 3.6.7.2.2 Power Supply Data Screen The RMS Power Supply Data screen is shown in Figure 3-11. This screen shows the status and limits of each of the system’s power supplies. If any parameter is enabled as a maintenance parameter in the associated RMS>>Configuration>>Power Supply Limits screen, and its measured value falls outside of either the Alert Limits or Pre-Alert Limits, the parameter’s value will be colored yellow to indicate the alert condition.
Model 1150A DVOR 3.6.7.2.3 Digital I/O Screen The RMS Digital I/O Data screen is shown in Figure 3-12. This screen displays the current status of the system’s digital inputs and outputs. Any abnormal signal will be indicated in yellow or red. Figure 3-12 RMS Digital I/O Data Screen Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 3.6.7.2.4 Temperature Data Screen The RMS Temperature Data screen is shown in Figure 3-13. This screen displays the current status of the system’s temperature sensors. The Cabinet Interface temperature sensor is located on the Cabinet Interface Assembly located at the rear of the cabinet. The optional external temperature sensor module is connected to the Cabinet Interface Assembly. The remaining sensors are located on the individual modules.
Model 1150A DVOR 3.6.7.2.5 A/D Data Screen The RMS A/D Data screen is shown in Figure 3-14. This screen shows the status and limits of each of the Spare Analog signals. If any parameter is enabled as a maintenance parameter in the associated RMS>>Configuration>>A/D Limits screen, and its measured value falls outside of either the Alert Limits or PreAlert Limits, the parameter’s value will be colored yellow to indicate the alert condition. Figure 3-14 RMS A/D Data Screen Rev.
Model 1150A DVOR 3.6.7.3 RMS Logs Screen The PMDT includes the following log screens that provide time tagged records of changes in the system parameters and operating condition. 3.6.7.3.1 Operational Summary Screen The Operational Summary Screen is shown in Figure 3-15. This screen presents the duration that each of the transmitters has spent in each operational condition. The Reset Operational Summary button restarts all of the Operational Summary timers.
Model 1150A DVOR 3.6.7.3.2 Alarm Log Screen The Alarm Log Screen is shown in Figure 3-16. This screen provides the latest 100 alarms state changes that have occurred. When 100 or more state changes have occurred, subsequent alarms will replace the oldest alarm state change in the log. Entries in the log identify the date and time the alarm occurred, the type of alarm event, the test that detected the alarm, and the current status of the alarm condition.
Model 1150A DVOR 3.6.7.3.3 Maintenance Alert Log Screen The Maintenance Alert Log Screen is shown in Figure 3-17. This screen provides the latest 100 maintenance alert state changes that have occurred. When 100 or more state changes have occurred, subsequent alerts will replace the oldest events in the log. Entries in the log identify the date and time the alert occurred, the type of alert, and a short description of the alert event, and the current status of the alert condition.
Model 1150A DVOR 3.6.7.3.4 Command Activity Screen The Command Activity Log Screen is shown in Figure 3-18. This screen provides the latest 100 commands issued. When 100 or more commands have been issued, subsequent commands will replace the oldest commands in the log. The Command Activity Log screen specifies the date and time, identifies the operator logged on to the system when the command was issued, and the command that was issued.
Model 1150A DVOR 3.6.7.3.5 Parameter Change Log Screen The Parameter Change Log Screen is shown in Figure 3-19. This screen provides the latest 100 changes made in the operator parameters. When 100 or more changes have been made, subsequent changes will replace the oldest changes in the log. The Parameter Change screen specifies the date and time, identifies the operator logged on to the system when the change was made, and the file in which the data was changed.
Model 1150A DVOR 3.6.7.4 RMS Configuration Screen The PMDT contains the following RMS Configuration Screens that are used to define the operating parameters for the RMS. NOTE Any changes to the backplane switches must be followed by cycling the DVOR rack power or pressing the Reset on the LCU to make the changes take effect. Any configuration changes intended to remain after subsequent power cycling or system resetting MUST be backed up before cycling/resetting.
Model 1150A DVOR 3.6.7.4.1 General RMS Configuration Screen The RMS’s General Configuration screen is shown in Figure 3-20. This screen allows the operator to configure the general parameters of the VOR system. Figure 3-20 RMS General Configuration Screen The parameters in the General Configuration Screen must be set to correctly correspond to the equipment installation at each site.
Model 1150A DVOR Parameter Table 3-3 General Configuration Parameters Description Monitor/LCU Configuration Monitor Integrity Tests Enabled Monitor Voting Logic (applies to Dual Monitor/Transmitter systems) Transfer Logic Monitor Integrity test is enabled when checked. Selects either AND or OR voting logic for multiple monitor systems. When OR voting logic is enabled, the additional option of reverting to AND logic when on Standby is available.
Model 1150A DVOR 3.6.7.4.2 Station Configuration Screen The Station Configuration Screen is shown in Figure 3-21. This screen is used to configure the various system-level parameters for the VOR station: CVOR/DVOR, Dual/Single Transmitter Dual/Single Monitors, Dual Monitor Inputs, and the station’s Transmitter Frequency. The value for each of these settings currently stored in the RMS, Monitors, and Audio Generators is also displayed for reference.
Model 1150A DVOR The user should set the User Configuration parameters as required and press “Apply”. Pressing the “Display DIP Switch Settings” button will display the corresponding DIP switch settings for the Backplane DIP switches as shown in Figure 3-22. Review the display. Switches that are not set per the User Configuration are indicated in yellow. These DIP switches should be set according to the displayed information.
Model 1150A DVOR 3.6.7.4.3 Power Supply Limits Configuration Screen The Power Supply Limits screen is shown in Figure 3-23. This screen is used to configure the upper and lower alarm limits and enable limit checking for the various system power supply voltages and currents. The checkboxes are used to enable the corresponding parameter's Maintenance Alert. If the checkbox is checked, a Maintenance Alert will be generated when the parameter is out of the specified limits.
Model 1150A DVOR 3.6.7.4.4 A/D Limits Configuration Screen The A/D Limits Configuraiton Screen is shown in Figure 3-24 . This screen is used to configure the upper and lower alarm limits and enable limit checking for the Spare Analog voltages and system temperatures. The checkboxes are used to enable the corresponding parameter's Maintenance Alert. If the checkbox is checked, a Maintenance Alert will be generated when the parameter is out of the specified limits.
Model 1150A DVOR 3.6.7.4.5 Security Codes Configuration Screen The Security Codes screen is shown in Figure 3-25. This screen is used to configure the security access credentials for each user, including User ID, Password, and Security Level. This User ID/Password information is encrypted and stored in the non-volatile RAM (NVRAM) on the RMS CCA. This screen is only available to the Level 4 user. Figure 3-25 Security Codes Configuration Screen 3.6.7.4.5.
Model 1150A DVOR 8. 9. When all users have been configured, press the Apply button to save the new User Account data. This will clear the asterisks in the password field to hide the length of the password. Note that any changes under User Configuration must be made while in the “Local” mode and not take affect until the “Apply” button is pressed.
Model 1150A DVOR 3.6.7.5 RMS Commands The RMS Commands menu, shown in Figure 3-26 through Figure 3-30, provides system level controls for setting the time and date of the VOR station to the PMDT PC’s current settings, changing the current user’s password, setting the system’s Fan Control, setting the level of any of the Spare Digital Outputs, controlling the BCPSs, resetting the Intrusion and Smoke Detectors, resetting the RMS hardware, and basic control of a co-located 1118/1119 DME if so equipped.
Model 1150A DVOR Figure 3-27 RMS Commands – Selection of Digital Output Level Figure 3-28 RMS Commands – Selection of Digital Output Level Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Figure 3-29 RMS Commands - BCPS Charger Enable and Disable Figure 3-30 RMS Commands - DME Controls The DME Commands sub-menu of the RMS Commands menu shown in Figure 3-30 is used for basic control of a co-located Fernau DME. It is only available if the DME is configured present in the RMS >> Configuration >> General screen. 3-34 Rev.
Model 1150A DVOR 3.6.8 Monitor Screens 3.6.8.1 All Monitor Screens The following screens provide status, data, and controls applicable to both monitors. 3.6.8.1.1Monitors Data Screens 3.6.8.1.1.1 Integral Monitor Data Screen The Integral Monitor screen is shown in Figure 3-31. This screen displays the current integral monitor parameters for Monitor 1 and Monitor 2. A green background for a parameter indicates that the parameter falls within the Prealarm and Alarm limits.
Model 1150A DVOR 3.6.8.1.1.2 Notch Monitor Data Screen The Notch Monitor Screen is shown in Figure 3-32. This screen displays the Notch Monitor data from the associated Monitor. The monitor measures the signal from the Field Monitor for “notches” in the detected signal. A notch indicates a fault in one or more transmitting antennas, feed cables or commutator switch channels. When a failure occurs in one of these channels there is a lack of signal and therefore a notch in the detected signal pattern.
Model 1150A DVOR 3.6.8.1.1.3 Sideband Antenna VSWR Screen The Sideband Antenna VSWR screen is shown in Figure 3-33. This screen displays the current Sideband Antenna VSWR data for the associated monitor. Note that Sideband VSWR Data is only displayed for the monitor associated with the on-air transmitter.
Model 1150A DVOR 3.6.8.1.2 Monitor Configuration Screens The PMDT contains the following Monitor Configuration Screens that are used to configure the VOR’s Monitors. These screens and their contents are described below. 3.6.8.1.2.1 General Configuration Screen The General Configuration screen is shown in Figure 3-34. This screen is used to configure the general operation of the VOR’s Monitors. It contains controls used to enable the Executive Alarm for various monitored parameters.
Model 1150A DVOR 3.6.8.1.2.2 Monitor Alarm Limit Configuration Screen The Monitor Alarm Limit Configuration screen is shown in Figure 3-35. This screen is used to configure the operation of the Monitors. It contains the Shutdown Delay, the Ident Delays, and the Alarm and Pre-Alarm Limits, as well as the desired Nominal values for all of the monitored parameters. The Azimuth Angle settings are separated for Monitor 1 and Monitor 2 to allow for two different field monitor positions.
Model 1150A DVOR 3.6.8.1.3 Monitor Commands The Monitor Command menu is shown in Figure 3-36. The Monitors can be bypassed using the corresponding command under the Monitors >> Commands menu. Alternatively, the bypass button on the sidebar and LCU can be used. Figure 3-36 Monitor Commands 3.6.8.2 Monitor 1 & 2 Screens The PMDT contains a set of screens for each of the two Monitor CCAs in the VOR. Only the screens for Monitor 1 are discussed in this section; those for Monitor 2 in a Dual VOR are identical.
Model 1150A DVOR 3.6.8.2.1.1 Integral Monitor Data Screen The Integral Monitor Data screen is shown in Figure 3-37. This screen displays the low and high alarm limits and pre-alarm limits with current Integral Monitor values for the selected monitor. A green background for a parameter indicates that the parameter falls within the Prealarm and Alarm limits. A yellow background indicates that the parameter falls outside of the Prealarm limits but is still within the Alarm limits.
Model 1150A DVOR 3.6.8.2.1.2 Monitor Status Screen The Monitor Status Screen is shown in Figure 3-38. This screen displays the general status of the associated Monitor, including any Primary/Secondary Alarms, Pre-Alarms, Maintenance Alerts, Operating Mode and Diagnostic status. Figure 3-38 Integral Monitor Status Screen 3-42 Rev.
Model 1150A DVOR 3.6.8.2.2 Monitor Test Results Screens The Automatic Monitor Integrity Test feature uses the RMS processor to control the Test Generator in order validate the Monitors ability to detect an out of tolerance condition. The Test Generator applies VOR composite signals to the executive monitor channels on both Monitor 1 and Monitor 2 near the alarm limits to verify the ability of the monitors to determine alarm conditions.
Model 1150A DVOR 3.6.8.2.2.1 Completed Test Results The Completed Test Results screen is shown in Figure 3-39. This screen displays the results of the last Alarm Limit Integrity Test performed by the associated Monitor. It shows the measurements made in each integrity test, as well as the high and low alarm limits for each measurement. Each test result includes the data from the test along with a pass/fail indication by color of background.
Model 1150A DVOR 3.6.8.2.2.2 In Process Test Results The In Process Test Results screen is shown in Figure 3-40. This screen displays the results of the current Alarm Limit Integrity Test being performed by the associated Monitor. It shows the measurements being made in each integrity test, as well as the high and low alarm limits for each measurement. Each test result includes the data from the test along with a pass/fail indication by color of background.
Model 1150A DVOR 3.6.8.2.2.3 Monitor1>>Test Generator Screen The Monitor 1 Data>>Test Generator screen is shown in Figure 3-41. This screen displays the Monitor data obtained during the last Test Generator cycle for the associated Monitor. The Test Generator runs continuously, starting a new test cycle approximately every 2 minutes. The Test Generator parameters may be changed by entering the desired values. Figure 3-41 Test Generator Screen 3-46 Rev.
Model 1150A DVOR 3.6.8.2.3 Monitor Fault History Screens The PMDT’s Fault History screens display the system data that is recorded for the last three alarm condition events. This data can be used to determine the cause of the system fault. 3.6.8.2.3.1 Integral Monitor Fault History Screen The Integral Monitor Fault History screen is shown in Figure 3-42. The Prior to Alarm #1 column contains the last good measurements made prior to the last alarm condition which shutdown the system.
Model 1150A DVOR 3.6.8.2.3.2 Local Control Unit Fault History System Status Screen The Fault History System Status screen is shown in Figure 3-43. This screen shows the LCU status and antenna configuration at the time of the last three fault conditions. Figure 3-43 Local Control Unit Fault History System Status Screen 3-48 Rev.
Model 1150A DVOR 3.6.8.2.4 Monitor Offsets and Scale Factors The Monitor Offsets and Scale Factors screen is shown in Figure 3-44. This screen is used to calibrate each Monitor independently of the other. Each parameter measured by the monitor may be scaled to display a corrected value. The Test Generator should be used as the initial reference for the offsets and scale factors.
Model 1150A DVOR 3.6.8.2.5 Monitor Test Signal Output Control The Monitor Test Signal Output Control is shown in Figure 3-45. This screen is used to connect the desired signal to the Test BNC connector (J3) on the front of the Monitor circuit card assembly for maintenance purpose. Each of the signals are available to be connected to test equipment. The default signal connected to the Test connector is the Integral composite. Selection of these signals has no effect on the Monitoring performance.
Model 1150A DVOR 3.6.8.3 Transmitter Data Screens The VOR Transmitter Screens described below contain the various status and controls for the VOR transmitters. 3.6.8.3.1 Transmitter Data Screen The Transmitter Data screen is shown in Figure 3-46. This screen displays the current transmitter data as measured by the Audio Generator and Monitor CCAs. The power level and VSWR data are measured by the associated Audio Generator CCA. The frequency data is measured by the associated Monitor.
Model 1150A DVOR 3.6.8.3.2 VOR Ground Check Data Screen The 1150A DVOR provides the ability to perform a ground check. The Ground Check Data Screen is shown in Figure 3-47. This screen is used to initiate a VOR Ground Check and display of the data from the ground check. SAFETY CRITICAL NOTE The DVOR Automatic Ground Check changes the radiated signal and a NOTAM SHALL be issued to notify that the DVOR is not in service during this test.
Model 1150A DVOR 3.6.8.3.3VOR Ground Check Data Advanced Screen The Advanced Ground Check Data Screen is shown in Figure 3-48. This screen shows VOR Ground Check Data in more detail than the previous Ground Check screen. By selecting one of the graph options the data appears on the graph along with the optional legend for that data set. The graph can be printed by pressing the Print button. The data can be stored to a file by pressing the Copy or Save As button.
Model 1150A DVOR 3.6.8.3.4Transmitter Status Screen The Transmitter Status Screen is shown in Figure 3-49. This screen shows the current state of the Transmitter. A separate screen is provided for each transmitter. The ROM, RAM, Functional, EEPROM, COMM and CRC faults are background tests run on the Audio Generator. Failure of any of these items or the CPU Shutdown indicate Audio Generator CCA hardware failure.
Model 1150A DVOR 3.6.8.4 Transmitter Configuration Screens 3.6.8.4.1 Nominal Configuration Screen The Nominal Transmitter Configuration screen is shown in Figure 3-50. This screen is used to specify the transmitter waveform created by the Audio Generator. Figure 3-50 Nominal Transmitter Configuration Screen Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 3.6.8.4.2 Transmitter Offsets & Scale Factors The Transmitter Offsets and Scale Factors screen is shown in Figure 3-51. This screen is used to configure the parameters of each of the two transmitters independently from the other. The Azimuth Angle Offset, Output Power scale, Voice Modulation Scale, Ident Modulation Scale and Reference Modulation Scale offsets modify the corresponding values found in the Transmitters Configuration >> Nominal screen.
Model 1150A DVOR 3.6.8.5 Transmitter Commands The Transmitter Commands menu is shown in Figure 3-52. These commands provide direct control of transferring between the Main and Standby transmitters, controlling the output of Transmitter 1 or 2, or setting the between Normal, Continuous, or No Ident output. Note that the Transmitter control commands can also be accessed using the corresponding buttons in the PMDT’s Sidebar. Selection of Hold Commutator brings up Figure 3-53.
Model 1150A DVOR 3.6.8.6 Diagnostics Screen 3.6.8.6.1 Power-Up Diagnostics Results The Power-up Diagnostics Results screen is shown in Figure 3-54. This screen shows the results of the most recent power-up diagnostics test. Each time any of the navaid’s embedded processors is reset or powered up, it performs a series of internal diagnostic tests to verify its integrity. The results of those tests are displayed on this screen for the RMS, Monitors and Audio Generators.
Model 1150A DVOR 3.6.8.6.2 Fault Isolation Test Results The VOR Fault Isolation screen is shown in Figure 3-55. This screen shows the results of the most recent Fault Isolation Test. Pressing the “Run Full Diagnostic”, which is only available in Local Mode from Security Level 3 or higher, causes the system to execute the complete built-in diagnostics. This requires the system to be NOTAM’d off.
Model 1150A DVOR 3.6.8.7 Controlling the Transmitter via the PMDT Transmitter parameters are adjusted using the Nominal Screen (Figure 3-50) and the Transmitter Offsets and Scale factors Screen (Figure 3-51). Refer to these screens for the following paragraphs. 3.6.8.7.1General Transmitter Control With Transmitter #1 on the antenna, configure the Transmitter>>Configuration>>Nominal settings for the desired operation as measured by the Monitor.
Model 1150A DVOR 3.6.8.7.6 Change the Reference Depth of Modulation To affect both Transmitter #1 and Transmitter #2, select Transmitters >> Configuration >> Nominal. Adjust the Reference depth of modulation by selecting the Reference Modulation parameter with the mouse then either enter the value or use the spin controls. Press the Apply button (or the “F7” key) to apply the change.
Model 1150A DVOR 3.8 CONTROLS AND INDICATORS The locations, descriptions and functions of the 1150A VOR Controls and indicators are described in Figure 3-56 through Figure 3-69 and Table 3-4 through Table 3-17. 3.8.1 POWER CONTROL PANEL The Power Control Panel mounts on the front lower section of the VOR equipment cabinet. The functions of each switch and indicator are described in Table 3-4.
Model 1150A DVOR 3.8.2.1 LCU Display Messages The LCU has a touch screen to display monitored information. Navigation between the screens is achieved by pressing the Prev (Previous) and Next buttons on the display. 3.8.2.1.1 Integral Monitor The LCD displays a subset of the readings without limits for the parameters contained in the Monitors>>Data screen. Separate screens are provided for each Monitor. Figure 3-57 shows the Monitor Integral data display.
Model 1150A DVOR Figure 3-61 LCU Transmitter Temperature Readings Table 3-5 Equipment Control Panel Functions (Refer to Figure 3-62) Note: Switches are active in Local Mode only. TRANSMITTER (Refer to Figure 3-54) Pressing Main Select 1 switch sets transmitter 1 as the main transmitter and places TX1 on the antenna and in Main Select 1 and Indicator the ON mode. The indicator in the switch illuminates to identify that TX 1 is selected as the Main.
Model 1150A DVOR Figure 3-62 LCU Transmitter Controls and Indicators Figure 3-63 LCU Monitor/System Controls and Indicators Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Table 3-6 Equipment Control Panel Functions SYSTEM (Refer to Figure 3-63) Local Control, Indicator Switch Alarm Silence Switch Lamp Test Switch Reset Switch Maintenance Alert Indicator Remote Control Fault Indicator Battery Fault Indicator On Battery Indicator Interlocked Off Indicator LCU Power Ok Volume and Pressing the switch toggles Local Control Mode. The indicator illuminates when Local Control Mode is enabled.
Model 1150A DVOR 3.8.3 BCPS Asssembly Assembly (1A5A3, 1A5A4) Refer to Table 3-8 for the indicators and on the Battery Charging Power Supply (BCPS) Assembly. Figure 3-64 BCPS Assembly Controls and Indicators Table 3-8 Equipment Controls & Indicators Battery Charger Power Supply (BCPS) (Refer to Figure 3-64) AC ON DC ON AC FAIL BATTERY FAULT ON BATTERY FAST CHARGE TRICKLE CHARGE CHARGER RESET CPU OK This LED indicates that the AC voltage is present at the input to the VOR.
Model 1150A DVOR 3.8.4 Carrier Amplifier Assembly (1A5A3, 1A5A4) Refer to Table 3-9 for the indicators and connectors on the Carrier Amplifier Assembly. Table 3-9 Carrier Amplifier (1A5A3/1A5A4) Carrier Amplifier (Refer to Figure 3-65) CSB Sample Detected CSB Power OK LED This is a sample of the RF output signal for use by external test equipment. This is the detected video from the RF output. It allows the technician to observe output modulation and power.
Model 1150A DVOR 3.8.5 Monitor CCA (1A3A3, 1A3A10) Refer to Table 3-10 and Figure 3-66 for the indicators and controls on the Monitor CCA.
Model 1150A DVOR 3.8.6 Remote Monitoring System (RMS) CCA Refer to Table 3-11 and Figure 3-67 for the RMS CCA indicators and controls). Auxiliary USB PMDT USB CPU OK LED Table 3-11 Equipment Controls and Indicators This port is reserved for future expansion. This port interfaces with a portable PC computer and associated control and monitoring software (Portable Maintenance Data Terminal). This LED when lit (GREEN) indicates that the RMS is operating normally.
Model 1150A DVOR 3.8.7 Facilities CCA (1A3A7) Refer to Table 3-12 for the indicators and controls on the Facilities CCA. Table 3-12 Equipment Controls and Indicators Facilities CCA (Refer to Figure 3-68) This output device allows the technician to hear the audio output from the device selected in the RMS >> Commands >> Select Audio. The possible choices are: DME 1 Ident, DME 2 Ident This LED when lit (GREEN) indicates that the DC voltages are within tolerance.
Model 1150A DVOR 3.8.8 Synthesizer CCA (1A3A1, 1A3A11) Refer to Figure 3-69 and Table 3-13 for the indicators and controls on the Synthesizer CCA. Figure 3-69 Synthesizer Controls and Indicators 3-72 TP0 Table 3-13 Synthesizer CCA (1A3A1, 1A3A11) Controls and Indicators This test point is available for scope or voltmeter ground. TP1 Carrier Phase Error Voltage. TP2 Carrier Phase Control Voltage. TP3 DVOR Sideband to Carrier Phase Control Voltage. Rev.
Model 1150A DVOR 3.8.9 Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A5, 1A4A6) Refer to Figure 3-70 and Table 3-14 for the indicators and controls on the Sideband Generator assembly. Refer to paragraph 6.4.16 for alignment procedures. Figure 3-70 Sideband Generator Controls Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Table 3-14 Sideband Generator (1A4A1, 1A4A2, 1A4A5, 1A4A6) Controls and Indicators TP0 Ground TP1 Phase detector voltage. This is a DC voltage representing the detected phase difference of the input to the output of Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6). If the control loop is locked this voltage should be nearly 0.9 volts. TP2 This test point is the detected output of the Sideband 1 (1A4A1, 1A4A5) or Sideband 3 (1A4A2, 1A4A6) output.
Model 1150A DVOR 3.8.10 Audio Generator CCA (1A3A2, 1A3A9) Refer to Figure 3-71 and Table 3-15 for the indicators and controls on the Audio Generator CCA. Figure 3-71 Audio Generator Controls and Indicators TP0 Table 3-15 Audio Generator CCA (1A3A2, 1A3A9) Controls and Indicators Ground TP1 Carrier Amplifier Modulation.
Model 1150A DVOR 3.8.11 Low Voltage Power Supply (LVPS) CCA (1A3A4,1A3A8) The LVPS has only a Power OK LED on the front panel to indicate when the internally generated power is within tolerance. 3.8.12 Test Generator CCA (1A3A5) Refer to Figure 3-72 and Table 3-16 for the indicators and controls on the Test Generator CCA. Figure 3-72 Test Generator Controls and Indicators TP4 Table 3-16 Test Generator CCA (1A3A5) Controls and Indicators Ground TP1 Scope Synchronization.
Model 1150A DVOR 3.8.13 RF Monitor Assembly (1A4A4) Refer to Figure 3-73 and Table 3-17 for the indicators and controls on the RF Monitor assembly CCA. Figure 3-73 RF Monitor Controls and Indicators TP0 Table 3-17 RF Monitor CCA (1A4A4) Controls and Indicators Ground TP1 Detected Carrier Forward Power. The RF Monitor detects the forward power port of the directional coupler. TP2 Detected Carrier Reflected Power. The RF Monitor detects the reflected power port of the directional coupler.
Model 1150A DVOR THIS SHEET INTENTIONALLY BLANK 3-78 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR STANDARDS AND TOLERANCES 4 4.1 INTRODUCTION Table 4-1 is a list of equipment parameters, their standards, and their limits. In the Parameter column, each parameter measured or adjusted is listed. The paragraphs of Section 6 and Section 9 that describe the procedures used to establish the values of the parameters are listed in the Reference Paragraph column. In the Standard column are listed the optimum values of the parameters.
Model 1150A DVOR Parameter (3) 9960 Hz Modulation Low (4) 9960 Hz Modulation High (5) 9960 Hz Deviation Low (6) 9960 Hz Deviation High (7) Azimuth Shift Low (8) Azimuth Shift High j. Monitor Limits (1) Azimuth Angle Low (2) Azimuth Angle High (3) 30 Hz AM Modulation Low (4) 30 Hz AM Modulation High (5) 9960 Hz Modulation Low (6) 9960 Hz Modulation High (7) 9960 Hz Deviation Low (8) 9960 Hz Deviation High (9) Field Intensity Low k.
Model 1150A DVOR Table 4-1 Standards and Tolerances Operating Initial Standard Tolerance Tolerance Parameter k. Monitor Integrity Test Limits (7) 9960 Hz Deviation Low (8) 9960 Hz Deviation High Established Deviation Low Established Deviation High ±0.1 ±0.1 Same As Initial Same As Initial Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR THIS SHEET INTENTIONALLY BLANK 4-4 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 5 PERIODIC MAINTENANCE 5.1 INTRODUCTION This section contains instructions for system level performance testing and maintenance of the VOR. The DVOR is capable of continuous, unattended operation. Maintainability is based on a schedule consisting of a quarterly and annual performance checks. The performance checks are described in the paragraphs referenced in Section 6. 5.
Model 1150A DVOR THIS SHEET INTENTIONALLY BLANK 5-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 6 MAINTENANCE PROCEDURES 6.1 INTRODUCTION This section provides the procedures required for accomplishing incidental maintenance activities. This section is divided into three parts: performance check procedures (Paragraph 6.2), other maintenance procedures (Paragraph 6.3), and special maintenance procedures (Paragraph 6.3). 6.1.
Model 1150A DVOR 6.2 PERFORMANCE CHECK PROCEDURES Should abnormal performance occur during the performance check procedures, refer to Section 7. 6.2.1 Battery Backup Transfer Performance Check a. b. c. d. Select RMS>>Status. With all cabinet circuit breakers in the ON position (AC and DC), turn off AC circuit breaker for Transmitter 1. Verify that the DVOR system continues to function and that “On Batteries” changes from No to Yes.
Model 1150A DVOR 6.2.5 Modulation Frequency Performance Check a. b. h. c. d. Verify that transmitter 1 is operating on antenna by pointing and clicking on the Sidebar Tx1 Antenna. Select Transmitters>> Data>>Transmitter 1. Verify that the 30 Hz AM frequency is within the tolerance of Table 4-1(c)(4). Verify the 30 Hz FM frequency is within the tolerance of Table 4-1(c)(3). Verify the 9960 Hz frequency is within the tolerance of Table 4-1(c)(2).
Model 1150A DVOR d. e. f. Select Monitor 2>>Data>>Status Screen. Verify that no maintenance alerts are backlit in yellow. Verify that no alarm indications are backlit in red. 6.2.9 Monitor Integrity Test of VOR Monitor (Refer to Section 3.6.8.2.2) a. b. c. Select screen Monitor 1>>Test Results>>Completed.
Model 1150A DVOR f. g. h. i. j. Verify that the modulation is within the tolerance of Table 4-1(d)(4). Measure the Ident frequency and verify it is within the tolerance of Table 4-1(c)(5). Turn on transmitter 2 by pointing and clicking the Tx 2 antenna button. Connect oscilloscope probe to Transmitter 2 Carrier Amplifier 1A5A4-P2. Measure the high and low peak voltages and calculate the modulation by the following relation: Emax - Emin % Ident Modulation = ---------------------Emax + Emin k. l. m. n. o.
Model 1150A DVOR 6.3.4 Transmitter Cabinet Inspection a. b. c. Visually inspect interconnecting wire harnesses, coaxial cables and connectors for corrosion, cracks, breaks, and burns. Insure all RF connectors are tightened. Inspect all peripheral equipment connected to the DVOR, including the PMDT, printer, etc. Inspect the front panel indicators on the DVOR and assure that indicators are normal. 6.3.5 Battery Backup Unit Inspection Refer to Figure 9-4. a. b. c.
Model 1150A DVOR l. m. n. o. p. q. r. Use the PMDT to display RMS >> RMS Data >> Power Supply Data, AC Input Amps and verify the reading is within 0.3 amps of DVM reading. If not within 0.3 amps adjust 1A5A2 BCPS R56 so the RMS >> RMS Data >> Power Supply Data, AC Input Amps is within 0.3 amps. Turn off TX 1 and TX 2 AC and DC circuit breakers. At the shelter circuit breaker panel turn off AC power for the VOR station. Remove the DVM and reconnect the AC line wire to the AC Monitor (1A6) TB3 position 1.
Model 1150A DVOR l. m. n. o. p. q. Use the PMDT to display RMS >> RMS Data >> Power Supply Data, OB Light Amps and verify the reading is within 0.3 amps of DVM reading. If not within 0.3 amps adjust 1A5A2 BCPS R44 so the RMS >> RMS Data >> Power Supply Data, OB Light Amps is within 0.3 amps. At the shelter circuit breaker panel turn off AC power for the VOR obstruction lights. Remove the DVM and reconnect the OB LITE line wire to the AC Monitor (1A6) TB1 position 2.
Model 1150A DVOR l. m. n. o. p. Select screen Monitors>>Data>>Sideband Antenna VSWR, observe odd numbered Antenna VSWR. The displayed VSWR should be between 1.20 to 1.27 for odd numbered antennae. If not within range then the 1A4A1 Sideband amplifier (with built-in VSWR measurement circuitry) should be replaced. Turn both transmitters off. Move the load barrel, bullet, and TEE to the Sideband 2 feed cable at 1A10J25. Turn on both transmitters.
Model 1150A DVOR l. m. n. o. p. q. r. s. t. u. v. w. x. y. z. aa. bb. cc. dd. ee. ff. gg. hh. ii. jj. If the levels are not the same, carefully adjust Transmitter 2 Sideband 1 forward power detector potentiometer 1A4A6R2 located on the Sideband Generator Assembly. Point and click the off button to turn off both VOR transmitters. Move the 5 Watt plug-in element and the thru-line wattmeter body from the Sideband 1 output to the Sideband 2 output at 1A10J25. Turn on Tx 1.
Model 1150A DVOR e. f. g. h. Turn on AC/DC power on VOR front panel. Place the VOR in LOCAL mode. Select System>> Configuration Load, and select the Filename saved in Step a. Select RMS>> Config Backup. Set the current date and time by selecting RMS>> Commands>> Set Time and Date, [enter]. 6.4.10 Update of DVOR Software NOTE During the product life cycle software updates may become available for the VOR product in service.
Model 1150A DVOR k. l. Read the field intensity value in Monitors>> Data>> Integrity data and subtract the reading from 0.0. The change should be less than 1 dB. Place this offset value in Monitors>> Configuration>> Offsets and Scale Factors for Monitor 1 and for Monitor 2. 6.4.13 DME Keying Check This procedure is used on systems where the DVOR is collocated with a DME. a. b. c. d. e. Place the DVOR in normal. Select (on VOR) RMS>>Commands>>Select Audio>Transmitter 1 Ident. Place DME in normal.
Model 1150A DVOR f. g. h. i. Measure the voltage at 1A3A1TP2, carrier phase loop control voltage. This voltage must be between 2 volts and 8 volts. Adjustment of the Transmitters>> Configuration >>Carrier PLL control can result in two different settings that result in 0.0 +/- 0.05 volts on TP1. If TP2 is below 2 volts, or above 8 volts repeat steps e and f until the result 0.0 +/- 0.05 volts on TP1 with TP2 between 2 and 8 volts is achieved.
Model 1150A DVOR n. o. p. q. r. s. t. u. v. w. Turn on power, turn on the Transmitter and place in bypass. Connect a DVM to 1A4A1 TP5. Adjust 1A4A1R1 for 0.89 to .91 Vdc. Connect DVM to 1A4A1TP4. Verify that the voltage is between 2 and 9 Vdc. Refer to Figure 3-66. Connect a DVM to 1A4A1 TP7. Adjust 1A4A1R4 for 0.9 to 0.95 Vdc. Connect a DVM to 1A4A1 TP11. Adjust 1A4A1R1 for 0.89 to .91 Vdc. Connect DVM to 1A4A1TP10. Verify that the voltage is between 2 and 9 Vdc.
Model 1150A DVOR h. i. j. k. A calculated VSWR exceeding 1.20:1, then is cause to suspect that the frequency change has affected the antenna tuning. With the DVOR operational select Monitors>> Data>> Sideband Antenna VSWR screen and view the sideband antenna VSWR readings. The frequency change may have affected the resonant point of the antenna. Attempts to improve their VSWR may not successful because the tuning stubs now appear to be cut too short.
Model 1150A DVOR THIS SHEET INTENTIONALLY BLANK 6-16 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 7 CORRECTIVE MAINTENANCE 7.1 INTRODUCTION This section contains instructions required for on-site corrective maintenance and offsite repair of the DVOR system. Required test equipment is defined and packing instructions are included in this section. 7.2 TEST EQUIPMENT REQUIRED Portable Maintenance Data Terminal with current SELEX Sistemi Integrati PMDT software. In addition hand tools such as straight and Phillips screwdrivers are required for the removal and replacement of modules. 7.
Model 1150A DVOR Figure 7-1 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 0 deg Azimuth Figure 7-2 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 45 deg Azimuth Figure 7-3 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 90 deg Azimuth 7-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Figure 7-4 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 135 deg Azimuth Figure 7-5 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 180 deg Azimuth Figure 7-6 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 225 deg Azimuth Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR Figure 7-7 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 270 deg Azimuth Figure 7-8 Waveform – Monitor 1A3A3/1A3A10 Composite Signal at 315 deg Azimuth 7.4 OFFSITE REPAIR There are no assemblies that require offsite overhaul or calibration. 7.5 PACKING INSTRUCTIONS Equipment requiring shipment from the site for repair shall be individually packaged and marked. All items sensitive to electrostatic discharge (ESD) shall be packed in ESD bags or containers. 7-4 Rev.
Model 1150A DVOR 8 PARTS LIST 8.1 INTRODUCTION Table 8-1 contains a list of the different variations of the Model 1150A DVOR. Table 8-2 contains a list of the kits and optional equipment used in the Dual Model 1150A DVOR.
Model 1150A DVOR Table 8-2 Model 1150A DVOR Kits and Optional Equipment Part Number Description 470209-0001 Carrier Antenna Kit Stand Alone w/o DME Antenna 470252-0001 Civil Installation Kit Field Monitor Tower 8-2 470360-0001 Portable Maintenance Data Terminal Kit (PMDT) Computer Kit 480163-0003 480163-0002 480163-0001 Spares Kit Spares Kit Spares Kit Full, Board & Modules Recommended Minimum Rev.
Model 1150A DVOR 9 INSTALLATION, INTEGRATION, AND CHECKOUT 9.1 INTRODUCTION This section contains installation data and initial tune-up procedures for the Model 1150A Doppler VHF Omnirange (DVOR) electronic subsystem. Refer to the appropriate equipment manuals for specific antenna installation and siting requirements. Before the equipment is installed, shelter construction must be completed. After equipment is unpacked and inspected, the installation work is divided into two major sections. a. b.
Model 1150A DVOR 9.5 INSTALLATION PROCEDURES 9.5.1 Tools and Test Equipment Required Refer to Table 9-1 for a list of special tools and test equipment required. Refer to Table 9-2 for a list of tools needed for installation but not for normal operation of the system. Table 9-1 Tools and Test Equipment (Equivalent tools and test equipment may be used) Part Number Description Dummy Load, 50 ohm, 100 Watt, Load, 1kW max.
Model 1150A DVOR Figure 9-1 Typical Shelter Foundation Drawing Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 9.5.3 Shelter Installation Shelter installation procedures are for an 8' x 12' shelter supplied by SELEX Sistemi Integrati Inc. a. b. Refer to Figure 9-1. Using a crane and four (4) nylon slings (20' long), position the equipment shelter on the concrete foundations. Attach shelter to the foundation anchor bolts using the 5/8" hardware and mounting plates. Install shelter ground rods. Refer to Figure 9-2. Figure 9-2 Shelter Grounding Diagram Notes: 1. 2. 3. 4. 5.
Model 1150A DVOR 9.5.5 Initial Conditions Turn off DVOR AC and DC Circuit Breakers. Do not turn on until instructions indicate to do so. 9.5.6 Sideband Antenna Installation The sideband antennas must be mounted on a radius of 22 feet from the center of the counterpoise and evenly spaced at 7.5° intervals. They must be uniform in height and at the same height as the carrier antenna which is mounted at the center of the counterpoise.
Model 1150A DVOR 9.5.9 Antenna Cable Exterior Cable Entrance Installation Refer to Figure 9-3. And Figure 11-24 (additional drawings provided with kit 470445-0001). NOTE The following installation may be altered to match local requirements. Fewer, larger conduits may be substituted in concrete shelters. The cable entrance may be made through the shelter ceiling in which case the top entrance through the commutator can be used. a. b. c. d. e. f. g. h. i. j. k. l.
Model 1150A DVOR 9.5.12 Battery Back Up Installation Refer to Figure 9-4. The installation procedures given in the kit drawing are those required for installing optional battery back unit (part number 470639-0001/0002/0003) in supplied shelter. Figure 9-4 Battery Backup Kit Installation 9.5.13 DC Voltage and Battery Installation a. b. c. d. e. f. Insure VOR system AC and DC circuit breakers are in the OFF position.
Model 1150A DVOR f. g. h. Connect AC input ground (green wire) to 1A6 TB3-3. Connect AC low input (white wire) to 1A6 TB3-2. Connect AC high input (black wire) to 1A6 TB3-1. CAUTION Black, white and green wiring may also be used in installations outside the United States. Technicians must note that the black wire (equivalent to Blue) is the AC HIGH and the white wire (equivalent to brown) is the AC LOW.
Model 1150A DVOR 9.5.17 Obstruction Light Installation and Wiring The obstruction light assembly is shipped separately from the VOR antenna kits and it is necessary to attach the obstruction light to the top of the VOR Monitor or DME antenna; and the wiring that extends from the antenna must be connected to the bulb sockets. For connection of SELEX-SI DME antenna obstruction lights please refer to the DME manual. a. b. c. d. e. f. g. h. Remove lens and bulbs.
Model 1150A DVOR Figure 9-6 VOR Obstruction Light Interconnect Diagram without Photo Sensor 9.5.18 Cutting Antenna Cables to Proper Electrical Length The RF cables from commutator to the antenna cables are precut and phased matched at the factory. It is recommended that the cables remain at the length set by the factory. Excess cable should be neatly stored outside the shelter. The cables must be firmly held by tie wraps (provided) to prevent damage to stress caused by wind gusts.
Model 1150A DVOR Figure 9-7 Sideband RF Feed Cable to Commutator Connections (Viewed from the rear of the Transmitter Cabinet) 9.6 INSPECTION 9.6.1 Visual Inspection The visual inspection is made prior to operating or energizing the equipment. a. b. c. Visually inspect wire, RF coaxial cables and connectors for corrosion, loose connectors and improperly assembled connectors.
Model 1150A DVOR 9.7 INITIAL STARTUP AND PRELIMINARY TESTING The following paragraphs detail the step-by-step procedures for initial start-up and preliminary testing of the VOR. 9.7.1 Input Voltage Checks After the AC and DC power has been connected to the DVOR transmitter it is necessary to check the input power to ensure the proper voltage is applied to the system. a. b. c. d. e. f. g. Set the VOR AC and DC circuit breakers to the OFF position.
Model 1150A DVOR l. m. On the PMDT configuration screen, setup other options such as Language and Print Screen mode then select OK to save the changes. Refer to Section 3.6.6.2 to connect to the VOR equipment at Security Level 3. 9.7.5 Site Adjustments and Configurations a. b. c. d. e. f. g. h. i. j. k. Press the LOCAL CONTROL button on the 1A1 LCU to put the VOR into Local Mode. Locate the S3 DIP switch on the 1A3 Control Rack Backplane Circuit Card Assembly and Program S3 per Table 9-4.
Model 1150A DVOR S3 Switch Setting 12345678 10000000 01000000 11000000 00100000 10100000 01100000 11100000 00010000 10010000 01010000 11010000 00110000 10110000 01110000 11110000 00001000 10001000 01001000 11001000 00101000 10101000 01101000 11101000 00011000 10011000 01011000 11011000 00111000 10111000 01111000 11111000 00000100 10000100 01000100 11000100 00100100 10100100 01100100 11100100 00010100 10010100 01010100 11010100 9-14 Table 9-4 Frequency Selection Chart (S3 is located on the 1A3 Control Bac
Model 1150A DVOR S3 Switch Setting 12345678 00110100 10110100 01110100 11110100 00001100 10001100 01001100 11001100 00101100 10101100 01101100 11101100 00011100 10011100 01011100 11011100 00111100 10111100 01111100 11111100 00000010 10000010 01000010 11000010 00100010 10100010 01100010 11100010 00010010 10010010 01010010 11010010 00110010 10110010 01110010 11110010 00001010 Table 9-4 Frequency Selection Chart (S3 is located on the 1A3 Control Backplane) A “1” in the Table is a closed (on) position on the
Model 1150A DVOR 9.7.6 DVOR Station Power-Up Refer to Section 3 of this manual for detailed instruction on DVOR operation. The DVOR is microprocessor controlled, transmitter one will come up in the on-line mode as the normal mode of operation. a. b. c. d. Turn on the PMDT. Refer to Section 3 for operating instructions. Set TX1 AC and TX 2 AC circuit breakers to the ON position. Set TX 1 Battery and TX 2 Battery circuit breakers to the ON position.
Model 1150A DVOR g. h. i. j. k. l. m. n. o. p. q. r. s. t. u. v. w. x. y. z. aa. bb. cc. dd. ee. ff. gg. hh. ii. Adjust potentiometer 1A4A4R1 (CSB FWD ADJ) on the RF Monitor until Carrier Power displayed on the Transmitters>> Data>> Transmitter 1 screen indicates the same value as the wattmeter. Turn on transmitter 2 by using the mouse to point and click on the Transmitter 2 ON button. Insure that transmitter 2 is on the antenna. Select Transmitters>>Configuration>>Offsets and Scale Factors.
Model 1150A DVOR 9.7.12.3 Sideband Generator Phasing This procedure is performed to align sidebands 1 and 2 to the same phase with each other. A preliminary adjustment check is made at the Sideband Generator. This adjustment is then checked using the Carrier antenna. a. b. c. d. e. f. g. h. i. j. k. l. m. n. o. p. 9-18 Perform the procedure in paragraph 6.4.16. Install 5 watt dummy loads to sidebands 3 and 4 at the transmitter.
Model 1150A DVOR Figure 9-8 Sideband Phasing Diagram NOTE Bottom peaks within 5% of ground reference considered within tolerance. 9.7.13 Setting Transmitter Operating Parameters Before the carrier forward power, carrier VSWR, SBO forward powers, and SBO VSWRs can be calibrated it will be necessary to check/set Transmitter No. 1 and No. 2’s operating parameters. 9.7.13.1 Setting Transmitter Ident Code Type RMS>>Configuration>>then enter Transmitter 1’s ident, then press [enter]. Transmitter No.
Model 1150A DVOR e. Select Transmitters>>Configuration>>Offsets and Scale Factors. For the Tx #2 Ident Modulation Scale for Ident Modulation, enter a value from 0 to 200% to adjust the value entered into the Nominal setting to the correct value as determined by the viewing Monitors>>Data screen. NOTE Typical setting for ident modulation is 8.0% but may be adjusted according to local requirements. 9.7.13.4 Setting Transmitter Reference Modulation a. b. c. d. e.
Model 1150A DVOR 9.7.13.6 Setting Transmitter SBO Modulation a. b. c. d. e. f. g. Set TX1 and TX2 circuit breakers to the ON position. Place Transmitter 1 on the antenna by pressing the Main #1 button on the LCU or PMDT. Place the monitors in bypass. Select Monitors>>Data and view the 9960 Modulation level. Adjust Transmitters>>Configuration>>Offset and Scale Factors>> Tx Sideband RF Level Scale for Tx #1 so that Monitors>>Data 9960 Modulation level is 30%.
Model 1150A DVOR c. Enter the Az Angle Low PreAlarm Limit that is needed, then press [F7]. Monitor No 1 and 2’s new Az Angle Low PreAlarm Limit will be entered into the station’s temporary memory. 9.7.14.2 Setting Monitor Az Angle High Limit a. b. c. Select Monitors>>Configuration>>Alarm Limits. The Alarm and Prealarm limits will be displayed for Monitor 1 and Monitor 2. Enter the az angle high alarm limit that is needed, then press [F7].
Model 1150A DVOR 9.7.14.8 Setting Monitor 9960 Hz Dev High Limit d. e. f. Select Monitors>>Configuration>>Alarm Limits. The Alarm and Prealarm limits will be displayed for Monitor 1 and Monitor 2. Enter the 9960 Hz Dev high alarm limit that is needed, then press [F7]. Monitor No. 1 and 2’s new 9960 Hz Dev high limit will be entered into the station’s temporary memory. Enter the 9960 Hz Dev high prealarm limit that is needed, then press [F7]. Monitor No.
Model 1150A DVOR THIS SHEET INTENTIONALLY BLANK 9-24 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 10 SOFTWARE 10.1 INTRODUCTION Software documentation contains proprietary information and therefore is not included in this manual. Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR THIS SHEET INTENTIONALLY BLANK 10-2 Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Model 1150A DVOR 11 TROUBLESHOOTING SUPPORT INTRODUCTION 11.1 This section contains a list of drawings useful during installation and maintenance. Copies of all drawings can be found in the CDROM version of the manual. Drawings that are needed during installation are provided in paper form within the appropriate kit. Paper copies of all drawings can be purchased by contacting the SELEX Sistemi Integrati Inc. Customer Service organization. Description Schematic No.
Description Schematic No. Figure CDROM Sideband Amplifier CCA 012218-9001 11-21 X RF Monitor CCA 012220-9001 11-22 X Commutator Control CCA 012257-9001 11-23 X Power Installation Kit 470445 11-24 X Battery Backup Kit 470639 11-25 X 11-2 Kit Rev. - November, 2008 This document contains proprietary information and such information may not be disclosed to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
