HiLo3G-850 User manual HiLo3G-850 User Manual 04 March 2011 - Page 1 / 36
SOMMAIRE / CONTENTS 1. OVERVIEW ................................................................................................................................................................... 5 1.1. Document Objectives.............................................................................................................................................. 5 1.2. Reference Documents .......................................................................................................................
6.5 Other Recommendation—test for production/design ........................................................................................... 31 Audio Integration .......................................................................................................................................................... 31 7.1 Mechanical integration and acoustics ................................................................................................................... 31 7.2 Electronics and layout ..
Figures List Figure 1: HiLo3G-850 module Block diagram ......................................................................................................... 6 Figure 2: HiLo3G-850 module connector side ......................................................................................................... 7 Figure 3: HiLo3G-850 module back side ................................................................................................................. 7 Figure 4: SIM Card signals ................
1. OVERVIEW 1.1.Document Objectives The aim of this document is to describe some examples of hardware solutions for developing some products around the SagemCom HiLo3G-850 Module. Most parts of these solutions are not mandatory. Use them as suggestions of what should be done to have a working product and what should be avoided thanks to our experience.
2. Block Diagram Antenna Antenna Port RF_Con Power on Signal Power Control Power Supply HiLo3G-850 VBAT(4) VBACKUP VGPIO GND(4) DC 2.85V Battery 3.7V 47uF PWON UART Reset RESET USB Master USB Slave UART_DSR UART_DCD UART_TX UART_CTS USB_DP UART_RX USB_DN UART_RTS VUSB Full UART UART_RI UART_DTR UART_DSR Three GPIO GPIO GPIO 1 PWM GPIO 2 GPIO 3 External Analog input ADC Vibrating device PWM Audio Microphone ADC MIC_N MIC_P HSET_P USB Slave SIM 3V & 1.
3. Functional Integration Advancements in Silicon technologies head toward functionality improvement with less power consumption. The HiLo3G850 module with its industrial 40 pins connector meets all these requirements, using the latest high end technology in a very compact design of only 27 x 27 x 4.8 mm and weighs less than 7 grams. All digital I/Os among the 40 pins are in the 2.9V domain suitable for most systems except SIM I/O's, which can also be in the 1.
PIN No. C1 C2 C3 C4 C5 C6 C7 C8 Name VCC RST CLK NA GND VPP I/O N/A Figure 4: SIM Card signals The HiLo3G-850 module provides SIM signals to the 40 pins. A SIM card holder with 6 pins must be adopted to use the SIM function. Decoupling capacitors must be added on VSIM,SIM_DATA,SIM_RST,and SIM_CLK signals as close as possible to the SIM card connector to avoid EMC issues and pass SIM card approval tests.
NC R601 56 SIM_CLK_CARD 8 3 7 SIM_DATA_CARD 2 6 VSIM_CARD 1 5 33pF SIM_GPIO 2.2k R616 22pF C603 C602 10nF C601 10 VSIM_CARD R601 10 9 R602 10 SIM_RST_CARD NC 4 GND Figure 6: Serial resistors for protection of long SIM bus lines The schematic here above includes the hardware SIM card presence detector. It can be connected to any GPIO and managed with an AT command. The SIM card must not be removed from its holder while it is still powered.
Figure 7: Primary PCM mode timing parameter HiLo3G-850 User Manual 04 March 2011 - Page 10 / 36
Figure 8: Auxiliary PCM mode timing parameter HiLo3G-850 User Manual 04 March 2011 - Page 11 / 36
3.2.2 Analog Audio Analog audio is connected via MIC_N and MIC_P as input and HSET_N and HSET_P as output to the HiLo3G-850. Please note that external circuitries are mainly needed for the microphone and speaker. Speaker HiLo3G -850 ESD protection Mic. Figure 9: Analog audio connections 3.2.2.1 Microphone Note Careful attention must be given to the microphone device design because it must not be sensitive to RF disturbances.
Reference Bead: Murata BLM18HD102SN1D Figure 11: Filter and ESD protection for 32 ohms speaker C71 10uC16TAM10 R113 NC U22 TPA2010D1Y ZFT A1 C1 150kR2F C77 C2 IN+ IN- SPK1 BLM18HD102SN1D V_O+ V_O- C80 NC C3 A3 B3 SHUTDOWN* VIN_3.7 BLM18HD102SN1D 100KR2F C81 NC A2 B3 R114 B2 1 B1 C73 150kR2F PV_DD R112 2 SPKR_OUT-_1 10uC16TAM10 0.1uC2X7K16 V_DD C70 C74 10uC5X7K10 GND GND NC SPKR_OUT+_1 C72 B2 VIN_3.
voltage Gain error (absolute) Output referred noise Input impedance Parameter THD+N ratio Input capacitance Input offset voltage Signal-to-noise ratio MIC1N, MIC2P and MIC2N, or LINEIN_LP and LINEIN_LN, 0 dB gain Voltage across either MIC1P and MIC1N, MIC2P and MIC2N, or LINEIN_LP and LINEIN_LN, 24 dB gain 0 and 24 dB gain settings for all inputs. Measured at 13 dB below the maximum input level for the given gain setting.
Figure 14: Speaker performance requirements 3.3 PWM One PWM pin is available on the HiLo3G-850. It‘s a general purpose PWM which can be used for driving a vibrating device, keypad backlight or LED. The PWM pin can be controlled through AT commands, allowing several periods and duty cycles. More details are given in the AT commands specifications document. User application can set PWM output: Frequency between: 0.125Hz and 8KHz Duty range from: 0 to 100% 3.3.
3.4 Power Requirements The host system must supply 3.2V ~ 4.4V to VBAT. Within normal 2G and 3G operational modes, the maximum average current is about 1.1A depending on RF output power. In 2G mode peak current can be as high as 2A under matched antenna condition. Peak currents could occur up to 1.75A in the case of a mismatched antenna. In the 3G mode and under antenna mismatch condition, peak current may increase up to 700mA. VBAT traces are required to be as short and as wide as possible.
Figure 17: Complete V24 connection between the HiLo3G-850 and the host This configuration allows the use flow control RTS & CTS to avoid any overflow error during data transfer. Also, CTS is used to signal when the HiLo3G-850 is ready to receive an AT command after a power up sequence or a wake up from the sleep mode. PWRON CTS Figure 18: C In addition, this signal configuration enabled all signals : • RI signal used when programmed to indicate an incoming voice or data call or SMS incoming message, etc.
5V signals compatible with a PC. Figure 19: Connection to a data cable Pull-up resistors of 100KΩ to VGPIO must be connected to DCD, DSR and RI signals. Avoid supplying the UART before the HiLo3G-850 is ON, this could result in bad power up sequence. To have a proper behavior use the signal VGPIO to enable the RS232 Transceiver. 3.5.3 Partial V24 (RX-TX-RTS-CTS)—Connection HiLo3G-850 -host When using only RX/TX/RTS/CTS instead of the complete V24 link, the following schematic could be used.
However this configuration does not allow the signaling signals like: • RI signal used when programmed to indicate an incoming voice or data call or SMS incoming etc… • DCD signal used to signal the DATA connections • DSR signal used to signal the module UART interface is ON (need to pull high DSR with 470K ohm to external 3V, shown as below) • DTR signal used to prevent HiLo3G-850 from entering into sleep mode or to switch between Data and AT commands or to hang up a call or to wake up the module etc… 3
Figure 21: Partial V24 connection (2 wires) between HiLo3G-850 and host As DSR is active (low electrical level) once HiLo3G-850 is switched on, DTR is also active (low electrical level), therefore AT command AT+Ksleep can switch between the two sleep modes available for HiLo3G-850.
Thanks to some other special AT commands, GPIOs can for example be used: 1. Make an I/O toggling while the module is attached to the network 2. Make an I/O toggling when a programmed temperature is reached 3. As input to detect the presence of an antenna (with some external additional electronic) 4. As input to detect the SIM card presence …etc 3.7 ADC There is one ADC input pin which can be used to read the value of the voltage applied.
The resistor R depends on the charging current value provided by the battery manufacturer. 3.8.3 Backup Battery Technology 3.8.3.1 Capacitor Battery These kinds of backup battery do not have the drawbacks of the Lithium Ion rechargeable battery. As there are only capacitors: • The maximum discharge current is generally bigger, • There is no need to regulate the charging current.
4.2 Module Power up There are two ways to start HiLo3G-850, one is using PWON and the other is using USB. 4.2.1 PWON Power up To start the module, first power up VBAT, which must be in the range 3.2V ~ 4.4V, and able to provide 1.75A during the TX bursts. PWON is a low level active signal internally pulled up to a dedicated power domain to 2.9V. As PWON is internally pulled up, a simple open collector or open drain transistor can be used for ignition.
Figure 25: Power off sequence Send AT COMMAND ―AT+CPOF ― to power off module. 4.2.1.1 IO DC Presence before Power on When the VBAT is available but the module not yet started, the following I/O's raised their output. VBACKUP raise to 3V PWON raise to 1.8V 4.3 Power on and Sleep Diagrams Those 2 diagrams show the behaviors of the module and the DTE during the power on and then in the sleep modes. Note: The module cannot enter sleep mode if USB bus is connected.
Figure 26: Diagram for the power on HiLo3G-850 User Manual 04 March 2011 - Page 25 / 36
Figure 27: Diagram for the sleep mode 4.
4.4.1 UART Interface To stop the module, use the AT command AT+CPOF. If the PWON is not pulled down the module will switch to OFF mode after the AT command, otherwise the module restarts immediately (an OFF sequence is performed followed by a power ON sequence). Figure 28: Power off sequence for PWON, VGPIO and CTS 4.4.
contact areas such as antenna pads and connector. 5.1 Handling HiLo3G-850 HiLo3G-850 are packaged in boxes. HiLo3G-850 contains electronic circuits sensitive to human hand's electrostatic electricity. Handling without ESD protection could result in permanent damages or even destruction of the module. 5.
circuits. 6.1 Antenna Connection HiLo3G-850 provides two methods to connect an antenna, one is spring contact and the other is UFL RF connector. Definition of the reference antenna connector: • Strictly 50 Ohms matched impedance PCB tracks • Straight PCB tracks Antenna gain: • Radiation pattern: depending on antenna position and size of the device • Gain averaged in space in all frequencies: > -3dBi • Maximum VSWR: < 1.
Use low loss antenna cable (max. 0.5dB). To avoid interference choose an antenna type radiating off the device. Circular polarized antennas are preferred. Verify the operation of the antenna by measurement of the total radiated power. Avoid placing a transmit antenna close to sensitive areas (danger from interference). Apply EMC-design rules and follow shielding concepts. Separate of EMC-sensitive and high-emission areas. 6.
Do not add signal unvarnished layout trace on the first layer of the customer board, or unvarnished via holes under the module shield area or it will result on short circuit on those signals. This is mandatory. Free CAD software can be used to compute the stack-up parameters that leads to a compliant 50Ω RF track. 6.
Audio tracks must be larger than 0.5 mm. 8. Recommendations on layout of customer’s board 8.1 General recommendations on layout There are many different types of signals in the module which are disturbing each other. Particularly, Audio signals are very sensitive to external signals as VBAT... Therefore it is very important to respect some rules to avoid disruptions or abnormal behavior. Magnetic field generated by VBAT tracks may disturb the speaker, causing audio burst noise.
Data bus and commands have to be routed on the same layer, none of the lines of the bus shall be parallel to other lines Lines crossing shall be perpendicular Suitable other signals track width, thickness. Data bus must be protected by upper and lower ground plans 8.1.5 Radio Provide a 50 Ohm micro strip line for antenna connection 8.1.6 Audio Differential signals have to be routed together, parallel (for example HSET_P/HSET_N).
• Metalized plastic is not as effective as metal cans. • Shielded inductors might be needed in the DC/DC circuits, or they might need to be placed in their own shield area. Example of layout for customer’s board 8.2 The following figure shows an example of layer allocation for a 6- layers circuit (for reference only): Depending on the customer‘s design the layout could also be done using 4 layers. Figure 34: Reference 6 layers PCB stack 9.
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This device has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Labeling Requirements for the Host Device (from Section 3.2.1, RSS-Gen, Issue 3, December 2010):The host device shall be properly labeled to identify the module within the host device.
