Eclipse Ser ies RF Technology rfinfo@rftechnology.com.
CONTENTS CONTENTS Contents 1 Oper ating Instr uctions 1.1 Fr ont Panel Contr ols and Indicator s 1.1.1 PTT 1.1.2 Line 1.1.3 PWR LED 1.1.4 TX LED 1.1.5 ALARM LED 5 5 5 5 6 6 6 2 Tr ansmitter Inter nal J umper Options 2.1 JP2: EPROM type 2.2 JP3: Dc Loop PTT 2.3 JP4: Audio Input Source 2.4 JP6: Input Level Attenuation 2.5 JP7: Audio Response 2.6 JP8: Sub-audible Tone source 2.7 JP9/10/11: dc Loop Configuration 7 7 7 7 7 8 8 8 3 Tr ansmitter I/O Connections 3.
CONTENTS CONTENTS 7 Specifications 7.1 Over all Descr iption 7.1.1 Channel Capacity 7.1.2 CTCSS 7.1.3 Channel Programming 7.1.4 Channel Selection 7.1.5 Micro-processor 17 17 17 17 17 17 18 7.2 Physical Configur ation 18 7.3 Fr ont Panel Contr ols, Indicator s and Test Points 7.3.1 Controls 7.3.2 Indicators 7.3.3 Test Points 18 18 18 19 7.4 Electr ical Specifications 7.4.1 Power Requirements 7.4.2 Frequency Range and Channel Spacing 7.4.3 Frequency Synthesizer Step Size 7.4.
CONTENTS CONTENTS A Engineer ing Diagr ams A.1 Block Diagram A.2 Circuit Diagrams A.
1 OPERATING INSTRUCTIONS WARNING Changes or modifications not expressly approved by RF Technology could void your authority to operate this equipment. Specifications may vary from those given in this document in accordance with requirements of local authorities. RF Technology equipment is subject to continual improvement and RF Technology reserves the right to change performance and specification without further notice. 1 Oper ating Instr uctions 1.1 Fr ont Panel Contr ols and Indicator s 1.1.
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2 TRANSMITTER INTERNAL JUMPER OPTIONS 2 Tr ansmitter Inter nal J umper Options In the following subsections an asterisk (*) signifies the standard (Ex-Factory) configuration of a jumper. 2.1 J P2: EPROM Type Condition 27C256 27C64 Position 2-3 * 1-2 2.2 J P3: Dc Loop PTT This jumper enables or disables the keying of the PTT function by means of a dc signal passed down the 600Ω line input pair. When enabled, JP9-JP11 control how the dc signal is configured with respect to an internal opto-coupler.
2.5 JP7: Audio Response 2.5 J P7: Audio Response Condition 750 uSec. pre-emphasis Flat response 2.6 Position 1-2 * 2-3 J P8: Sub-audible Tone Sour ce Condition Internal CTCSS External input 2.7 4 CHANNEL AND TONE FREQUENCY PROGRAMMING Position 1-2, 4-5 * 2-3, 5-6 J P9/10/11: dc Loop Configur ation These settings are only relevant when the PTT signal is to be used across the same wires as the audio. Refer to setting of JP3.
4 CHANNEL AND TONE FREQUENCY PROGRAMMING Function dc power Channel Select RS232 Data 600Ω Line Signal +12 Vdc -12 Vdc 1 2 4 8 10 20 40 80 In Out High Low 150Ω / Hybrid Direct PTT input T/R Relay driver output Sub-Audible Tone Input High-Z Audio Input + + - External ALC input Pins 1, 14 13, 25 21 9 22 10 23 11 24 12 15 2 20 6 7 19 3 16 5 18 4 17 8 Specification +11.
5 CIRCUIT DESCRIPTION The VCO output is amplified and buffered by monolithic amplifiers MA2 and MA3 before being fed to the PLL IC U6. Amplifiers MA1, MA4 and MA5 increase the VCO output to approximately 4 mW to drive the power amplifier. MA1 is not switched on until the PLL has locked and had time to settle. This prevents any momentary off channel transmission when the transmitter is keyed. 5.
5 CIRCUIT DESCRIPTION 5.3 Power Amplifier The resulting control voltage supplies Q2 through R10, R12 and completes the power leveling control loop. 5.4 600Ω Line Input The 600Ω balanced line input connects to line isolation transformer T1. T1 has two 150Ω primary windings which are normally connected in series for 600Ω lines. The dual primary windings can be used to provide DC loop PTT signaling or a 2/4 wire hybrid connection. All four leads are available at the rear panel system connector.
5.8 Audio Signal Processing 5 CIRCUIT DESCRIPTION from U7c before it is combined with the voice audio signal in the summing amplifier U7a. Back to back diodes D4 and D5 limit the maximum tone signal amplitude to prevent excessive tone deviation when external tone sources are used. 5.8 Audio Signal Pr ocessing Jumper JP4 selects either the line or direct input source. The selected source is then connected to JP6.
5 CIRCUIT DESCRIPTION 5.10 Microprocessor Controller A bridge consisting of diodes D6, D8, D9 and D14 ensures correct operation regardless of the current polarity. Q17 limits the current and D7 limits the voltage input to ISO1. Any low voltage current source capable of providing 2 mA at 4 V or switching circuit with less than 4.8kΩ loop resistance can be used to switch the DC loop. The test PTT button on the front panel and the local microphone PTT button will also key the transmitter.
6 FIELD ALIGNMENT PROCEDURE 6.1 Standard Test Condition The procedures below do not constitute an exhaustive test or a complete alignment of the module, but if successfully carried out are adequate in most circumstances. TCXO calibration may be periodically required owing to normal quartz crystal aging. A drift of 1ppm/year is to be expected.
6.4 Modulation Balance 4. 6.4 6 FIELD ALIGNMENT PROCEDURE Measure the carrier frequency at the output connector, and adjust XO1 until the correct carrier frequency is measured, ±50Hz. Modulation Balance 1. Set RV3 fully counter clockwise (CCW) (sub-tone off). 2. Set RV1 fully clockwise (CW) (maximum deviation) 3. Set RV2 mid-position 4. Set JP7 for flat response 5. Key the transmitter on 6. Set the audio input to 150Hz, 0dBm. 7.
6 FIELD ALIGNMENT PROCEDURE 6.6 6.6 Deviation Deviation 1. Set RV4 (Line Level) fully clockwise (CW). 2. Set the audio to 1kHz, 0dBm, on the line input. 3. Key the transmitter on.. 4. Adjust RV1 (Set Max. Deviation) for a deviation of 5kHz (2.5kHz for narrow band transmitters). 5. Key the transmitter off. 6. Carry out the Line Input Level alignment procedure (section 6.7) 6.7 Line Input Level 1. Set the audio to 1kHz, 0dBm, on the line input, or use the actual signal to be transmitted.
7 SPECIFICATIONS 7 7.1 SPECIFICATIONS Over all Descr iption The transmitter is a frequency synthesized, narrow band FM unit, normally used to drive a 50 watt amplifier. It can also be used alone in lower power applications. Various models allow 2-25W of output power to be set across a number of UHF frequency bands. All necessary control and 600Ω line interface circuitry is included. 7.1.
7 SPECIFICATIONS 7.1.5 Microprocessor 7.1.5. Micr opr ocessor A microprocessor is used to control the synthesizer, tone squelch, PTT function and facilitate channel frequency programming. With the standard software, RF Technology modules also provide fault monitoring and reporting. 7.2 Physical Configur ation The transmitter is designed to fit in a 19 inch rack mounted sub-frame. The installed height is 4 RU (178 mm) and the depth is 350 mm. The transmitter is 63.5 mm or two Eclipse modules wide. 7.
7 SPECIFICATIONS 7.4 Electrical Specifications 7.4 7.4.1 Electr ical Specifications Power Requir ements Operating Voltage - 10.5 to 16 Vdc with output power reduced below 12 Vdc Current Drain - 5A Maximum, typically 0.25A Standby Polarity - Negative Ground 7.4.2 Fr equency Range and Channel Spacing Fr equency 330-365 MHz 360-380 MHz 375-400 MHz 403-420 MHz 430-450 MHz 450-520 MHz 7.4.3 25 kHz T350C T350A T350B T500A T500D T500B 12.
7 SPECIFICATIONS 7.4.8 7.4.8 Transmit Duty Cycle Tr ansmit Duty Cycle 100% to 40C, de-rating to zero at 60C. 100% to 5000ft altitude, de-rating to zero at 15,000ft. 7.4.9 Spur ious and Har monics Less than 0.25µW 7.4.10 Car r ier and Modulation Attack Time Less than 20ms. Certain models have RF envelope attack and decay times controlled in the range 200µs< tr/f <2ms according to regulatory requirements. 7.4.
7.4.16 Test Microphone Input 7 SPECIFICATIONS 7.4.16 Test Micr ophone Input 200Ω dynamic, with PTT 7.4.17 Exter nal Tone Input Compatible with R500 tone output 7.4.18 Exter nal ALC Input Output will be reduced 20dB by pulling the input down to below 1V. (Typically more than 40dB attenuation is available.) The input impedance is ≅10kΩ, internally pulled up to rail. The external ALC input can be connected to the power control circuit in Eclipse external power amplifiers. 7.4.
7 SPECIFICATIONS 7.4.22 7.4.22 Programmable No-Tone Period Pr ogr ammable No-Tone Per iod A No-Tone period can be appended to the end of each transmission to aid in eliminating squelch tail noise which may be heard in mobiles with slow turn off decoders. The NoTone period can be set from 0--5 seconds in 0.1 second increments. The No Tone period operates in addition to the reverse phase burst at the end of each transmission.3 7.4.
7 SPECIFICATIONS Fr equency No Tone 67.0 69.4 71.9 74.4 77.0 79.7 82.5 85.4 88.5 91.5 94.8 97.4 100.0 103.5 107.2 110.9 114.8 118.8 123.0 127.3 131.8 136.5 141.3 146.2 151.4 156.7 159.8 162.2 165.5 167.9 171.3 173.8 177.3 179.9 183.5 186.2 189.9 192.8 196.6 199.5 203.5 206.5 210.7 218.1 225.7 229.1 233.6 241.8 250.3 254.
A ENGINEERING DIAGRAMS 7.5.2 Power & I/O Connector 25-pin “D” Male Mounted on the rear panel 7.5.3 Test Connector 9-pin “D” Female mounted on the front panel A Engineer ing Diagr ams Most Eclipse transmitter modules contain two PCBs, a motherboard with the control and signal generation circuitry (the exciter board), and an RF Power Amplifier board. Certain models are equipped with optional functions on piggyback PCBs atop the exciter motherboard.
A ENGINEERING DIAGRAMS A.3 Component Over lay Diagr ams Figure 5 shows the PCB overlay guide with component positions for the main (exciter) PCB. Figure 6 shows the detailed circuit diagram with component numbers and values for the higher-power PA variation. Figure 7 shows the detailed circuit diagram with component numbers and values for the lower power PA variation.
A ENGINEERING DIAGRAMS_________________A.
A.3 Component Overlay Diagrams_________ A ENGINEERING DIAGRAMS Figure 2: The main board component overlay diagram.
A ENGINEEERING DIAGRAMS A.3 Component Overlay Diagrams Figure 3: The component circuit diagram of the 9103 UHF Transmitter.
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A ENGINEEERING DIAGRAMS A.3 Component Overlay Diagrams Figure 4: The component circuit diagram of the 9102 UHF PA.
A.3 Component Overlay Diagrams A ENGINEERING DIAGRAMS Figure 5: The component circuit diagram of the 9128/9149 UHF PA.
A ENGINEERING DIAGRAMS A.3 Component Overlay Diagrams Figure 6: The component overlay diagram for the higher-power PA board.
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B PARTS LIST B T350/T500 Parts List T350/T500 Parts List (for PCB-30/9103/xxxx) Main PCB Assembly Par ts Ref. Descr iption Par t Number C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47s C48 C49 C50 C51 C52 C53 C54 C55 Capacitor 10U 35V Rad Electro Capacitor 18P 2% 100V NPO Rad.1 Capacitor 100N 10% 50V X7R Rad.2 Capacitor 10N 10% 50V X7R Rad.
B T350/T500 PARTS LIST Ref. Descr iption Par t Number C56 C57 C58 C59s C60 C61 C62 C63 C64s C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C75 C76 C77 C78 C79 C80 C81 C82 C83 C84 C85 C86 C87 C88 C89 C90 C91 C92 C93 C94 C95 C96 C97 C98 C99 C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 C110 C111 C112 C113 Capacitor 1N2 5% NPO Rad.2 Capacitor 100N 5% 50V MKT Rad.2 Capacitor 22N 5% 63V MKT Rad.2 Capacitor 1N0 5% 63V NPO SM1206 Capacitor 1UO 10% 63V MKT Rad.2 Capacitor 100N 10% 50V X7R Rad.
B T350/T500 PARTS LIST Ref. C114 C115 C116 C117 C118 C119 C132 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25(L9) H1 ISO1 J1 JP2 JP3 JP4 JP5 JP6 JP7 JP8 JP9 JP10 JP11 JP13 JP14 JP15 L1 L2 L3 L4 L5 L6 L7 L8 L10 L11 L12 L13 Page 36 Descr iption Capacitor 1UO 10% 63V MKT Rad.2 Capacitor 100U 25V RB Electro Capacitor 1UO 10% 63V MKT Rad.2 Capacitor 100U 25V RB Electro Capacitor 10U 35V Rad Electro Capacitor 10U 35V Rad Electro Capacitor 10N 10% 50V X7R Rad.
B T350/T500 PARTS LIST Ref.
B T350/T500 PARTS LIST Ref. Descr iption Par t Number R28 R29 R30 R31 R32 R33 R34 R35 R36 R37 R38 R39 R40 R41 R42 R43 R44 R45 R46 R47 R48 R49 R50 R51 R52 R53 R54 R55 R56 R57 R58 R59 R60 R61 R62 R63 R64 R65 R66 R67 R68 R69 R70 R71 R72 R73 R74 R75 R76 R77 R78 R79 R80 R81 R82 R83 R84 R85 R86 Resistor 10K 5% 0.25W Axial Resistor 2K2 5% 0.25W Axial Resistor 470K 5% 0.25W Axial Resistor 10K 5% 0.25W Axial Resistor 10K 5% 0.25W Axial Resistor 10K 5% 0.25W Axial Resistor 100K 5% 0.25W Axial Resistor 100K 5% 0.
B T350/T500 PARTS LIST Ref. Descr iption Par t Number R87 R88 R89 R90 R91 R92 R93 R94 R95 R96 R97 R98 R99 R100 R101 R102 R103 R104 R105 R106 R107 R108 R109 R110 R111 R112 R113 R114 R115 R116 R117 R119 R120 R121 R123 R124 R125 R126 R127 R128 R129 R130 R131 R132 R133 R134 R135 R136 R137 R138 R139 R140 R141 R142 RN1 RN2 RV1 RV2 RV3 RV4 Resistor 2K2 5% 0.25W SM1206 Resistor 1K0 5% 0.25W Axial Resistor 10K 5% 0.25W Axial Resistor 180 5% 0.25W Axial Resistor 100 5% 0.25W SM1206 Resistor 180 5% 0.
B T350/T500 PARTS LIST Ref. Descr iption Par t Number S1 T1 U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 U11 U13 U14 XO1 Y1 Y2 Switch PSH BTN SPDT & Capacitor Transformer Line 600 Ohm IC RS232 Inter MAX232C IC 3 State BUF 74HC244N IC Micro Super MC34064P-5 IC 8 Bit Latch 74HC573N IC EPROM 27C256 IC Frequency SYN MB1501 SO16X IC Quad OP Amplifier TLC274 IC Dual FET OP Amplifier DIP8 IC Quad OP Amplifier TLC274 IC Analogue Gate MC14066B IC Quad NAND 74C00 DIP14 IC Micro 68HC11A1P IC Volt Regulator LM7805 TCXO 12.
B T350/T500 PARTS LIST Ref. Descr iption Par t Number C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 D1 D2 D3 D4 D5 J2 L5 L6 L7 L8 P1 Q2 Q3 Q4 Q5 Q6 Q7 R1 R2 R3 R4 R5 R6 R7 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R31 R32 R33 R34 R35 Capacitor 100N 10% 63V X7R 1206 Capacitor 100N 10% 63V X7R 1206 Capacitor 10U 35V Rad Electro Capacitor 1N0 5% 63V NPO SM1206 Capacitor 100N 10% 50V X7R Rad.
B T350/T500 PARTS LIST Ref. Descr iption Par t Number R36 R37 R38 R39 RV1 RV2 U1 Resistor 47K 5% 0.25W Axial Resistor 15K 5% 0.25W Axial Resistor 4R7 5% 0.25W Axial Capacitor 2P2 5% 63V NPO 1206 Trimpot 10K 1 Turn Vertical Trimpot 10K 1 Turn Vertical IC Quad OP Amplifier MC3403P 51/1040/047K 51/1040/015K 51/1040/04R7 46/3300/02P2 53/1020/010K 53/1020/010K 25/1050/3403 Additional par ts for Amplifier s in all T350’s Ref.