Block Diagram

Size
Date: Sheet of
Radio Activity
Via De Notaris, 50 20128 Milano
Title
A3
01 01 Wednesday, November 12, 2014
BLOCK DIAGRAM
KAIROS
Size
Date: Sheet of
Radio Activity
Via De Notaris, 50 20128 Milano
Title
A3
01 01 Wednesday, November 12, 2014
BLOCK DIAGRAM
KAIROS
Size
Date: Sheet of
Radio Activity
Via De Notaris, 50 20128 Milano
Title
A3
01 01 Wednesday, November 12, 2014
BLOCK DIAGRAM
KAIROS
A B C D E F
G
H
1
2
3
4
5
VCO RX
DIGITAL
MODULATOR
FPGA
LAN MICROPROCESSOR
DSP
DAC
ADC
12Vdc
POWER SUPPLY
DAC
ADC
INTERNAL TUNING LINES
INTERNAL SENSING LINES
AF LINES 4W+E/M
DIGITAL I/O
CLOCK:
20MHz;
12.8MHz
RAM FLASH RTC
PTP
1588
TO MICROPROCESSOR
TO VCO RX & IF
TO VCO TX & MODULATOR
LPF LPF
BPF
XTAL
DIGITAL IFRX D
RX M LPF LPF
BPF
XTAL
DIGITAL IF
DOUBLE RX
LPF
OPTIONAL
Pr SENSE
Pd SENSE
TX
VCO TXTX
Fout
Fout
Fin
Fin
Fin+dF
Fout
F(IF)
F(IF)
0dBm14dBm30dBm44dBm
0-5V
-10dBm @ 600ohm
-10dBm @ 600ohm
12V
5V
3.3V
1.8V
ELECTRONIC
PROTECTIONS
LPF
V REG
DC-DC
CONV
5V
11-15V
5A max