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SC66 Hardware Design

Smart LTE Module Series

Rev: SC66_Hardware_Design_V1.0

Date: 2019-08-13

Status: Released

www.quectel.com

Model:SC66-A

Summary of content (148 pages)

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Model:SC66-A SC66 Hardware Design Smart LTE Module Series Rev: SC66_Hardware_Design_V1.0 Date: 2019-08-13 Status: Released www.quectel.
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Smart LTE Module Series SC66 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai, China 200233 Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.
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Smart LTE Module Series SC66 Hardware Design About the Document History Revision Date Author Description 1.
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Smart LTE Module Series SC66 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index .................................................................................................................................
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Smart LTE Module Series SC66 Hardware Design 3.18. LCM Interfaces .......................................................................................................................... 69 3.19. Touch Panel Interfaces ............................................................................................................. 74 3.20. Camera Interfaces..................................................................................................................... 75 3.20.1. Design Considerations ...
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Smart LTE Module Series SC66 Hardware Design 8.2. 8.3. Recommended Footprint ........................................................................................................ 131 Top and Bottom View of the Module ....................................................................................... 132 9 Storage, Manufacturing and Packaging ........................................................................................ 133 9.1. Storage ...................................................
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Smart LTE Module Series SC66 Hardware Design Table Index TABLE 1: SC66-CE* FREQUENCY BANDS ..................................................................................................... 15 TABLE 2: SC66-A* FREQUENCY BANDS ....................................................................................................... 16 TABLE 3: SC66-J* FREQUENCY BANDS ........................................................................................................ 16 TABLE 4: SC66-E* FREQUENCY BANDS .
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Smart LTE Module Series SC66 Hardware Design TABLE 42: WI-FI/BT FREQUENCY................................................................................................................. 102 TABLE 43: PIN DEFINITION OF GNSS ANTENNA ........................................................................................ 103 TABLE 44: GNSS FREQUENCY ..................................................................................................................... 103 TABLE 45: ANTENNA REQUIREMENTS.........
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Smart LTE Module Series SC66 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 23 FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 25 FIGURE 3: VOLTAGE DROP SAMPLE.............................................................................................................
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Smart LTE Module Series SC66 Hardware Design ......................................................................................................................................................................... 100 FIGURE 40: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND) .........................................................................................................................................................................
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Smart LTE Module Series SC66 Hardware Design OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.
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Smart LTE Module Series SC66 Hardware Design In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization.
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Smart LTE Module Series SC66 Hardware Design Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
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Smart LTE Module Series SC66 Hardware Design 1 Introduction This document defines the SC66 module and describes its air interfaces and hardware interfaces which are connected with customers’ applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details as well as other related information of SC66 module. Associated with application note and user guide, customers can use SC66 module to design and set up mobile applications easily.
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Smart LTE Module Series SC66 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating SC66 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
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Smart LTE Module Series SC66 Hardware Design 2 Product Concept 2.1. General Description SC66 is a series of Smart LTE module based on Qualcomm platform and Android operating system, and provides industrial grade performance. Its general features are listed below:  Support worldwide LTE-FDD, LTE-TDD, DC-HSDPA, DC-HSUPA, HSPA+, HSDPA, HSUPA,      WCDMA, TD-SCDMA, EVDO/CDMA, EDGE, GSM and GPRS coverage Support short-range wireless communication via Wi-Fi 802.11a/b/g/n/ac and BT5.
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Smart LTE Module Series SC66 Hardware Design BT5.0 2402MHz~2480MHz GNSS GPS: 1575.42MHz±1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz±2.046MHz Table 2: SC66-A* Frequency Bands Type Frequency Bands LTE-FDD B2/B4/B5/B7/B12/B13/B14/B17/B25/B26/B66/B71 LTE-TDD B41 WCDMA B2/B4/B5 Wi-Fi 802.11a/b/g/n/ac 2402MHz~2482MHz; 5180MHz~5825MHz BT 5.0 2402MHz~2480MHz GNSS GPS: 1575.42MHz±1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz±2.
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Smart LTE Module Series SC66 Hardware Design Table 4: SC66-E* Frequency Bands Type Frequency Bands LTE-FDD B1/B2/B3/B4/B5/B7/B8/B20/B28(A+B) LTE-TDD B38/B39/B40/B41 WCDMA B1/B2/B4/B5/B8 GSM 850/900/1800/1900MHz Wi-Fi 802.11a/b/g/n/ac 2402MHz~2482MHz; 5180MHz~5825MHz BT 5.0 2402MHz~2480MHz GNSS GPS: 1575.42MHz±1.023MHz GLONASS: 1597.5MHz~1605.8MHz BeiDou: 1561.098MHz±2.
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Smart LTE Module Series SC66 Hardware Design Table 6: SC66-MW*(2 × 2 MIMO WIFI) Frequency Bands Type Frequency Bands LTE-FDD / LTE-TDD / WCDMA / TD-SCDMA / CDMA / GSM / Wi-Fi 802.11a/b/g/n/ac 2402MHz~2482MHz; 5180MHz~5825MHz BT 5.0 2402MHz~2480MHz GNSS / NOTES 1. 2. “*” means under development. SC66-A, SC66-J, SC66-E and SC66-MW support Wi-Fi MIMO function.
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Smart LTE Module Series SC66 Hardware Design 2.2. Key Features The following table describes the detailed features of SC66 module. Table 7: SC66 Key Features Features Details Application Processor Customized 64-bit ARM v8-compliant applications processor  Kryo Gold: quad high-performance cores targeting 2.2 GHz  Kryo Silver: quad low-power cores targeting 1.
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Smart LTE Module Series SC66 Hardware Design  WCDMA: Max 384Kbps (DL)/Max 384Kbps (UL) TD-SCDMA Features Support CCSA Release 3 TD-SCDMA  Max 4.2Mbps (DL)/Max 2.2Mbps (UL) CDMA2000 Features Support 3GPP2 CDMA2000 1X Advanced, CDMA2000 1x EV-DO Rev.A  EVDO: Max 3.1Mbps (DL)/Max 1.8 Mbps (UL)  1X Advanced: Max 307.2Kbps (DL)/Max 307.2Kbps (UL) GSM Features R99 CSD: 9.6kbps, 14.4kbps GPRS Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 107Kbps (DL), 85.
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Smart LTE Module Series SC66 Hardware Design Audio Codec EVRC, EVRC-B, EVRC-WB; G.711, G.729A/AB; GSM-FR, GSM-EFR, GSM-HR; AMR-NB, AMR-WB, AMR-eAMR, AMR-BeAMR USB Interfaces Compliant with USB 3.1 and 2.0 specifications, with transmission rates up to 5Gbps on USB 3.1 and 480Mbps on USB 2.
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Smart LTE Module Series SC66 Hardware Design NOTES 1. 2. 1) Within operation temperature range, the module is 3GPP compliant. Within extended temperature range, the module remains the ability to establish and maintain a voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances.
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Smart LTE Module Series SC66 Hardware Design Power Power Signal Function ANT_ MAIN ANT _ DRX ANT _ GNSS ANT_WIFI/BT ANT_WIFI_MIMO C1 V DD_ RF SAW VOL_UP MICs APT SPK EAR LNA SAW SAW Duplexs Codec FEM FEM SAW 0Ω PA 2.4G TRX PDET 5G RX 5G TX 2.4G TRX PDET 5G RX 5G TX Headset SD_VDD Switch Switch VPH_PWR PM660L SD_PU_VDD Tranceiver LDO3B_2P8 LDO7B_3P125 38.4MHZ XO PWM WCN VPH_PWR BBCLK VRTC PM-3003A RFCLK USIM1_VDD USIM2_VDD LDO11A_1P8 38.
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Smart LTE Module Series SC66 Hardware Design 3 Application Interfaces 3.1. General Description SC66 is equipped with 324 pins that can be embedded into cellular application platform. The following chapters provide the detailed description of pins/interfaces listed below.
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Smart LTE Module Series SC66 Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of SC66 module.
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Smart LTE Module Series SC66 Hardware Design 3.3. Pin Description Table 8: I/O Parameters Definition Type Description AI Analog input AO Analog output DI Digital input DO Digital output IO Bidirectional OD Open drain PI Power input PO Power output The following tables show the SC66’s pin definition and electrical characteristics. Table 9: Pin Description Power Supply Pin Name VBAT VDD_RF Pin No.
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Smart LTE Module Series SC66 Hardware Design VRTC 16 PI/ PO Power supply for internal RTC circuit VOmax=3.2V; When VBAT is not connected: VI=2.1V~3.25V Vnorm=1.8V IOmax=20mA Power supply for external GPIO’s pull up circuits and level shift circuit. LDO13A_1P8 9 PO 1.8V output power supply LDO7B_ 3P125 157 PO 3.125V output power supply Vnorm=3.125V IOmax=150mA Power supply only for DP switch. LDO11A_1P8 10 PO 1.8V output power supply Vnorm=1.
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Smart LTE Module Series SC66 Hardware Design 193, 195, 219, 225, 243, 257~ 323 Audio Interfaces Pin Name Pin No. I/O Description DC Characteristics MIC_BIAS 167 AO Microphone bias voltage VO=1.6V~2.9V MIC1_P 44 AI Microphone input for channel 1 (+) MIC1_M 45 AI Microphone input for channel 1 (-) MIC_GND 168 MIC2_P 46 MIC3_P Comment Microphone reference ground If unused, connect this pin to the ground. AI Microphone input for headset (+) Headset microphone input.
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Smart LTE Module Series SC66 Hardware Design USB_VBUS 41, 42 PI/ PO Charging power input; Power supply output for OTG device; USB/charger insertion detection USB2_HS_DM 25 IO USB 2.0 differential data bus (-) USB2_HS_DP 26 IO USB 2.0 differential data bus (+) USB1_HS_DM 33 IO USB 2.0 differential data bus (-) USB1_HS_DP 32 IO USB 2.0 differential data bus (+) USB_SS2_TX _P 165 IO USB 3.1 channel 2 differential transmit (+) USB_SS2_TX _M 164 IO USB 3.
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Smart LTE Module Series SC66 Hardware Design USB_CC1 224 AI USB Type-C detection channel 1 USB_CC2 223 AI USB Type-C detection channel 2 UUSB_TYPEC 23 DI When Micro USB is used, it can be used as USB_ID pin. uUSB & USB Type-C configuration selection pin When USB Type-C is used, it should be connected to VPH_PWR through a 10KΩ resistor; When uUSB 1) is used, it should be connected to GND through a 10KΩ resistor. Cannot be multiplexed into a general-purpose GPIO.
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Smart LTE Module Series SC66 Hardware Design VIHmin= 0.7 × USIM1_VDD VOLmax=0.4V VOHmin= 0.8 × USIM1_VDD USIM1_VDD 141 PO (U)SIM1 card power supply Either 1.8V or 2.95V (U)SIM card is supported. Active Low. Need external pull-up to 1.8V. If unused, keep it open. USIM2_DET 256 DI (U)SIM2 card hot-plug detection VILmax=0.63V VIHmin=1.17V USIM2_RST 207 DO (U)SIM2 card reset signal VOLmax=0.4V VOHmin= 0.8 × USIM2_VDD USIM2_CLK 208 DO (U)SIM2 card clock signal VOLmax=0.4V VOHmin= 0.
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Smart LTE Module Series SC66 Hardware Design UART6_TXD 199 DO UART6 transmit data VOLmax=0.45V VOHmin=1.35V UART6_RTS 245 DO UART6 request to send UART6_CTS 246 DI UART6 clear to send VILmax=0.63V VIHmin=1.17V LPI_UART_2_ TXD 60 DO LPI_UART_2 transmit data VOLmax=0.45V VOHmin=1.35V LPI_UART_2_ RXD 61 DI LPI_UART_2 receive data VILmax=0.63V VIHmin=1.17V Pin No. I/O Description DC Characteristics Cannot be multiplexed into general-purpose GPIOs.
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Smart LTE Module Series SC66 Hardware Design TP0_RST 138 DO Reset signal of touch panel (TP0) VOLmax=0.45V VOHmin=1.35V TP0_INT 139 DI Interrupt signal of touch panel (TP0) VILmax=0.63V VIHmin=1.17V TP0_I2C_SCL 140 OD I2C clock signal of touch panel (TP0) TP0_I2C_SDA 206 OD I2C data signal of touch panel (TP0) VOLmax=0.45V VOHmin=1.35V VILmax=0.63V VIHmin=1.17V 1.8V power domain.
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Smart LTE Module Series SC66 Hardware Design LCD0 MIPI lane 1 data DSI0_LN1_P 119 AO DSI0_LN2_N 122 AO signal (+) LCD0 MIPI lane 2 data signal (-) 85Ω differential impedance. LCD0 MIPI lane 2 data DSI0_LN2_P 121 AO DSI0_LN3_N 124 AO signal (+) LCD0 MIPI lane 3 data signal (-) 85Ω differential impedance. LCD0 MIPI lane 3 data DSI0_LN3_P 123 AO LCD1_RST 113 DO DSI1_CLK_N 103 signal (+) LCD1 reset signal VOLmax=0.45V VOHmin=1.35V 1.8V power domain.
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Smart LTE Module Series SC66 Hardware Design impedance. signal (-) LCD1 MIPI lane 3 data DSI1_LN3_P 110 signal (+) Camera Interfaces Pin Name Pin No. I/O CSI1_CLK_N 89 AI Description DC Characteristics Comment MIPI clock signal of rear camera (-) MIPI clock signal of CSI1_CLK_P 88 AI CSI1_LN0_N 91 AI 85Ω differential impedance. rear camera (+) MIPI lane 0 data signal of rear camera (-) MIPI lane 0 data signal CSI1_LN0_P 90 AI CSI1_LN1_N 93 AI 85Ω differential impedance.
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Smart LTE Module Series SC66 Hardware Design MIPI clock signal of CSI2_CLK_P 183 AI CSI2_LN0_N 186 AI depth camera (+) MIPI lane 0 data signal of depth camera (-) MIPI lane 0 data signal CSI2_LN0_P 185 AI CSI2_LN1_N 188 AI 85Ω differential impedance.
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Smart LTE Module Series SC66 Hardware Design impedance. of front camera (-) MIPI lane 0 data signal CSI0_LN0_P 79 AI CSI0_LN1_N 82 AI of front camera (+) MIPI lane 1 data signal of front camera (-) 85Ω differential impedance. MIPI lane 1 data signal CSI0_LN1_P 81 AI CSI0_LN2_N 84 AI of front camera (+) MIPI lane 2 data signal of front camera (-) 85Ω differential impedance.
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Smart LTE Module Series SC66 Hardware Design camera DCAM_PWDN 181 DO Power down signal of depth camera 1.8V power domain. CAM_I2C_SDA 1 197 OD I2C data signal of depth camera 1.8V power domain. CAM_I2C_SCL 1 196 OD I2C data signal of depth camera 1.8V power domain. Keypad Interfaces Pin Name Pin No. I/O Description DC Characteristics PWRKEY 39 DI Turn on/off the module 1.8V power domain. VOL_UP 146 DI Volume up The voltage is equal to the VBAT voltage.
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Smart LTE Module Series SC66 Hardware Design ADC0 151 AI General purpose ADC interface Max input voltage: 1.8V. ADC1 153 AI General purpose ADC interface Max input voltage: 1.8V. Antenna Interfaces Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design GPIO_77 240 IO GPIO 1.8V power domain. GPIO_12 228 IO GPIO 1.8V power domain. GPIO_13 227 IO GPIO 1.8V power domain. GPIO_14 230 IO GPIO 1.8V power domain. GPIO_15 229 IO GPIO 1.8V power domain. GPIO_61 234 IO GPIO 1.8V power domain. GPIO_03B 11 IO GPIO 1.8V power domain. GPIO_08B 13 IO GPIO 1.8V power domain. GPIO_04B 14 IO GPIO 1.8V power domain. GPIO_05B 15 IO GPIO 1.8V power domain.
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Smart LTE Module Series SC66 Hardware Design Pin Name Pin No. I/O Description DC Characteristics MI2S_2_WS 203 DO I2S word select signal 1.8V power domain. MI2S_2_DATA0 249 IO I2S DATA0 signal 1.8V power domain. MI2S_2_SCK 250 DO I2S serial clock signal 1.8V power domain. MI2S_2_DATA1 251 IO I2S DATA1 signal 1.8V power domain. MI2S_2_MCLK 114 DO I2S main clock signal 1.8V power domain.
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Smart LTE Module Series SC66 Hardware Design CBL_PWR_N 22 DI Used for configuring auto power-on DP_AUX_P 221 AI/ AO DisplayPort auxiliary channel (+) DP_AUX_N 220 AI/ AO DisplayPort auxiliary channel (-) Pin Name Pin No. I/O Description RESERVED 17, 213, 214, 215, 216, 217, 222, 235 If customers require automatic power-on, this pin should be shorted-to-ground. Reserved pins Reserved pins DC Characteristics Comment Keep these pins open.
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Smart LTE Module Series SC66 Hardware Design 3A Input current 4.0V Voltage 2.85V Figure 3: Voltage Drop Sample To prevent the voltage from dropping below 2.85V, a bypass capacitor of about 100µF with low ESR (ESR=0.7Ω) should be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT/VDD_RF pins.
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Smart LTE Module Series SC66 Hardware Design The following figure shows a reference design for +5V input power source which adopts an LDO (MIC29502WU) from MICROCHIP. The typical output voltage is 4.0V and the maximum rated current is 5.0A. MIC29502WU U1 DC_IN VBAT 470uF GND ADJ 5 100nF 51K OUT 4 3 R1 1 C2 C1 EN 2 IN R2 220K 1% R3 100k 1% R4 470R C3 C4 470uF 100nF Figure 5: Referfence Circuit of Power Supply NOTES 1. 2. 3.
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Smart LTE Module Series SC66 Hardware Design 3.5. Turn on and off Scenarios 3.5.1. Turn on the Module Using PWRKEY The module can be turned on by driving PWRKEY pin to a low level for at least 3ms. PWRKEY pin is pulled to 1.8V internally. It is recommended to use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. PWRKEY R3 1K >3ms R1 Q1 4.
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Smart LTE Module Series SC66 Hardware Design The timing of turning on Module is illustrated in the following figure. VBAT (Typ.: 4.0V) PWRKEY >3ms LDO13A_1P8 Software controlled LDO11A_1P8 Software controlled LDO7B_3P125 LDO14A_1P8 Others Active Figure 8: Timing of Turning on Module NOTE Make sure that VBAT is stable before pulling down PWRKEY pin. The recommended time between them is no less than 30ms. PWRKEY cannot be pulled down all the time.
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Smart LTE Module Series SC66 Hardware Design 3.5.2. Turn on the Module Automatically The module can be turned on automatically with CBL_PWR_N. A reference circuit is shown below: CBL_PWR_N 1K SC66 Figure 9: Turn on the Module Automatically NOTE If the module is turned on automatically through CBL_PWR_N, then it cannot be turned off unless the battery is removed. 3.5.3.
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Smart LTE Module Series SC66 Hardware Design 3.6. VRTC Interface The RTC (Real Time Clock) can be powered by an external power source through VRTC when the module is powered down and there is no power supply for the VBAT. The external power source can be a rechargeable battery (such as a button cell battery) according to application demands. A reference circuit design is shown . VRTC 0R 100nF BAT Figure 11: RTC Powered by a Rechargeable Button Cell Battery NOTES 1. 2. 3. 4.
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Smart LTE Module Series SC66 Hardware Design 3.7. Power Output SC66 supports output of regulated voltages for peripheral circuits. During application, it is recommended to connect a 33pF and a 10pF capacitor in parallel in the circuit to suppress high frequency noise. Table 10: Power Description Pin Name Default Voltage (V) Drive Current (mA) Idle LDO13A_1P8 1.8 20 Keep LDO11A_1P8 1.8 150 / LDO3B_2P8 2.8 600 / LDO7B_3P125 3.125 150 / LDO14A_1P8 1.8 150 Keep SD_VDD 2.
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Smart LTE Module Series SC66 Hardware Design   Constant current mode (CC mode): When the battery voltage is increased to between the maximum pre-charge voltage and 4.35V (3.6V~4.5V programmable, 4.35V by default), the system will switch to CC mode. The charging current is programmable from 0mA~3000mA. The default charging current is 500mA for USB charging and 2A for adapter. Constant voltage mode (CV mode): When the battery voltage reaches the final value 4.
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Smart LTE Module Series SC66 Hardware Design Adapter or USB USB _VBUS VBAT VBAT BAT_PLUS NTC BAT_THERM GND BAT_MINUS D1 Battery D2 ESD ESD C1 C2 100uF 1uF NM C3 33pF GND Module Adapter or USB USB _ VBUS VBAT VBAT BAT_PLUS NTC BAT_THERM GND BAT_MINUS D1 D2 C1 ESD ESD 100 uF 1uF NM C2 C3 Battery 33pF GND Module Figure 12: Reference Design for Battery Charging Circuit SC66 offers a fuel gauge algorithm that is able to accurately estimate the battery’s state by current and
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Smart LTE Module Series SC66 Hardware Design in use of the module. Among them, BAT_PLUS and BAT_MINUS are used for battery level detection, and they should be routed as differential pair to ensure accuracy. USB_VBUS can be powered by external power or USB adapter, mainly used for USB detection and battery charging. The input of USB_VBUS is 3.6V~10V, and the typical working voltage is 5V.
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Smart LTE Module Series SC66 Hardware Design USB1_HS_DP 32 IO USB 2.0 differential data bus (+) USB_SS1_RX_P 171 AI USB 3.1 differential receive (+) USB_SS1_RX_M 172 AI USB 3.1 differential receive (-) USB_SS1_TX_P 174 AO USB 3.1 channel 1 differential transmit (+) USB_SS1_TX_M 175 AO USB 3.1 channel 1 differential transmit (-) USB_SS2_RX_M 161 AI USB 3.1 channel 2 differential receive (-) USB_SS2_RX_P 162 AI USB 3.
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Smart LTE Module Series SC66 Hardware Design Cannot be multiplex ed into a generalpurpose GPIO.
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Smart LTE Module Series SC66 Hardware Design USB1_HS_DP/DM USB1_HS_DP/DM USB1_HS_DP/M USB_CC1/CC2 USB_CC1/CC2 HOTPLUG_DET/Vconn USB_VBUS USB_VBUS USB_VBUS GND GND GND The reference design of DisplayPort is shown below: USB_VBUS USB1_HS_DM USB1_HS_DP USB_VBUS DD+ USB_CC1 USB_CC2 USB _SS1_RX_P USB _SS1_RX_M USB _SS1_TX_P USB _SS1_TX_M USB _SS2_RX_P USB _SS2_RX_M USB _SS2_TX_P USB _ SS2_TX_M CC1 CC2 RX1+ RX1TX1+ TX1 - C8 C9 RX2+ RX2TX2+ TX2SBU1 C10 C11 SBU2 USB Type-C Module LDO7B_3P125
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Smart LTE Module Series SC66 Hardware Design Table 14: USB1 & USB2 Pin Description Pin Name Pin No. I/O Description Comment USB1_HS_DM 33 IO USB 2.0 differential data bus (-) USB1_HS_DP 32 IO USB 2.0 differential data bus (+) USB 2.0 standard compliant; Support OTG. USB2_HS_DM 25 IO USB 2.0 differential data bus (-) USB2_HS_DP 26 IO USB 2.0 differential data bus (+) USB 2.0 standard compliant; Only support host mode.
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Smart LTE Module Series SC66 Hardware Design Figure 16: USB2 Host 3.9.3. USB Interface Design Considerations Table 15: USB Trace Length Inside the Module Pin No. Signal Length (mm) 32 USB1_HS_DP 46.15 33 USB1_HS_DM 44.95 171 USB_SS1_RX_P 39.75 172 USB_SS1_RX_M 39.75 174 USB_SS1_TX_P 35.75 175 USB_SS1_TX_M 35.75 162 USB_SS2_RX_P 31.6 161 USB_SS2_RX_M 31.6 165 USB_SS2_TX_P 37.7 164 USB_SS2_TX_M 37.3 26 USB2_HS_DP 40.75 25 USB2_HS_DM 40.95 221 DP_AUX_P 41.
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Smart LTE Module Series SC66 Hardware Design          It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90Ω. The ground reference plane must be continuous, without any cuts or any holes under the USB signals, to ensure impedance continuity. Pay attention to the influence of junction capacitance of ESD protection devices on USB data lines. Typically, the capacitance value should be less than 2pF for USB 2.
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Smart LTE Module Series SC66 Hardware Design data DEBUG_RXD 6 DI DEBUG UART receive data 1.8 power domain. UART1_TXD 7 DO UART1 transmit data 1.8 power domain. UART1_RXD 8 DI UART1 receive data 1.8 power domain. UART6_RXD 198 DI UART6 receive data 1.8 power domain. UART6_TXD 199 DO UART6 transmit data 1.8 power domain. UART6_CTS 246 DI UART6 clear to send 1.8 power domain. UART6_RTS 245 DO UART6 request to send 1.8 power domain.
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Smart LTE Module Series SC66 Hardware Design 1.8V OE VCCA UART6_TXD TXD_1.8V RTS_1.8V UART6_RTS 3.3V VCCB TXD_3.3V RTS_3.3V UART6_RXD RXD_1.8V RXD_3.3V UART6_CTS CTS_1.8V CTS_3.3V GND RXD CTS DIN 3 DIN 4 DIN 5 DOUT3 DOUT4 DOUT5 FORCEON 3.
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Smart LTE Module Series SC66 Hardware Design Cannot be multiplexed into a general-purpose GPIO. USIM1_VDD 141 PO (U)SIM1 card power supply Either 1.8V or 2.95V (U)SIM card is supported. USIM2_DET 256 DI (U)SIM2 card insertion detection Active low. Need external pull-up to1.8V. If unused, keep this pin open. USIM2_RST 207 DO (U)SIM2 card reset signal Cannot be multiplexed into a general-purpose GPIO.
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Smart LTE Module Series SC66 Hardware Design USIM _VDD R1 10K Module USIM_ VDD USIM_ RST USIM_ CLK USIM_ DET C1 (U)SIM Card Connector 100nF VCC RST CLK R2 22R R3 GND VPP IO 22R USIM_ DATA R4 22R C3 C4 22pF 22pF C2 22pF D1 ESD Figure 20: Reference Circuit for (U)SIM Interface with a 6-pin (U)SIM Card Connector In order to ensure good performance and avoid damage of (U)SIM cards, please follow the criteria below in (U)SIM circuit design:       Keep placement of (U)SIM card connector as
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Smart LTE Module Series SC66 Hardware Design SD_VDD 63 PO Power supply for SD card Vnorm=2.95V IOmax=600mA SD_PU_ VDD 179 PO SD card pull-up power supply Support 1.8V/2.95V power supply; The maximum drive current is 50mA. SD_CLK 70 DO High speed digital clock signal of SD card SD_CMD 69 IO Command signal of SD card SD_DATA0 68 IO SD_DATA1 67 IO SD_DATA2 66 IO SD_DATA3 65 IO SD_DET 64 DI Control characteristic impedance as 50Ω.
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Smart LTE Module Series SC66 Hardware Design DATA0, DATA1, DATA2 and DATA3. CLK needs separate ground shielding. Layout guidelines:      Control impedance to 50Ω±10%, and ground shielding is required. The difference in trace lengths among the clock, data, and command signals should be less than 2 mm. The bus length should be less than 50mm. The spacing between signal lines should be 1.5 times the line width. The capacitive reactance of data signal line should be < 8 pF.
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Smart LTE Module Series SC66 Hardware Design GPIO_41 237 GPIO_41 B-PD:nppukp Wakeup GPIO_55 178 GPIO_55 B-PD:nppukp Wakeup GPIO_56 177 GPIO_56 B-PD:nppukp Wakeup GPIO_72 239 GPIO_72 B-PD:nppukp Wakeup GPIO_73 59 GPIO_73 B-PD:nppukp Wakeup GPIO_74 58 GPIO_74 B-PD:nppukp Wakeup GPIO_76 232 GPIO_76 B-PD:nppukp Wakeup GPIO_77 240 GPIO_77 B-PD:nppukp Wakeup GPIO_12 228 GPIO_12 B-PD:nppukp GPIO_13 227 GPIO_13 B-PD:nppukp GPIO_14 230 GPIO_14 B-PD:nppukp GPIO_15
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Smart LTE Module Series SC66 Hardware Design up to 1.8V voltage. The SENSOR_I2C interface only supports sensors of the aDSP architecture. CAM_I2C bus is controlled by Linux Kernel code and supports connection to video output related devices.
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Smart LTE Module Series SC66 Hardware Design MI2S_2_DATA1 251 IO I2S serial data1 channel MI2S_2_MCLK 114 DO I2S main clock LPI_MI2S_SCLK 212 DO LPI_I2S serial clock signal LPI_MI2S_WS 156 DO LPI_I2S word select LPI_MI2S_DATA0 154 IO LPI_I2S signal data0 LPI_MI2S_DATA1 155 IO LPI_I2S signal data1 SC66_Hardware_Design Cannot be multiplexed general-purpose GPIOs.
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Smart LTE Module Series SC66 Hardware Design 3.16. SPI Interface SC66 provides one SPI interface which only supports master mode. Table 23: Pin Definition of SPI Interface Pin Name Pin No. I/O Description Comment SPI3_MOSI 248 DO Master out slave in of SPI interface SPI3_MISO 247 DI Master in salve out of SPI interface SPI3_CS 201 DO Chip selection signal of SPI interface SPI3_CLK 200 DO Clock signal of SPI interface 3.17.
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Smart LTE Module Series SC66 Hardware Design 3.18. LCM Interfaces SC66 video output interface (LCM interface) is based on MIPI_DSI standard and supports 8 groups of high-speed differential data transmission and WQXGA display (resolution: 2560 × 1600), Support dual display, default DSI+DP (Type-C), optional DSI0+DSI1. Note that DSI1 does not support screens with command mode. Table 25: Pin Definition of LCM Interfaces Pin Name Pin No. I/O Description Comment LDO11A_1P8 10 PO 1.
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Smart LTE Module Series SC66 Hardware Design signal (-) LCD0 MIPI lane 2 data DSI0_LN2_P 121 AO DSI0_LN3_N 124 AO DSI0_LN3_P 123 AO DSI1_CLK_N 103 AO DSI1_CLK_P 102 AO DSI1_LN0_N 105 AO DSI1_LN0_P 104 AO DSI1_LN1_N 107 AO DSI1_LN1_P 106 AO DSI1_LN2_N 109 AO DSI1_LN2_P 108 AO DSI1_LN3_N 111 AO DSI1_LN3_P 110 AO LCD1_RST 113 DO signal (+) LCD0 MIPI lane 3 data signal (-) LCD0 MIPI lane 3 data signal (+) LCD1 MIPI clock signal (-) LCD1 MIPI clock signal (+) LCD1 MIPI
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Smart LTE Module Series SC66 Hardware Design GPIO_40 238 DO LCD1 PWM output Used as a GPIO by default The following are the reference designs for LCM interfaces. LCM can use external backlight drive circuit according to customer requirement. The reference design of the external backlight drive circuit is shown in the figure below, in which pins PWM (Pin 152 & Pin 238) can be used for backlight brightness adjustment. VPH_PWR LCM0 _LED+ Backlight Driver PWM LCM0_LED- C1 2.
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Smart LTE Module Series SC66 Hardware Design LDO3B_2P8 LDO11A_1P8 1 2 3 4 5 6 LCM0 _ LED+ LCM0 _LEDLCD0_TE LCD0_ RST ADC0 FL1 3 5 6 5 6 4 5 6 4 5 6 DSI0_LN3_N 4 4 6 2 5 1 DSI0_LN3_P 4 1 DSI0_LN2_P 2 DSI0_LN2_N 3 1 DSI0_LN1_P 2 DSI0_LN1_N 3 1 DSI0_LN0_P DSI0_LN0_N 2 3 1 DSI0_ CLK_P 2 DSI0_ CLK_N 3 EMI filter FL2 FL3 FL4 FL5 C1 C2 4.
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Smart LTE Module Series SC66 Hardware Design LDO3B_2P8 LDO11A_1P8 1 2 3 4 5 6 LCM1 _ LED+ LCM1 _LED- LCD1_RST ADC1 FL1 3 5 6 5 6 4 5 6 4 5 6 DSI1_LN3_N 4 4 6 2 5 1 DSI1_LN3_P 4 1 DSI1_LN2_P 2 DSI1_LN2_N 3 1 DSI1_LN1_P 2 DSI1_LN1_N 3 1 DSI1_LN0_P DSI1_LN0_N 2 3 1 DSI1_ CLK_P 2 DSI1_ CLK_N 3 EMI filter FL2 FL3 FL4 FL5 C1 C2 4.
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Smart LTE Module Series SC66 Hardware Design 3.19. Touch Panel Interfaces SC66 provides two I2C interfaces for connection with Touch Panel (TP), and also provides the corresponding power supply and interrupt pins. The pin definition of touch panel interfaces is illustrated below. Table 26: Pin Definition of Touch Panel Interfaces Pin Name Pin No I/O Description Comment LDO11A_1P8 10 PO 1.8V output power supply Pull-up power supply of I2C Vnorm=1.8V IOmax=300mA LDO3B_2P8 12 PO 2.
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Smart LTE Module Series SC66 Hardware Design LDO11A_1P8 R1 LDO3B_2P8 R2 2.2K 2.2K 1 2 3 4 TP0_I2C_SDA TP0_I2C_SCL TP0_RST TP0_INT D1 D2 D3 SDA 1.8V SCL 1.8V RESET 1.8V INT 1.8V 5 GND 6 VDD 2.8V D4 C1 C2 D5 4.7uF 100nF Module TP Figure 26: Reference Circuit Design for TP0 Interface NOTE The reference circuit design of TP1 is similar to that of TP0. Please refer to TP0 reference circuit design for TP1. 3.20.
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Smart LTE Module Series SC66 Hardware Design GPIO_04B 14 DO Camera AVDD power LDO enable pin CSI0_CLK_N 78 AI MIPI clock signal of front camera (-) CSI0_CLK_P 77 AI MIPI clock signal of front camera (+) CSI0_LN0_N 80 AI MIPI lane 0 data signal of front camera (-) CSI0_LN0_P 79 AI MIPI lane 0 data signal of front camera (+) CSI0_LN1_N 82 AI MIPI lane 1 data signal of front camera (-) CSI0_LN1_P 81 AI MIPI lane 1 data signal of front camera (+) CSI0_LN2_N 84 AI MIPI lane 2 data
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Smart LTE Module Series SC66 Hardware Design CSI2_LN0_N 186 AI MIPI data 0 signal of depth camera (-) CSI2_LN0_P 185 AI MIPI data 0 signal of depth camera (+) CSI2_LN1_N 188 AI MIPI lane 1 data signal of depth camera (-) CSI2_LN1_P 187 AI MIPI lane 1 data signal of depth camera (+) CSI2_LN2_N 190 AI MIPI lane 2 data signal of depth camera (-) CSI2_LN2_P 189 AI MIPI lane 2 data signal of depth camera (+) CSI2_LN3_N 192 AI MIPI lane 3 data signal of depth camera (-) CSI2_LN3_P 19
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Smart LTE Module Series SC66 Hardware Design VPH_PWR VPH_PWR DVDD_REAR DVDD_FRONT LDO_IC LDO_IC GPIO_08B R1 Module 100K GPIO_5B C2 C1 R2 Module 2.2uF 100K C4 C3 2.2uF VPH_PWR AVDD LDO_IC GPIO_04B R3 Module 100K C6 C5 2.2uF Figure 27: Reference Circuit Design for Dual Camera Applications The following is a reference circuit design for dual camera applications.
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Smart LTE Module Series SC66 Hardware Design 4.7uF 4.7uF 1uF 1uF LDO3B_2P8 AFVDD AVDD AVDD DVDD DVDD_REAR DOVDD LDO11A_1P8 2.2K Rear camera connector M CAM_ RST MCAM_PWDN MCAM_MCLK CAM_I2C_SDA0 CAM_ I2C_SCL0 CSI1_LN3_P CSI1_LN3_N CSI1_LN2_P CSI1_LN2_N CSI1_LN1_P CSI1_LN1_N CSI1_LN0_P CSI1_LN0_N CSI1_ CLK_P CSI1_ CLK_N 2.2K EMI EMI EMI EMI EMI 4.
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Smart LTE Module Series SC66 Hardware Design The following is a reference circuit design for three-camera applications. 4.7uF 4.7uF 1u F 1uF LDO3B_1P8 AVDD 2.2K EMI EMI EMI EMI EMI DVDD_FRONT 1uF DOVDD AVDD 4.7 uF DVDD Front camera connector 1uF CSI0_ CLK_P CSI0_ CLK_N CSI0_LN0_P EMI CSI0_LN0_N CSI0_LN1_P CSI0_LN1_N EMI CSI2_LN0_P CSI2_LN0_N CSI2_CLK_P CSI2_CLK_N DCAM_RST DCAM_PWDN DCAM_MCLK DCAM_I2C_SDA1 DCAM_I2C_SCL1 EMI 4.7 uF 1uF EMI EMI 2.
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Smart LTE Module Series SC66 Hardware Design NOTES 1. 2. 3. 4. CSI2_LN2_P/N, CSI2_LN3_P/N can be multiplexed into MIPI signal lines of the fourth camera. LN2 can be configured as DATA, LN3 as CLK and GPIO_34 as MCLK. I2C interfaces are connected with CAM_I2C_SDA1 and CAM_I2C_SCL1. Reset and PWDN signals are configured by using general-purpose GPIOs. 3.20.1. Design Considerations       Special attention should be paid to the pin definition of LCM/camera connectors.
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Smart LTE Module Series SC66 Hardware Design 122 DSI0_LN2_N 26.55 121 DSI0_LN2_P 26.55 124 DSI0_LN3_N 27.30 123 DSI0_LN3_P 27.30 103 DSI1_CLK_N 23.20 102 DSI1_CLK_P 23.50 105 DSI1_LN0_N 28.00 104 DSI1_LN0_P 28.00 107 DSI1_LN1_N 30.00 106 DSI1_LN1_P 30.00 109 DSI1_LN2_N 33.50 108 DSI1_LN2_P 33.50 111 DSI1_LN3_N 37.50 110 DSI1_LN3_P 37.50 89 CSI1_CLK_N 16.00 88 CSI1_CLK_P 16.00 91 CSI1_LN0_N 15.00 90 CSI1_LN0_P 15.00 93 CSI1_LN1_N 12.
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Smart LTE Module Series SC66 Hardware Design 186 CSI2_LN0_N 15.30 185 CSI2_LN0_P 15.30 188 CSI2_LN1_N 7.40 187 CSI2_LN1_P 7.40 190 CSI2_LN2_N 4.05 189 CSI2_LN2_P 4.25 192 CSI2_LN3_N 7.05 191 CSI2_LN3_P 7.05 78 CSI0_CLK_N 25.35 77 CSI0_CLK_P 25.35 80 CSI0_LN0_N 23.35 79 CSI0_LN0_P 23.25 82 CSI0_LN1_N 22.20 81 CSI0_LN1_P 22.45 84 CSI0_LN2_N 20.05 83 CSI0_LN2_P 20.05 86 CSI0_LN3_N 18.35 85 CSI0_LN3_P 18.05 0.00 0.00 0.20 0.00 0.00 -0.10 0.25 0.
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Smart LTE Module Series SC66 Hardware Design Dedicated used for sensors. It cannot be used for touch panel, NFC, I2C keyboard etc. Cannot be multiplexed into general-purpose GPIOs.
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Smart LTE Module Series SC66 Hardware Design EAR_P 53 AO Earpiece output (+) EAR_M 52 AO Earpiece output (-) SPK_P 55 AO Speaker output (+) SPK_M 54 AO Speaker output (-) HPH_R 51 AO Headphone right channel output HPH_REF 50 AI Headphone reference ground HPH_L 49 AO Headphone left channel output HS_DET 48 AI Headset insertion detection      It should be connected to main GND High level by default.
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Smart LTE Module Series SC66 Hardware Design D2 C4 F1 MIC_ BIAS 100nF R1 MIC_GND 1 2 3 0R VDD GND GND OUT R2 4 MIC3_P 0R 33pF MEMStype R3 C2 0R Module D1 Figure 31: Reference Circuit Design for MEMS-type Microphone 3.22.2.
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Smart LTE Module Series SC66 Hardware Design 3.22.3. Reference Circuit Design for Headphone Interface R1 MIC_GND 0R F1 1 5 4 3 6 2 MIC2_P F2 HPH_L HS_DET R2 20K F3 HPH_R HPH_REF Module F4 C3 C4 33pF 33pF 33pF C5 D0 D1 D2 D3 D4 0R R3 Figure 33: Reference Circuit Design for Headphone Interface 3.22.4. Reference Circuit Design for Loudspeaker Interface F1 SPK_P EARP EA SPK_M RN F2 C2 C1 33pF 33pF D1 D2 Module Figure 34: Reference Circuit Design for Loudspeaker Interface 3.22.5.
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Smart LTE Module Series SC66 Hardware Design capacitor for filtering out high-frequency noises. The severity degree of the RF interference in the voice channel during GSM transmitting largely depends on the application design. In some cases, EGSM900 TDD noise is more severe; while in other cases, DCS1800 TDD noise is more obvious. Therefore, a suitable capacitor can be selected based on the test results. Sometimes, even no RF filtering capacitor is required.
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Smart LTE Module Series SC66 Hardware Design 4 Wi-Fi and BT SC66 module provides a shared antenna interface ANT_WIFI/BT for Wi-Fi and Bluetooth (BT) functions. The interface impedance is 50Ω. External antennas such as PCB antenna, sucker antenna and ceramic antenna can be connected to the module via these interfaces, so as to achieve Wi-Fi and BT functions. In addition, SC66-A*, SC66-J*, SC66-E* and SC66-MW* also support ANT_WIFI_MIMO antenna interface to achieve higher Wi-Fi performance. 4.1.
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Smart LTE Module Series SC66 Hardware Design 802.11n HT20 MCS0 15dBm±2.5dB 802.11n HT20 MCS7 13dBm±2.5dB 802.11n HT40 MCS0 14dBm±2.5dB 802.11n HT40 MCS7 13dBm±2.5dB 802.11a 6Mbps 15dBm±2.5dB 802.11a 54Mbps 13dBm±2.5dB 802.11n HT20 MCS0 15dBm±2.5dB 802.11n HT20 MCS7 13dBm±2.5dB 802.11n HT40 MCS0 15dBm±2.5dB 802.11n HT40 MCS7 13dBm±2.5dB 802.11ac VHT20 MCS0 14dBm±2.5dB 802.11ac VHT20 MCS8 13dBm±2.5dB 802.11ac VHT40 MCS0 13dBm±2.5dB 802.11ac VHT40 MCS9 12dBm±2.
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Smart LTE Module Series SC66 Hardware Design 5GHz 802.11n HT40 MCS0 -87dBm 802.11n HT40 MCS7 -68dBm 802.11a 6Mbps -90dBm 802.11a 54Mbps -70dBm 802.11n HT20 MCS0 -88dBm 802.11n HT20 MCS7 -69dBm 802.11n HT40 MCS0 -86dBm 802.11n HT40 MCS7 -66dBm 802.11ac VHT20 MCS8 -68dBm 802.11ac VHT40 MCS9 -64dBm 802.11ac VHT80 MCS9 -60dBm Reference specifications are listed below:   IEEE 802.11n WLAN MAC and PHY, October 2009+IEEE 802.11-2007 WLAN MAC and PHY, June 2007 IEEE Std 802.
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Smart LTE Module Series SC66 Hardware Design    Maximally support up to 7 wireless connections. Maximally support up to 3.5 piconets at the same time. Support one SCO or eSCO (Extended Synchronous Connection Oriented) connection. The BR/EDR channel bandwidth is 1MHz, and can accommodate 79 channels. The BLE channel bandwidth is 2MHz, and can accommodate 40 channels. Table 33: BT Data Rate and Versions Version Data rate Maximum Application Throughput 1.2 1Mbit/s > 80Kbit/s 2.
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Smart LTE Module Series SC66 Hardware Design 5 GNSS SC66 module integrates a Qualcomm IZat™ GNSS engine (Gen 9) which supports multiple positioning and navigation systems including GPS, GLONASS and BeiDou. With an embedded LNA, the module provides greatly improved positioning accuracy. 5.1. GNSS Performance The following table lists the GNSS performance of SC66 module in conduction mode.
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Smart LTE Module Series SC66 Hardware Design 5.2. GNSS RF Design Guidelines Bad design of antenna and layout may cause reduced GNSS receiving sensitivity, longer GNSS positioning time, or reduced positioning accuracy. In order to avoid these, please follow the design rules listed below:      Maximize the distance among GNSS antenna, main antenna, Rx-diversity/MIMO antenna, Wi-Fi/BT antenna, FM antenna and Wi-Fi MIMO antenna (including trace routing and antenna layout) to avoid mutual interference.
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Smart LTE Module Series SC66 Hardware Design 6 Antenna Interfaces SC66 provides six antenna interfaces for main antenna, Rx-diversity/MIMO antenna, GNSS antenna, Wi-Fi/BT antenna, FM antenna and Wi-Fi MIMO antenna, respectively. The antenna interfaces have an impedance of 50Ω. 6.1. Main/Rx-diversity Antenna Interfaces The pin definition of main/Rx-diversity antenna interfaces is shown below. Table 36: Pin Definition of Main/Rx-diversity Antenna Interfaces Pin Name Pin No.
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Smart LTE Module Series SC66 Hardware Design TD-SCDMA B39 1880~1920 1880~1920 MHz LTE-FDD B1 2110~2170 1920~1980 MHz LTE-FDD B3 1805~1880 1710~1785 MHz LTE-FDD B5 869~894 824~849 MHz LTE-FDD B8 925~960 880~915 MHz LTE-TDD B34 2010~2025 2010~2025 MHz LTE-TDD B38 2570~2620 2570~2620 MHz LTE-TDD B39 1880~1920 1880~1920 MHz LTE-TDD B40 2300~2400 2300~2400 MHz LTE-TDD B41 1) 2555~2655 2555~2655 MHz Table 38: SC66-A* Operating Frequencies 3GPP Band Receive Transmit Unit
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B26 859~894 814~849 MHz LTE-FDD B66 2110~2200 1710~1780 MHz LTE-FDD B71 617~652 663~698 MHz LTE-TDD B41 2) 2496~2690 2496~2690 MHz Table 39: SC66-J* Operating Frequencies 3GPP Band Receive Transmit Unit WCDMA B1 2110~2170 1920~1980 MHz WCDMA B6 875~885 830~840 MHz WCDMA B8 925~960 880~915 MHz WCDMA B19 875~890 830~845 MHz LTE-FDD B1 2110~2170 1920~1980 MHz LTE-FDD B3 1805~1880 1710~1785 MHz LTE-FDD B5 869~894
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Smart LTE Module Series SC66 Hardware Design Table 40: SC66-E* Operating Frequencies 3GPP Band Receive Transmit Unit GSM850 869~894 824~849 MHz EGSM900 925~960 880~915 MHz DCS1800 1805~1880 1710~1785 MHz PCS1900 1930~1990 1850~1910 MHz WCDMA B1 2110~2170 1920~1980 MHz WCDMA B2 1930~1990 1850~1910 MHz WCDMA B4 2110~2155 1710~1755 MHz WCDMA B5 869~894 824~849 MHz WCDMA B8 925~960 880~915 MHz LTE-FDD B1 2110~2170 1920~1980 MHz LTE-FDD B2 1930~1990 1850~1910 MHz
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Smart LTE Module Series SC66 Hardware Design NOTES 1. 2. 3. 1) The bandwidth of LTE-TDD B41 for SC66-CE* and SC66-J* is 120MHz (2535MHz~2655MHz), and the corresponding channel ranges from 40040 to 41240. 2) The bandwidth of LTE-TDD B41 for SC66-A and SC66-E is 200MHz (2496MHZ~2690MHz), and the corresponding channel ranges from 39650 to 41589. “*” means under development. 6.1.1.
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Smart LTE Module Series SC66 Hardware Design impedance. The following are reference designs of microstrip line or coplanar waveguide with different PCB structures.
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Smart LTE Module Series SC66 Hardware Design Figure 40: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:      Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50Ω. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground.
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Smart LTE Module Series SC66 Hardware Design MIMO1) NOTE 1) SC66-CE and SC66-W do not support Wi-Fi MIMO function. Table 42: Wi-Fi/BT Frequency Type Frequency Unit 802.11a/b/g/n/ac 2402~2482 5180~5825 MHz BT5.0 2402~2480 MHz A reference circuit design for Wi-Fi/BT antenna interface is shown below. A π-type matching circuit is recommended to be reserved for better RF performance. The capacitors are not mounted by default and resistors are 0Ω.
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Smart LTE Module Series SC66 Hardware Design R2 0R ANT_WIFI_MIMO C3 C4 NM NM Module Figure 42: Reference Circuit Design for Wi-Fi MINO Antenna Interface 6.3. GNSS Antenna Interface Table 43: Pin Definition of GNSS Antenna Pin Name Pin No. I/O Description Comment ANT_GNSS 134 AI GNSS antenna Interface 50Ω impedance DO LNA enable control For test purpose only. If unused, keep it open. Cannot be pulled up. GNSS_PPS_OUT 202 Table 44: GNSS Frequency Type Frequency Unit GPS 1575.42±1.
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Smart LTE Module Series SC66 Hardware Design 6.3.1. Recommended Circuit for Passive Antenna GNSS antenna interface supports passive ceramic antennas and other types of passive antennas. A reference circuit design is given below.
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Smart LTE Module Series SC66 Hardware Design 3V3 Active Antenna R1 R2 ANT_GNSS C4 0R NM Module C3 C1 C2 1uF 100pF 10R L1 56nH C5 100pF NM Figure 44: Reference Circuit Design for GNSS Active Antenna SC66_Hardware_Design 105 / 139
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Smart LTE Module Series SC66 Hardware Design 6.4. Antenna Installation 6.4.1. Antenna Requirements The following table shows the requirements on main antenna, Rx-diversity, Wi-Fi/BT antenna and GNSS antenna. Table 45: Antenna Requirements Antenna Type Requirements GSM/WCDMA/TD-SCDMA/ LTE VSWR: ≤ 2 Gain (dBi): 1 Max Input Power (W): 50 Input Impedance (Ω): 50 Polarization Type: Vertical Cable Insertion Loss: < 1dB (frequency: 663-960 MHz) Cable Insertion Loss: < 1.
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Smart LTE Module Series SC66 Hardware Design 6.4.2. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by HIROSE. Figure 45: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 46: Mechanicals of U.
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Smart LTE Module Series SC66 Hardware Design The following figure describes the space factor of mated connector. Figure 47: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
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Smart LTE Module Series SC66 Hardware Design 7 Electrical, Reliability and Radio Characteristics 7.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 46: Absolute Maximum Ratings Parameter Min Max Unit VBAT -0.5 6 V USB_VBUS -0.5 16 V 0 3 A 2.093 V Current on VBAT Voltage on Digital Pins -0.3 7.2.
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Smart LTE Module Series SC66 Hardware Design IVBAT Peak supply current (during transmission slot) Maximum power control level at EGSM900 USB_VBUS VRTC Power supply voltage of backup battery 1.8 3.0 A 3.6 5.0 10 V 2.1 3.0 3.25 V 7.3. Operation and Storage Temperatures The operation and storage temperatures are listed in the following table. Table 48: Operation and Storage Temperatures Parameter Min Typ.
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Smart LTE Module Series SC66 Hardware Design 7.4. Current Consumption Table 49: SC66-CE* Current Consumption Parameter Description Conditions Min Typ.
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Smart LTE Module Series SC66 Hardware Design Sleep (USB disconnected) @DRX=9 TBD TBD TBD mA EGSM900 @PCL 5 TBD TBD TBD mA EGSM900 @PCL 12 TBD TBD TBD mA EGSM900 @PCL 19 TBD TBD TBD mA DCS1800 @PCL 0 TBD TBD TBD mA DCS1800 @PCL 7 TBD TBD TBD mA DCS1800 @PCL 15 TBD TBD TBD mA B1 @max power TBD TBD TBD mA B8 @max power TBD TBD TBD mA EGSM900 (1UL/4DL) @PCL 5 TBD TBD TBD mA EGSM900 (2UL/3DL) @PCL 5 TBD TBD TBD mA EGSM900 (3UL/2DL) @PCL 5 TBD TBD TBD mA
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Smart LTE Module Series SC66 Hardware Design WCDMA data transfer EVDO/CDMA data transfer TD-SCDMA data transfer LTE data transfer B1 (HSDPA) @max power TBD TBD TBD mA B8 (HSDPA) @max power TBD TBD TBD mA B1 (HSUPA) @max power TBD TBD TBD mA B8 (HSUPA) @max power TBD TBD TBD mA BC0 @max power TBD TBD TBD mA TD-SCDMA B34 @max power TBD TBD TBD mA TD-SCDMA B39 @max power TBD TBD TBD mA LTE-FDD B1 @max power TBD TBD TBD mA LTE-FDD B3 @max power TBD TBD TBD mA LTE
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Smart LTE Module Series SC66 Hardware Design LTE-TDD supply current WCDMA voice call WCDMA data transfer Sleep (USB disconnected) @DRX=8 TBD TBD TBD mA Sleep (USB disconnected) @DRX=9 TBD TBD TBD mA Sleep (USB disconnected) @DRX=6 TBD TBD TBD mA Sleep (USB disconnected) @DRX=8 TBD TBD TBD mA Sleep (USB disconnected) @DRX=9 TBD TBD TBD mA B2 @max power TBD TBD TBD mA B4 @max power TBD TBD TBD mA B5 @max power TBD TBD TBD mA B2 (HSDPA) @max power TBD TBD TBD mA
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B66 @max power TBD TBD TBD mA LTE-TDD B71 @max power TBD TBD TBD mA LTE-TDD B41 @max power TBD TBD TBD mA Table 51: SC66-J* Current Consumption Parameter Description Conditions Min Typ.
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Smart LTE Module Series SC66 Hardware Design LTE data transfer B19 (HSDPA) @max power TBD TBD TBD mA B1 (HSUPA) @max power TBD TBD TBD mA B6 (HSUPA) @max power TBD TBD TBD mA B8 (HSUPA) @max power TBD TBD TBD mA B19 (HSUPA) @max power TBD TBD TBD mA LTE-FDD B1 @max power TBD TBD TBD mA LTE-FDD B3 @max power TBD TBD TBD mA LTE-FDD B5 @max power TBD TBD TBD mA LTE-FDD B8 @max power TBD TBD TBD mA LTE-FDD B11 @max power TBD TBD TBD mA LTE-FDD B18 @max power
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Smart LTE Module Series SC66 Hardware Design LTE-FDD supply current LTE-TDD supply current Sleep (USB disconnected) @DRX=8 TBD TBD TBD mA Sleep (USB disconnected) @DRX=9 TBD TBD TBD mA Sleep (USB disconnected) @DRX=6 TBD TBD TBD mA Sleep (USB disconnected) @DRX=8 TBD TBD TBD mA Sleep (USB disconnected) @DRX=9 TBD TBD TBD mA Sleep (USB disconnected) @DRX=6 TBD TBD TBD mA Sleep (USB disconnected) @DRX=8 TBD TBD TBD mA Sleep (USB disconnected) @DRX=9 TBD TBD TBD mA GS
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Smart LTE Module Series SC66 Hardware Design B8 @max power TBD TBD TBD mA GSM850 (1UL/4DL) @PCL 5 TBD TBD TBD mA GSM850 (2UL/3DL) @PCL 5 TBD TBD TBD mA GSM850 (3UL/2DL) @PCL 5 TBD TBD TBD mA GSM850 (4UL/1DL) @PCL 5 TBD TBD TBD mA EGSM900 (1UL/4DL) @PCL 5 TBD TBD TBD mA EGSM900 (2UL/3DL) @PCL 5 TBD TBD TBD mA EGSM900 (3UL/2DL) @PCL 5 TBD TBD TBD mA EGSM900 (4UL/1DL) @PCL 5 TBD TBD TBD mA DCS1800 (1UL/4DL) @PCL 0 TBD TBD TBD mA DCS1800 (2UL/3DL) @PCL 0 TBD
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Smart LTE Module Series SC66 Hardware Design DCS1800 (1UL/4DL) @PCL 2 TBD TBD TBD mA DCS1800 (2UL/3DL) @PCL 2 TBD TBD TBD mA DCS1800 (3UL/2DL) @PCL 2 TBD TBD TBD mA DCS1800 (4UL/1DL) @PCL 2 TBD TBD TBD mA PCS1900 (1UL/4DL) @PCL 2 TBD TBD TBD mA PCS1900 (2UL/3DL) @PCL 2 TBD TBD TBD mA PCS1900 (3UL/2DL) @PCL 2 TBD TBD TBD mA PCS1900 (4UL/1DL) @PCL 2 TBD TBD TBD mA B1 (HSDPA) @max power TBD TBD TBD mA B2 (HSDPA) @max power TBD TBD TBD mA B4 (HSDPA) @max power
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B20 @max power LTE-FDD B28 (A+B) @max TBD TBD TBD mA TBD TBD TBD mA TBD TBD TBD mA power LTE-TDD B41 @max power NOTE “*” means under development. 7.5. RF Output Power The following table shows the RF output power of SC66 module.
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Smart LTE Module Series SC66 Hardware Design LTE-TDD B38 23dBm±2dB <-39dBm LTE-TDD B39 23dBm±2dB <-39dBm LTE-TDD B40 23dBm±2dB <-39dBm LTE-TDD B41 23dBm±2dB <-39dBm Frequency Max Min WCDMA B2 24dBm+1/-3dB <-49dBm WCDMA B4 24dBm+1/-3dB <-49dBm WCDMA B5 24dBm+1/-3dB <-49dBm LTE-FDD B2 23dBm±2dB <-39dBm LTE-FDD B4 23dBm±2dB <-39dBm LTE-FDD B5 23dBm±2dB <-39dBm LTE-FDD B7 23dBm±2dB <-39dBm LTE-FDD B12 23dBm±2dB <-39dBm LTE-FDD B13 23dBm±2dB <-39dBm LTE-FDD B14 23dBm±2
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Smart LTE Module Series SC66 Hardware Design Table 55: SC66-J* RF Output Power Frequency Max Min WCDMA B1 24dBm+1/-3dB <-49dBm WCDMA B6 24dBm+1/-3dB <-49dBm WCDMA B8 24dBm+1/-3dB <-49dBm WCDMA B19 24dBm+1/-3dB <-49dBm LTE-FDD B1 23dBm±2dB <-39dBm LTE-FDD B3 23dBm±2dB <-39dBm LTE-FDD B5 23dBm±2dB <-39dBm LTE-FDD B8 23dBm±2dB <-39dBm LTE-FDD B11 23dBm±2dB <-39dBm LTE-FDD B18 23dBm±2dB <-39dBm LTE-FDD B19 23dBm±2dB <-39dBm LTE-FDD B21 23dBm±2dB <-39dBm LTE-FDD B26 23dBm
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Smart LTE Module Series SC66 Hardware Design WCDMA B2 24dBm+1/-3dB <-49dBm WCDMA B4 24dBm+1/-3dB <-49dBm WCDMA B5 24dBm+1/-3dB <-49dBm WCDMA B8 24dBm+1/-3dB <-49dBm LTE-FDD B1 23dBm±2dB <-39dBm LTE-FDD B2 23dBm±2dB <-39dBm LTE-FDD B3 23dBm±2dB <-39dBm LTE-FDD B4 23dBm±2dB <-39dBm LTE-FDD B5 23dBm±2dB <-39dBm LTE-FDD B7 23dBm±2dB <-39dBm LTE-FDD B8 23dBm±2dB <-39dBm LTE-FDD B20 23dBm±2dB <-39dBm LTE-FDD B28 (A+B) 23dBm±2dB <-39dBm LTE-TDD B38 23dBm±2dB <-39dBm LTE-T
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Smart LTE Module Series SC66 Hardware Design 7.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of SC66 module. Table 57: SC66-CE* RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) 3GPP (SIMO) Primary Diversity SIMO EGSM900 -109dBm / / -102.4dBm DCS1800 -108dBm / / -102.4dBm WCDMA B1 -110dBm / / -106.7dBm WCDMA B8 -110dBm / / -103.
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Smart LTE Module Series SC66 Hardware Design Table 58: SC66-A* RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) 3GPP (SIMO) Primary Diversity SIMO WCDMA B2 / / / -104.7dBm WCDMA B4 / / / -106.7dBm WCDMA B5 / / / -104.7dBm LTE-FDD B2 (10M) / / / -94.3dBm LTE-FDD B4 (10M) / / / -96.3dBm LTE-FDD B5 (10M) / / / -94.3dBm LTE-FDD B7 (10M) / / / -94.3dBm LTE-FDD B12 (10M) / / / -93.3dBm LTE-FDD B13 (10M) / / / -93.
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B3 (10M) / / / -93.3dBm LTE-FDD B5 (10M) / / / -94.3dBm LTE-FDD B8 (10M) / / / -93.3dBm LTE-FDD B11 (10M) / / / -96.3dBm LTE-FDD B18 (10M) / / / -96.3dBm LTE-FDD B19 (10M) / / / -96.3dBm LTE-FDD B21 (10M) / / / -96.3dBm LTE-FDD B26 (10M) / / / -93.8dBm / / / -94.8dBm / / / -94.3dBm LTE-FDD B28 (A+B) (10M) LTE-TDD B41 (10M) Table 60: SC66-E* RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.
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Smart LTE Module Series SC66 Hardware Design LTE-FDD B3 (10M) / / / -93.3dBm LTE-FDD B4 (10M) / / / -96.3dBm LTE-FDD B5 (10M) / / / -94.3dBm LTE-FDD B7 (10M) / / / -94.3dBm LTE-FDD B8 (10M) / / / -93.3dBm LTE-FDD B20 (10M) / / / -93.3dBm / / / LTE-FDD B28 (A+B) -94.8dBm (10M) LTE-TDD B38 (10M) / / / -96.3dBm LTE-TDD B39 (10M) / / / -96.3dBm LTE-TDD B40 (10M) / / / -96.3dBm LTE-TDD B41 (10M) / / / -94.3dBm NOTE “*” means under development.
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Smart LTE Module Series SC66 Hardware Design 7.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it should be subject to ESD handling precautions that are typically applied to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module.
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Smart LTE Module Series SC66 Hardware Design 8 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ±0.05mm unless otherwise specified. 8.1.
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Smart LTE Module Series SC66 Hardware Design Figure 49: Module Bottom Dimensions (Top View) SC66_Hardware_Design 130 / 139
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Smart LTE Module Series SC66 Hardware Design 8.2. Recommended Footprint Figure 50: Recommended Footprint (Top View) NOTES 1. 2. For easy maintenance of the module, keep about 3mm between the module and other components on host PCB. All RESERVED pins should be kept open and MUST NOT be connected to ground.
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Smart LTE Module Series SC66 Hardware Design 8.3. Top and Bottom View of the Module Figure 51: Top View of the Module Figure 52: Bottom View of the Module NOTE These are renderings of SC66 module. For authentic dimension and appearance, please refer to the module that you receive from Quectel.
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Smart LTE Module Series SC66 Hardware Design 9 Storage, Manufacturing and Packaging 9.1. Storage SC66 is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are shown below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:   Mounted within 168 hours at the factory environment of ≤30ºC/60%RH. Stored at <10%RH. 3.
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Smart LTE Module Series SC66 Hardware Design 9.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.18mm~0.20mm.
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Smart LTE Module Series SC66 Hardware Design Reflow Zone Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 238°C ~ 245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle 1 9.3. Packaging SC66 is packaged in tape and reel carriers. Each reel is 330mm in diameter and contains 200 modules. The following figures show the package details, measured in mm.
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Smart LTE Module Series SC66 Hardware Design Figure 55: Reel Dimensions Table 63: Reel Packaging Model Name MOQ for MP Minimum Package: 200pcs Minimum Package×4=800pcs SC66 200 Size: 398mm × 383mm × 83mm N.W: 1.92kg G.W: 3.67kg Size: 420mm × 350mm × 405mm N.W: 8.18kg G.W: 15.
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Smart LTE Module Series SC66 Hardware Design 10 Appendix A References Table 64: Related Documents SN Document Name Remark [1] Quectel_Smart_EVB-G2_User_Guide EVB User Guide for SC66 [2] Quectel_SC66_GPIO_Configuration GPIO Configuration of SC66 [3] Quectel_RF_Layout_Application_Note RF Layout Application Note [4] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide [5] Quectel_SC66_Reference_Design Reference Design for SC66 Table 65: Terms and Abbreviations Abbreviation
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Smart LTE Module Series SC66 Hardware Design ESD Electrostatic Discharge FDD Frequency Division Duplex FR Full Rate GMSK Gaussian Minimum Shift Keying GPS Global Positioning System GPU Graphics Processing Unit GSM Global System for Mobile Communications HR Half Rate HSDPA High Speed Down Link Packet Access HSPA High Speed Packet Access I/O Input/Output IQ Inphase and Quadrature LCD Liquid Crystal Display LCM LCD Module LED Light Emitting Diode LNA Low Noise Amplifier LRA Li
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Smart LTE Module Series SC66 Hardware Design QPSK Quadrature Phase Shift Keying RF Radio Frequency RH Relative Humidity RHCP Right Hand Circularly Polarized RTC Real Time Clock Rx Receive SMS Short Message Service TDD Time Division Distortion TE Terminal Equipment TX Transmitting Direction UART Universal Asynchronous Receiver & Transmitter UMTS Universal Mobile Telecommunications System (U)SIM (Universal) Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltag
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Smart LTE Module Series SC66 Hardware Design 11 Appendix B GPRS Coding Schemes Table 66: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
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Smart LTE Module Series SC66 Hardware Design 12 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
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Smart LTE Module Series SC66 Hardware Design 14 4 4 NA 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 SC66_Hardware_Design 142 / 139
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Smart LTE Module Series SC66 Hardware Design 13 Appendix D EDGE Modulation and Coding Schemes Table 68: EDGE Modulation and Coding Schemes Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.
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Smart LTE Module Series SC66 Hardware Design Formatted: Heading 1 IC & FCC Requirement FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met: 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only.
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Smart LTE Module Series SC66 Hardware Design LTE BAND 2 LTE BAND 4 LTE BAND 5 LTE BAND 7 LTE BAND 12 LTE BAND 13 LTE BAND 14 LTE BAND 17 LTE BAND 25 LTE BAND 26(814-824) LTE BAND 26(824-849) LTE BAND 41 LTE BAND 66 LTE BAND 71 Bluetooth/ Bluetooth BLE WIFI 2.4G/5G 5. This module must not transmit simultaneously with any other antenna or transmitter 6.
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Smart LTE Module Series SC66 Hardware Design when installed in the host, or (2) if the host is marketed so that end users do not have straightforward commonly used methods for access to remove the module so that the FCC ID of the module is visible; then an additional permanent label referring to the enclosed module:“Contains Transmitter Module FCC ID: XMR2019SC66A” or “Contains FCC ID: XMR2019SC66A” must be used.
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Smart LTE Module Series SC66 Hardware Design de toutes les personnes et ne doit pas être colocalisé ou fonctionner conjointement avec une autre antenne ou un autre émetteur. The host product shall be properly labeled to identify the modules within the host product.