BC66-NA Hardware Design LPWA Module Series Rev. BC66-NA_Hardware_Design_V1.0 Date: 2019-04-08 Status: Preliminary www.quectel.
LPWA Module Series BC66-NA Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.
LPWA Module Series BC66-NA Hardware Design About the Document History Revision Date Author Description 1.
LPWA Module Series BC66-NA Hardware Design Contents About the Document ................................................................................................................................ 2 Contents .................................................................................................................................................... 3 Table Index .........................................................................................................................................
LPWA Module Series BC66-NA Hardware Design 4.5. 4.6. 4.7. 4.8. Antenna Requirements ........................................................................................................... 44 RF Output Power .................................................................................................................... 45 RF Receiving Sensitivity .........................................................................................................
LPWA Module Series BC66-NA Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF BC66-NA MODULE ................................................................................ 13 TABLE 2: BC66-NA KEY FEATURES ............................................................................................................... 14 TABLE 3: I/O PARAMETERS DEFINITION ....................................................................................................... 19 TABLE 4: PIN DESCRIPTION .................
LPWA Module Series BC66-NA Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 16 FIGURE 2: PIN ASSIGNMENT ......................................................................................................................... 18 FIGURE 3: MODULE OPERATING MODES ....................................................................................................
LPWA Module Series BC66-NA Hardware Design 1 Introduction This document defines the BC66-NA module and describes its air interface and hardware interface which are connected with the customers’ applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, customers can use BC66-NA to design and set up mobile applications easily.
LPWA Module Series BC66-NA Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating BC66-NA module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
LPWA Module Series BC66-NA Hardware Design 1.2. FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met: 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only.
LPWA Module Series BC66-NA Hardware Design For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations.
LPWA Module Series BC66-NA Hardware Design this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
LPWA Module Series BC66-NA Hardware Design and must not transmit simultaneously with any other antenna or transmitter. L'autre utilisé pour l'émetteur doit être installé pour fournir une distance de séparation d'au moins 20 cm de toutes les personnes et ne doit pas être colocalisé ou fonctionner conjointement avec une autre antenne ou un autre émetteur.
LPWA Module Series BC66-NA Hardware Design 2 Product Concept 2.1. General Description BC66-NA is a high-performance NB-IoT module with extremely low power consumption. It is designed to communicate with infrastructures of mobile network operators through NB-IoT radio protocols (3GPP Rel.13 and 3GPP Rel.14). BC66-NA supports a broad range of frequency bands as listed below.
LPWA Module Series BC66-NA Hardware Design 2.2. Key Features The following table describes the detailed features of BC66-NA module. Table 2: BC66-NA Key Features Feature Details Power Supply Supply voltage: 2.1V ~ 3.63V Typical supply voltage: 3.3V Power Saving Typical power consumption: 3.5μA Frequency Bands LTE Cat NB1: B1/B2/B3/B4/B5/B8/B12/B13/B17/B18/B19/B20/B25/B26*/B28/B66/B71/B85 Transmitting Power 23dBm±2dB USIM Interface Support 1.8V USIM card Conform to USB 1.
LPWA Module Series BC66-NA Hardware Design 3GPP TS 27.005/3GPP TS 27.007 AT commands (3GPP Rel. 13/Rel.14*) and Quectel Enhanced AT commands Firmware Update Upgrade firmware via main UART port or DFOTA Real Time Clock Supported Physical Characteristics Size: (17.7±0.15)mm × (15.8±0.15)mm × (2.0±0.2)mm Weight: 1.2g±0.
LPWA Module Series BC66-NA Hardware Design Figure 1: Functional Diagram NOTE “*” means under development. 2.4. Development Board Quectel provides a complete set of development tools to facilitate the use and testing of BC66-NA module. The development tool kit includes the TE-B board, USB cable, antenna and other peripherals. For more details, please refer to document [1].
LPWA Module Series BC66-NA Hardware Design 3 Application Interfaces 3.1. General Description BC66-NA is equipped with a total of 58 pins, including 44 LCC pins and 14 LGA pins. The subsequent chapters will provide detailed descriptions of the following functions/pins/interfaces: PSM Power Supply PWRKEY RESET USB Interface UART Interfaces USIM Interface ADC Interface* RI Behaviors Network Status Indication NOTE “*” means under development.
LPWA Module Series BC66-NA Hardware Design 36 22 USB_DM 40 USB_DP VUSB_3V3 GND RESERVED GND 37 RESERVED 21 20 RI RXD_DBG 19 PSM_EINT 38 18 RXD TXD_DBG 41 17 TXD 39 GND 42 16 NETLIGHT GND VBAT_BB 43 15 RESET VBAT_RF 44 14 SIM_VDD RESERVED 3.2. Pin Assignment Figure 2: Pin Assignment NOTES 1. 2. Keep all reserved pins unconnected. “*” means under development.
LPWA Module Series BC66-NA Hardware Design 3.3. Pin Description Table 3: I/O Parameters Definition Type Description AI Analog input AO Analog output DI Digital input DO Digital output IO Bidirectional PI Power input PO Power output Table 4: Pin Description Power Supply Pin Name VBAT_BB VBAT_RF Pin No. 42 43 VDD_ EXT 24 GND 1, 27, 34, 36, 37, 40, 41 I/O Description DC Characteristics PI Power supply for the module’s baseband part Vmax=3.63V Vmin=2.1V Vnorm=3.
LPWA Module Series BC66-NA Hardware Design Power Key Interface Pin Name I/O Description DC Characteristics 7 DI Pull down PWRKEY to turn on the module VILmax=0.3*VBAT VIHmin=0.7*VBAT Pin Name Pin No. I/O Description DC Characteristics RESET 15 DI Reset the module I/O Description DI Dedicated external interrupt pin. Used to wake up the module from PSM. PWRKEY Pin No. Comment Reset Interface Comment Active low. PSM_EINT Interface Pin Name PSM_EINT Pin No.
LPWA Module Series BC66-NA Hardware Design Pin Name Pin No. I/O Description RXD_AUX 28 DI Receive data DC Characteristics Comment 1.8V power domain. TXD_AUX 29 DO Transmit data Debug UART Port Pin Name Pin No. I/O Description RXD_DBG 38 DI Receive data TXD_DBG 39 DO Transmit data Pin Name Pin No. I/O Description RI 20 DO Ring indication signal DC Characteristics Comment 1.8V power domain. Ringing Signal DC Characteristics Comment 1.8V power domain.
LPWA Module Series BC66-NA Hardware Design USB_MODE 47 DI Pull down the pin to achieve USB download function VUSB_3V3 49 PI USB power supply USB_DP 50 IO USB differential data (+) USB_DM 51 IO USB differential data (-) Vnorm=3.3V Conform to USB 1.1 specifications. Request 90 Ω differential impedance. Reserved Pins Pin Name Pin No. RESERVED 2~6, 8, 21~23, 25, 26, 30~33, 44~46, 48, 52~58 I/O Description DC Characteristics Comment Keep these pins unconnected. NOTES 1. 2.
LPWA Module Series BC66-NA Hardware Design Idle In idle mode, the module is in “Light Sleep” status and network connection is maintained in DRX/eDRX state; paging messages can be received. Transitions to connected mode or PSM can be initiated in idle mode. PSM In PSM, the module is in “Deep Sleep” status and only the 32kHz RTC is working. CPU is powered off; the network is disconnected and thus cannot receive downlink data. Transitions to connected mode can be initiated in PSM.
Transmission Reception Power Consumption LPWA Module Series BC66-NA Hardware Design Idle T3324 UE inactive time PSM T3412 Idle TAU Figure 4: Module Power Consumption in Different Modes The procedure for entering PSM is as follows: the module requests to enter PSM in “ATTACH REQUEST” message during attach/TAU (Tracking Area Update) procedure. Then the network accepts the request and provides an active time value (T3324) to the module and the mobile reachable timer starts.
LPWA Module Series BC66-NA Hardware Design Figure 5: Timing of Waking up Module from PSM NOTE Among all GPIO interrupts, only the dedicated external interrupt pin PSM_EINT can successfully wake up the module from PSM. The module cannot be woken up by any other general purpose GPIO interrupts. 3.6. Power Supply 3.6.1. Power Supply Pins BC66-NA provides two VBAT pins for connection with an external power supply. The table below describes the module's VBAT and ground pins.
LPWA Module Series BC66-NA Hardware Design 3.6.2. Reference Design for Power Supply Power design for a module is critical to its performance. It is recommended to use a low quiescent current LDO with output current capacity of 0.5A as the power supply for BC66-NA. A Li-MnO2/2S alkaline battery can also be used as the power supply. The supply voltage of the module ranges from 2.1V to 3.63V. When the module is working, please make sure its input voltage will never drop below 2.
LPWA Module Series BC66-NA Hardware Design It is recommended use an open drain/collector driver to control the PWRKEY. A simple reference circuit is illustrated in the following figure. Figure 7: Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection.
LPWA Module Series BC66-NA Hardware Design NOTE PWRKEY cannot be pulled down all the time, otherwise the module will not be able to enter into PSM. 3.7.2. Turn off BC66-NA can be powered off though any of the following methods: Power off by AT+QPOWD=0. In emergent conditions, the module can be powered off through disconnecting VBAT power supply. The module will be powered off automatically when VBAT drops below 2.1V.
LPWA Module Series BC66-NA Hardware Design 3.7.3. Reset the Module Driving the RESET pin to a low level voltage for at least 50ms will reset the module. Table 8: Reset Pin Pin Name Pin No. Description Reset Pull-down Time RESET 15 Reset the module. Active low. ≥50ms The recommended circuits of resetting the module are shown below. An open drain/collector driver or button can be used to control the RESET pin.
LPWA Module Series BC66-NA Hardware Design Figure 14: Reset Timing 3.8. USB Interface The USB interface of BC26 module conforms to USB 1.1 specifications and supports full speed (12Mbps) mode. The interface can be used for software debugging and software upgrading, and supports USB serial driver under Windows/Linux operating systems. The following table is the pin definition of USB interface: Table 9: Pin Definition of USB Interface Pin Name Pin No.
LPWA Module Series BC66-NA Hardware Design The following is a reference design of USB interface: Module PC 3.3V ESD Array VUSB_3V3 USB_DM USB_DM USB_DP USB_DP GND GND Figure 15: USB Interface Reference Design In the circuit design of USB interface, in order to ensure the performance of USB, the following principles are suggested in the circuit design: It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace is 90Ω.
LPWA Module Series BC66-NA Hardware Design Table 10: Pin Definition of UART Interfaces Interface Pin Name Pin No.
LPWA Module Series BC66-NA Hardware Design Figure 16: Reference Design for Main UART Port 3.9.2. Debug UART Port Through debug tools, the debug UART port can be used to output logs for firmware debugging. Its baud rate is 115200bps by default. The following is a reference design of debug UART port. Figure 17: Reference Design of Debug UART Port 3.9.3. Auxiliary UART Port The auxiliary UART port is designed as a general purpose UART for communication with DTE.
LPWA Module Series BC66-NA Hardware Design Figure 18: Reference Design of Auxiliary UART Port 3.9.4. UART Application The module provides 1.8V UART interfaces. A level translator should be used if the application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments (please visit http://www.ti.com for more information) is recommended. The following figure shows a reference design. Module DTE VDD_EXT VCCA VCCB 0.1uF 0.
LPWA Module Series BC66-NA Hardware Design VDD_EXT Module 4.7K 1nF VDD_EXT DTE 10K RXD TXD TXD RXD 1nF VDD_EXT 4.7K 10K VCC_DTE RXD_DBG TXD_DBG RXD_AUX TXD_AUX RI GND TXD_DBG RXD_DBG TXD_AUX RXD_AUX GPIO GND Figure 20: Reference Circuit with Transistor Circuit The following circuit shows a reference design for the communication between the module and a PC with standard RS-232 interface. Please make sure the I/O voltage of level shifter which connects to module is 1.8V.
LPWA Module Series BC66-NA Hardware Design NOTES 1. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 2. “ ” represents the test point of UART interfaces. It is also recommended to reserve the test points of VBAT and PWRKEY, for convenient firmware upgrade and debugging when necessary. “*” means under development. 3. 3.10. USIM Interface The module provides a USIM interface compliant to ISO/IEC 7816-3, enabling the module to access to an external 1.
LPWA Module Series BC66-NA Hardware Design Figure 22: Reference Circuit for USIM Interface with a 6-pin USIM Card Connector For more information http://www.molex.com. of USIM card connector, please visit http://www.amphenol.com or In order to enhance the reliability and availability of USIM card in application, please follow the criteria below in USIM circuit design: Keep the placement of USIM card connector as close as possible to the module.
LPWA Module Series BC66-NA Hardware Design 3.11. ADC Interface* The module provides a 10-bit ADC input channel to read the voltage value. The interface is available in active mode, and has to be woken up first to ensure availability in sleep modes. Table 12: Pin Definition of ADC Interface Pin Name Pin No. Description Sample Range ADC0* 9 Analog to digital converter interface 0V ~ 1.4V NOTE “*” means under development. 3.12.
LPWA Module Series BC66-NA Hardware Design Output data RI HIGH LOW 120ms idle A UR C or SMS me ssage is received Figure 23: Behaviors of RI When a URC or SMS Message is Received 3.13. Network Status Indication The NETLIGHT signal can be used to indicate the network status of the module. The following table illustrates the module status indicated by NETLIGHT.
LPWA Module Series BC66-NA Hardware Design 4 Antenna Interface The pin 35 is the RF antenna pad. The antenna port has an impedance of 50Ω. 4.1. Pin Definition Table 15: Pin Definition of NB-IoT Antenna Interface Pin Name Pin No. Description RF_ANT 35 RF antenna interface GND 34, 36, 37 Ground 4.2.
LPWA Module Series BC66-NA Hardware Design B17 734MHz~746MHz 704MHz~716MHz B18 860MHz~875MHz 815MHz~830MHz B19 875MHz~890MHz 830MHz~845MHz B20 791MHz~821MHz 832MHz~862MHz B25 1930MHz~1995MHz 1850MHz~1915MHz B26* 859MHz~894MHz 814MHz~849MHz B28 758MHz~803MHz 703MHz~748MHz B66 2110MHz~2200MHz 1710MHz~1780MHz B71 617MHz~652MHz 663MHz~698MHz B85 728MHz~746MHz 698MHz~716MHz NOTE “*” means under development. 4.3.
LPWA Module Series BC66-NA Hardware Design Figure 25: Reference Design of NB-IoT Antenna Interface 4.4. Reference Design of RF Layout For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. The impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant, the height between signal layer and reference ground (H), and the clearance between RF trace and ground (S).
LPWA Module Series BC66-NA Hardware Design Figure 27: Coplanar Waveguide Line Design on a 2-layer PCB Figure 28: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 29: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: BC66-NA_Hardware_Design 43 / 59
LPWA Module Series BC66-NA Hardware Design Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right angle traces should be changed to curved ones. There should be clearance area under the signal pin of the antenna connector or solder joint.
LPWA Module Series BC66-NA Hardware Design 4.6. RF Output Power Table 19: RF Conducted Output Power Frequency Band Max. Min.
LPWA Module Series BC66-NA Hardware Design 4.7. RF Receiving Sensitivity Table 20: Receiving Sensitivity (with RF Retransmissions) Frequency Band Receiving Sensitivity B1 -129dBm B2 -129dBm B3 -129dBm B4 -129dBm B5 -129dBm B8 -129dBm B12 -129dBm B13 -129dBm B17 -129dBm B18 -129dBm B19 -129dBm B20 -129dBm B25 -129dBm B26* -129dBm B28 -129dBm B66 -129dBm B71 -129dBm B85 -129dBm NOTE “*” means under development.
LPWA Module Series BC66-NA Hardware Design 4.8. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by HIROSE. Figure 30: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 31: Mechanicals of U.
LPWA Module Series BC66-NA Hardware Design The following figure describes the space factor of mated connector. Figure 32: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
LPWA Module Series BC66-NA Hardware Design 5 Electrical and Reliability Characteristics 5.1. Operation and Storage Temperatures The following table lists the operation and storage temperatures of BC66-NA. Table 21: Operation and Storage Temperatures Parameter Min. Typ. Max. Unit Operation Temperature Range 1) -35 +25 +75 ºC Extended Temperature Range 2) -40 +85 ºC Storage Temperature Range -40 +90 ºC NOTES 1. 2. 1) Within operation temperature range, the module is 3GPP compliant.
LPWA Module Series BC66-NA Hardware Design Table 22: Module Current Consumption (3.3V VBAT Power Supply) Parameter Typ. Max. 2) Unit Sleep mode 3.5 5 μA eDRX=81.92s, PTW=40.96s 130 µA @DRX=1.28s 520 μA @DRX=2.56s 250 μA Mode Description PSM Idle IVBAT Connected 1) Single-tone (15kHz subcarrier spacing) Single-tone BC66-NA_Hardware_Design Min.
LPWA Module Series BC66-NA Hardware Design (3.
LPWA Module Series BC66-NA Hardware Design packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module. The following table shows the module’s electrostatic discharge characteristics. Table 23: Electrostatic Discharge Characteristics (25ºC, 45% Relative Humidity) Test Contact Discharge Air Discharge Unit VBAT, GND ±5 ±10 kV Antenna interface ±5 ±10 kV Other interfaces ±0.
LPWA Module Series BC66-NA Hardware Design 6 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimetre (mm), and the tolerances for dimensions without tolerance values are ±0.05mm. 6.1.
LPWA Module Series BC66-NA Hardware Design Pin 1 Figure 32: Module Bottom Dimension (Bottom View) BC66-NA_Hardware_Design 54 / 59
LPWA Module Series BC66-NA Hardware Design 6.2. Recommended Footprint 36 Pin 1 1 23 14 Figure 33: Recommended Footprint (Unit: mm) NOTE The module should be kept about 3mm away from other components on the host PCB.
LPWA Module Series BC66-NA Hardware Design 6.3. Top and Bottom Views of the Module Figure 33: Top View of the Module Figure 34: Bottom View of the Module NOTE These are renderings of BC66-NA module. For authentic dimension and appearance, please refer to the module that you receive from Quectel.
LPWA Module Series BC66-NA Hardware Design 7 Storage, Manufacturing and Packaging 7.1. Storage BC66-NA module is stored in a vacuum-sealed bag. It is rated at MSL 3, and storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be: Mounted within 168 hours at the factory environment of ≤30ºC/60%RH. Stored at <10%RH. 3.
LPWA Module Series BC66-NA Hardware Design 7.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.18mm~0.20mm. For more details, please refer to document [4].
LPWA Module Series BC66-NA Hardware Design Reflow Zone Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 238°C ~ 245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle 1 NOTES 1. During manufacturing and soldering, or any other processes that may contact the module directly, NEVER wipe the module’s shielding can with organic solvents, such as acetone, ethyl alcohol, isopropyl alcohol, trichloroethylene, etc.
LPWA Module Series BC66-NA Hardware Design Figure 35: Tape Dimensions (Unit: mm) Figure 36: Reel Dimensions (Unit: mm) BC66-NA_Hardware_Design 60 / 59
LPWA Module Series BC66-NA Hardware Design 8 Appendix A References Table 25: Related Documents SN Document Name Remark [1] Quectel_BC66-NA-TE-B_User_Guide BC66-NA-TE-B User Guide [2] Quectel_RF_Layout_Application_Note RF Layout Application Note [3] Quectel_BC66-NA_AT_Commands_Manual BC66-NA AT Commands Manual [4] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 26: Terms and Abbreviations Abbreviation Description ADC Analog-to-Digital Converter CoAP Constr
LPWA Module Series BC66-NA Hardware Design kbps Kilo Bits Per Second LED Light Emitting Diode Li-MnO2 Lithium-manganese Dioxide Li-2S Lithium Sulfur LTE Long Term Evolution LwM2M Lightweight M2M MQTT Message Queuing Telemetry Transport NB-IoT Narrow Band- Internet of Things PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol PSM Power Save Mode RF Radio Frequency RTC Real Time Clock RXD Receive Data SMS Short Message Service SSL Secure Sockets Layer
LPWA Module Series BC66-NA Hardware Design Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VInorm Absolute Normal Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin
