EG G91Hardw warre Des sign n LTEM Module Series S Rev. EG91_Ha ardware_ _Design_ _V1.3 2-03 Date: 2019-02 Status: Releassed www.quec ctel.
LTE Module Series EG91 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.
LTE Module Series EG91 Hardware Design About the Document History Revision 1.0 1.1 1.2 Date Author Description 2017-03-22 Felix YIN/ Yeoman CHEN/ Jackie WANG Initial Felix YIN/ Rex WANG 1. Added band B28A. 2. Updated the description of UMTS and GSM features in Table 2. 3. Updated the functional diagram in Figure 1. 4. Updated module operating frequencies in Table 21. 5. Updated current consumption in Table 26. 6. Updated RF output power in Table 27. 7.
LTE Module Series EG91 Hardware Design 8. Updated pin definition of RF antenna in Table 21. 9. Updated module operating frequencies in Table 22. 10. Added description of GNSS antenna interface in Chapter 5.2. 11. Updated antenna requirements in Table 25. 12. Updated RF output power in Table 32. 1.3 2019-02-03 EG91_Hardware_Design 1. Added new variants EG91-NS, EG91-V, EG91-EC and related contents. 2. Opened pin 24 as ADC0 and added related contents. 3. Updated functional diagram (Figure 1) 4.
LTE Module Series EG91 Hardware Design Contents About the Document ................................................................................................................................ 2 Contents .................................................................................................................................................... 4 Table Index .............................................................................................................................................
LTE Module Series EG91 Hardware Design 3.12. 3.13. 3.14. 3.15. 3.16. 3.17. 3.18. PCM and I2C Interfaces ........................................................................................................ 48 SPI Interface ......................................................................................................................... 51 Network Status Indication ..................................................................................................... 51 STATUS .....................
LTE Module Series EG91 Hardware Design 11 Appendix C GPRS Multi-slot Classes ............................................................................................ 95 12 Appendix D EDGE Modulation and Coding Schemes ..................................................................
LTE Module Series EG91 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF EG91 SERIES MODULE ....................................................................... 16 TABLE 2: KEY FEATURES OF EG91 MODULE............................................................................................... 17 TABLE 3: IO PARAMETERS DEFINITION ........................................................................................................ 23 TABLE 4: PIN DESCRIPTION ....................................
LTE Module Series EG91 Hardware Design TABLE 43: EG91-EC CONDUCTED RF RECEIVING SENSITIVITY ............................................................... 78 TABLE 44: ELECTROSTATIC DISCHARGE CHARACTERISTICS ................................................................. 79 TABLE 45: RECOMMENDED THERMAL PROFILE PARAMETERS ............................................................... 87 TABLE 46: RELATED DOCUMENTS .........................................................................................
LTE Module Series EG91 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 20 FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 22 FIGURE 3: SLEEP MODE APPLICATION VIA UART .......................................................................................
LTE Module Series EG91 Hardware Design FIGURE 39: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE) .................. 80 FIGURE 40: REFERENCED HEATSINK DESIGN (HEATSINK AT THE BACKSIDE OF CUSTOMERS’ PCB) ................................................................................................................................................................... 81 FIGURE 41: MODULE TOP AND SIDE DIMENSIONS.....................................................................................
LTE Module Series EG91 Hardware Design 1 Introduction This document defines the EG91module and describes its air interface and hardware interface which are connected with customers’ applications. This document can help customers quickly understand module interface specifications, electrical andmechanical details, as well as other related information of EG91 module. Associated with application note and user guide, customers can use EG91 module to design and set up mobile applications easily.
LTE Module Series EG91 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating EG91module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
LTE Module Series EG91 Hardware Design 1.2. FCC/ISED Regulatory notices Modification statement Quectel has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user’s authority to operate the equipment. Quectel n’approuve aucune modification apportée à l’appareil par l’utilisateur, quelle qu’en soit la nature. Tout changement ou modification peuvent annuler le droit d’utilisation de l’appareil par l’utilisateur.
LTE Module Series EG91 Hardware Design ❒ WCDAM II:≤9.00dBi ❒ WCDAM V:≤6.00dBi ❒ ❒ ❒ ❒ ❒ ❒ ❒ ❒ WCDAM VIII:≤7.15dBi LTE Band2:≤8.50dBi LTE Band4:≤5.50dBi LTE Band5:≤6.64dBi LTE Band12:≤6.15dBi LTE Band13:≤6.44dBi L TE Band25:≤8.50dBi L TE Band25:≤6.63dBi L'émetteur ne doit pas être colocalisé ni fonctionner conjointement avec à autre antenne ou autre émetteur.
LTE Module Series EG91 Hardware Design CAN ICES-3 (B) / NMB-3 (B) This Class B digital apparatus complies with Canadian ICES-003. Cet appareil numérique de classe B est conforme à la norme canadienne ICES-003. Installation Guidance The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device.
LTE Module Series EG91 Hardware Design 2 Product Concept 2.1. General Description EG91module is an embedded 4G wireless communication module with receive diversity. It supportsLTE-FDD/WCDMA/GSM wireless communication, andprovides data connectivity on LTE-FDD,DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA,EDGE andGPRSnetworks. It can also provide voice functionality1)to meet customers’ specific application demands. The following table shows the frequency bands of EG91series module.
LTE Module Series EG91 Hardware Design With a compact profile of 29.0mm ×25.0mm ×2.3mm, EG91 can meet almost all requirements for M2M applications such as automotive, smart metering, tracking system, security, router, wireless POS, mobile computing device, PDA phone, tablet PC, etc. EG91 is an SMD type module which can be embedded into applications through its 106 LGA pads. EG91 is integrated with internet service protocols like TCP, UDP and PPP.
LTE Module Series EG91 Hardware Design Support EDGE multi-slot class 33(33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max 296Kbps (DL)/Max 236.
LTE Module Series EG91 Hardware Design Protocol: NMEA 0183 AT Commands Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT commands Network Indication NETLIGHTpin for network activitystatusindication Antenna Interfaces Including main antenna interface (ANT_MAIN), Rx-diversity antenna (ANT_DIV) interface and GNSS antenna interface(ANT_GNSS)1) Physical Characteristics Size: (29.0±0.15)mm × (25.0±0.15)mm × (2.3±0.2)mm Package: LGA Weight: approx. 3.
LTE Module Series EG91 Hardware Design ANT_MAIN ANT_GNSS 1) ANT_DIV PAM SAW Duplexer Switch LNA SAW VBAT_RF PA SAW PRx GPS DRx Tx NAND DDR2 SDRAM Transceiver IQ VBAT_BB PMIC Control Control PWRKEY Baseband RESET_N STATUS 19.2M XO VDD_EXT USB (U)SIM1 (U)SIM2 PCM I2C SPI UART GPIOs Figure 1: Functional Diagram NOTE 1) GNSS antenna interface is only supported on EG91-NA/-NS/-V/-EC. 2.4.
LTE Module Series EG91 Hardware Design 3 Application Interfaces 3.1. General Description EG91is equipped with 62-pin 1.1mm pitch SMT pads plus 44-pin ground/reserved pads that can be connected to customers’ cellular application platforms.
LTE Module Series EG91 Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of EG91 module.
LTE Module Series EG91 Hardware Design NOTES 1. 2. 3. 4. 1) PWRKEY output voltage is 0.8V because of the diode drop in the Qualcomm chipset. Keep all RESERVEDpins and unused pins unconnected. GND pads should be connected to ground in the design. Definition of pin 49 and 56 are different amongEG91-E/-NS/-V/-EC and EG91-NA.For more details, please refer to Table 4. 3.3. Pin Description The following tables show the pin definition and description of EG91.
LTE Module Series EG91 Hardware Design VBAT_RF 52, 53 VDD_EXT 29 GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~106 PI PO Power supply for module’s RF part Provide 1.8V for external circuit Vmax=4.3V Vmin=3.3V Vnorm=3.8V It must be able to provide sufficient current up to 1.8A in a burst transmission. Vnorm=1.8V IOmax=50mA Power supply for external GPIO’s pull up circuits. If unused, keep it open. Ground Turn-on/off Pin Name PWRKEY RESET_N Pin No.
LTE Module Series EG91 Hardware Design USB_DP USB_DM 9 10 IO USB differential data bus (+) Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. IO USB differential data bus (-) Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. I/O Description DC Characteristics Comment (U)SIM Interfaces Pin Name USIM_GND Pin No. Connect to ground of (U)SIM card connector. Specified ground for (U)SIM card 47 For 1.8V (U)SIM: Vmax=1.
LTE Module Series EG91 Hardware Design USIM1_RST USIM1_ PRESENCE 44 42 DO DI Reset signal of (U)SIMcard (U)SIMcard insertion detection For 1.8V (U)SIM: VOLmax=0.45V VOHmin=1.35V For 3.0V (U)SIM: VOLmax=0.45V VOHmin=2.55V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. For 1.8V (U)SIM: Vmax=1.9V Vmin=1.7V USIM2_VDD 87 PO Power supply for (U)SIMcard For 3.0V (U)SIM: Vmax=3.05V Vmin=2.
LTE Module Series EG91 Hardware Design VOHmin=2.55V USIM2_ PRESENCE 83 DI (U)SIMcard insertion detection VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. I/O Description DC Characteristics Comment DO Ring indicator VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. DO Data carrier detection VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. Clear to send VOLmax=0.45V VOHmin=1.35V 1.8V power domain.
LTE Module Series EG91 Hardware Design open. DBG_RXD 22 DI Receive data VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V I/O Description DC Characteristics Comment PCM data input VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. PCM data output VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. PCM data frame synchronization signal VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain.
LTE Module Series EG91 Hardware Design ADC Interface Pin Name ADC0 Pin No. I/O Description DC Characteristics Comment AI General purpose analog to digital converter Voltage range: 0.3V to VBAT_BB If unused, keep it open. I/O Description DC Characteristics Comment DO Clock signal of SPI interface VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. DO Master output slave input of SPI interface VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open.
LTE Module Series EG91 Hardware Design AP_READY USB_BOOT 19 75 DI Application processor sleep state detection VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. DI Force the module to enter into emergency download mode VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. It is recommended to reserve the test points. I/O Description DC Characteristics Comment RESERVED Pins Pin Name NC RESERVED Pin No.
LTE Module Series EG91 Hardware Design Mode Airplane Mode AT+CFUN command or W_DISABLE# pin can set the module to enter intoairplane mode. In this case, RF function will be invalid. Sleep Mode In this mode, the current consumption of the module will be reduced to the minimal level. During this mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally. Power Down Mode In this mode, the power management unit shuts down the power supply.
LTE Module Series EG91 Hardware Design When EG91 has a URC to report, RI signal will wake up the host. Please refer to Chapter 3.17for details about RI behavior. AP_READY will detect the sleep state of host (can be configured to high level or low level detection). Please refer to AT+QCFG="apready"*commandfor details. NOTE “*” means under development. 3.5.1.2.
LTE Module Series EG91 Hardware Design Execute AT+QSCLK=1commandto enable sleep mode. Ensure the DTR is held at high level or keep it open. The host’s USB bus, which is connected with the module’s USB interface, enters into suspended state. The following figure shows the connection between the module and the host. Figure 5: Sleep Mode Application with RI Sending data to EG91through USB will wake up the module. When EG91has a URC to report, RI signal will wake up the host. 3.5.1.4.
LTE Module Series EG91 Hardware Design Figure 6: Sleep Mode Application without Suspend Function Switching onthe power switch tosupply power to USB_VBUS will wake up the module. NOTE Please pay attention to the level match shown in dotted line between the module and the host.Please refer to document [1] for more details about EG91 power management application. 3.5.2.
LTE Module Series EG91 Hardware Design The following table shows the details of VBAT pins and ground pins. Table 6: Pin Definition of VBAT and GND Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 52,53 Power supply for module’s RF part. 3.3 3.8 4.3 V VBAT_BB 32,33 Power supply for module’s baseband part. 3.3 3.8 4.3 V GND 3, 31, 48,50, 54, 55,58, 59, 61,62, 67~74, 79~82,89~91, 100~106 Ground - 0 - V 3.6.2.
LTE Module Series EG91 Hardware Design diode with low reverse stand-off voltage VRWM, low clamping voltage VC and high reverse peak pulse current IPP should be used. The following figure shows the star structure of the power supply. VBAT VBAT_RF VBAT_BB + + D1 C1 WS4.5D3HV 100uF C2 100nF C3 C4 33pF 10pF C5 100uF C6 C7 C8 100nF 33pF 10pF Module Figure 8: Star Structure of the Power Supply 3.6.3.
LTE Module Series EG91 Hardware Design 3.6.4. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.7. Power-on/off Scenarios 3.7.1. Turn on Module Using the PWRKEY The following table shows the pin definitionof PWRKEY. Table 7: Pin Definition of PWRKEY Pin Name PWRKEY Pin No. 15 Description DC Characteristics Comment Turn on/off the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The output voltage is 0.
LTE Module Series EG91 Hardware Design Figure 11: Turn on the Module Using Button The power-on scenario is illustrated in the following figure. NOTE VBAT ≥500ms V H =0.8V PWRKEY VIL≤0.5V About 100ms VDD_EXT BOOT_CONFIG & USB_BOOT Pins ≥100ms, after this time, the BOOT_CONFIG & U SB _BOOT pi n s can b e se t hi gh l eve l by external circuit. RESET_N ≥2.
LTE Module Series EG91 Hardware Design NOTES 1. 2. Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms. PWRKEY can be pulled down directly to GND with a recommended 10K resistor if module needs to be powered on automatically and shutdown is not needed. 3.7.2. Turn off Module Either of the following methodscan be used to turn off the module: Normal power-offprocedure: Turn off the module using the PWRKEY pin.
LTE Module Series EG91 Hardware Design NOTES 1. 2. In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, the power supply can be cut off. When turning off module with AT command, please keep PWRKEY at high level after the execution of power-off command. Otherwise the module will be turned on again after successful turn-off. 3.8.
LTE Module Series EG91 Hardware Design Figure 15: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated inthe following figure. Figure 16: Reset Scenario NOTES 1. 2. Use RESET_N only when turning off the module by AT+QPOWDcommand and PWRKEY pin failed. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.9. (U)SIM Interfaces EG91provides two (U)SIMinterfaces, and only one (U)SIMcard can work at a time.
LTE Module Series EG91 Hardware Design Table 9: Pin Definition of (U)SIM Interfaces Pin Name Pin No. I/O Description Comment Either 1.8V or 3.0V is supported by the module automatically.
LTE Module Series EG91 Hardware Design Figure 17: Reference Circuitof (U)SIMInterface with an 8-Pin (U)SIMCard Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. Areference circuit of (U)SIM interface with a 6-pin (U)SIMcard connector is illustrated inthe following figure.
LTE Module Series EG91 Hardware Design Assure the ground trace between the module and the (U)SIMcard connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1uF, and place it as close to (U)SIM card connector as possible.If the ground is complete on customers’ PCB, USIM_GND can be connected to PCB ground directly.
LTE Module Series EG91 Hardware Design The USB interface is recommended to be reserved for firmware upgrade in customers’ design. The following figure shows areference circuit of USB interface. Figure 19: Reference Circuit of USB Interface A common mode choke L1 is recommended to be added in series between the module and customer’sMCU in order to suppress EMI spurious transmission.
LTE Module Series EG91 Hardware Design 3.11. UART Interfaces The module provides two UART interfaces: the main UART interface and thedebug UART interface. The following shows their features. The main UART interface supports 9600bps, 19200bps, 38400bps, 57600bps, 115200bps, 230400bps, 460800bps, 921600bps and 3000000bps baud rates, and the default is 115200bps. It supports RTS and CTS hardware flow control, and is used for AT command communication only.
LTE Module Series EG91 Hardware Design Table 13:Logic Levels of Digital I/O Parameter Min. Max. Unit VIL -0.3 0.6 V VIH 1.2 2.0 V VOL 0 0.45 V VOH 1.35 1.8 V The module provides 1.8V UART interfaces. A level translator should be used if customers’ application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows areference design.
LTE Module Series EG91 Hardware Design Figure 21: Reference Circuit with Transistor Circuit NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 3.12.
LTE Module Series EG91 Hardware Design 125us PCM_CLK 1 2 255 256 PCM_SYNC MSB LSB MSB MSB LSB MSB PCM_DOUT PCM_DIN Figure 22: Primary Mode Timing Figure 23: Auxiliary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design.
LTE Module Series EG91 Hardware Design Table 14: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_DIN 6 DI PCM data input 1.8V power domain PCM_DOUT 7 DO PCM data output 1.8V power domain PCM_SYNC 5 IO PCM data frame synchronization signal 1.8V power domain PCM_CLK 4 IO PCM data bit clock 1.8V power domain I2C_SCL 40 OD I2C serial clock Require an external pull-up to 1.8V I2C_SDA 41 OD I2C serial data Require an external pull-up to 1.
LTE Module Series EG91 Hardware Design 3.13. SPI Interface SPI interface of EG91acts asthe master only. It provides a duplex, synchronous and serial communication link with the peripheral devices. It isdedicated to one-to-one connection, withoutchip select.Its operation voltage is 1.8V with clock rates up to 50MHz. The following table shows the pin definition of SPI interface. Table 15: Pin Definition of SPI Interface Pin Name Pin No.
LTE Module Series EG91 Hardware Design The following tables describe the pin definition and logic level changes of NETLIGHT in different network status. Table 16: Pin Definition of Network StatusIndicator Pin Name Pin No. I/O Description Comment NETLIGHT 21 DO Indicate the module’snetwork activity status 1.
LTE Module Series EG91 Hardware Design Table 18: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the module’soperatingstatus 1.8V power domain. If unused, keep it open. The following figure showsthe reference circuit of STATUS. Figure 27: Reference Circuit of STATUS 3.16. ADC Interface The module provides one analog-to-digital converter (ADC) interface. AT+QADC=0 command can beused to read the voltage value on ADC0 pin.
LTE Module Series EG91 Hardware Design Table 20: Characteristics of ADC Interface Parameter Min. ADC0 Voltage Range 0.3 Typ. ADC Resolution Max. Unit VBAT_BB V 15 bits NOTES 1. 2. It is prohibited to supply any voltage to ADC pins when VBAT is removed. It is recommended to use resistor divider circuit for ADC application. 3.17. Behaviors of RI AT+QCFG="risignaltype","physical"command can be used to configure RI behavior.The default RI behaviors can be changed by AT+QCFG="urc/ri/ring" command.
LTE Module Series EG91 Hardware Design 3.18. USB_BOOT Interface EG91provides a USB_BOOT pin. Customerscan pull up USB_BOOT to VDD_EXT before powering on the module, thus the module will enter into emergency download mode when powered on. In this mode, the module supports firmware upgrade over USB interface. Table 22: Pin Definition of USB_BOOT Interface Pin Name USB_BOOT Pin No. I/O 75 DI Description Comment Force the module to enter into emergency download mode 1.8V power domain. Active high.
LTE Module Series EG91 Hardware Design NOTE VBAT ≥500ms VH=0.8V PWRKEY VIL≤0.5V About 100ms VDD_EXT Setting USB_BOOT to high level between VBAT rising on and VDD_EXT rising on can let the module enter into emergency download mode. USB_BOOT RESET_N Figure 29: Timing Sequence for Entering into Emergency Download Mode NOTES 1. 2. Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms.
LTE Module Series EG91 Hardware Design 4 GNSS Receiver 4.1. General Description EG91 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). EG91 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface by default. By default, EG91 GNSS engine is switched off. It has to be switched on via AT command.
LTE Module Series EG91 Hardware Design Hot start @open sky Accuracy (GNSS) CEP-50 Autonomous 1.8 s XTRA enabled 3.4 s Autonomous @open sky <2.5 m NOTES 1. 2. 3. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock.
LTE Module Series EG91 Hardware Design 5 Antenna Interfaces EG91 antenna interfaces include a main antenna interface and anRx-diversity antennainterface which is used toresist the fall of signals caused by high speed movement and multipath effect, and a GNSS antenna interface which is only supported on EG91-NA/-NS/-V/-EC. The impedance of the antenna port is50Ω. 5.1. Main/Rx-diversityAntenna Interfaces 5.1.1.
LTE Module Series EG91 Hardware Design WCDMA B4 1710~1755 2110~2155 MHz WCDMA B5 824~849 869~894 MHz WCDMA B8 880~915 925~960 MHz LTE-FDD B1 1920~1980 2110~2170 MHz LTE FDD B2 1850~1910 1930~1990 MHz LTE-FDD B3 1710~1785 1805~1880 MHz LTE FDD B4 1710~1755 2110~2155 MHz LTE FDD B5 824~849 869~894 MHz LTE-FDD B7 2500~2570 2620~2690 MHz LTE-FDD B8 880~915 925~960 MHz LTE FDD B12 699~716 729~746 MHz LTE FDD B13 777~787 746~756 MHz LTE-FDD B20 832~862 791~821 M
LTE Module Series EG91 Hardware Design Figure 30: Reference Circuit of RF Antenna Interface NOTES 1. Keep a proper distance between the main antenna and theRx-diversityantenna to improve the receiving sensitivity. 2. ANT_DIV function is enabledby default.AT+QCFG="diversity",0command can be used to disable receive diversity. Place the π-type matching components (R1/C1/C2, R2/C3/C4) as close to the antenna as possible. 3. 5.1.4.
LTE Module Series EG91 Hardware Design Figure 31: Microstrip Line Design on a 2-layer PCB Figure 32: Coplanar Waveguide Design on a 2-layer PCB Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) EG91_Hardware_Design 62 / 93
LTE Module Series EG91 Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: Use impedance simulation tool to control the characteristic impedanceof RF tracesas 50Ω. The GND pins adjacent to RF pins should not bedesigned as thermal relief pads, and should be fully connected to ground.
LTE Module Series EG91 Hardware Design Figure 35: Reference Circuit of GNSS Antenna NOTES 1. 2. An external LDO can be selected to supply power according to the active antenna requirement. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1. Antenna Requirement The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna.
LTE Module Series EG91 Hardware Design (EGSM900,WCDMA B5/B8, LTE B5/B8/B12/B13/B20/B26/B28) Cable Insertion Loss: <1.5dB (DCS1800, WCDMA B1/B2/B4, LTE B1/B2/B3/B4/B25) Cable insertion loss: <2dB (LTE B7) NOTE 1) It is recommended to use a passive GNSS antenna when LTE B13 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance. 5.3.2.
LTE Module Series EG91 Hardware Design Figure 37:Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 38:Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
LTE Module Series EG91 Hardware Design 6 Electrical, Reliability and RadioCharacteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 29: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB 0 0.8 A Peak Current of VBAT_RF 0 1.8 A Voltage at Digital Pins -0.3 2.3 V 6.2.
LTE Module Series EG91 Hardware Design Voltage drop during burst transmission Maximum power control level on EGSM900 IVBAT Peak supply current (during transmissionslot) Maximum power control level on EGSM900 USB_VBUS USB connectiondetection 3.0 400 mV 1.8 2.0 A 5.0 5.25 V 6.3. Operation and Storage Temperatures The operation and storage temperaturesare listed in the following table. Table 31: Operation and Storage Temperatures Parameter Min. Typ. Max.
LTE Module Series EG91 Hardware Design 6.4. Current Consumption The values of current consumption are shown below. Table 32: EG91-E Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 13 uA AT+CFUN=0 (USB disconnected) 1.1 mA GSM DRX=2 (USB disconnected) 2.0 mA GSM DRX=5 (USB suspended) 1.9 mA GSM DRX=9 (USB disconnected) 1.3 mA WCDMA PF=64 (USB disconnected) 1.7 mA WCDMA PF=64 (USB suspended) 2.1 mA WCDMA PF=512 (USB disconnected) 1.
LTE Module Series EG91 Hardware Design EDGE data transfer WCDMA datatransfer EGSM900 1DL/4UL @29.26dBm 619 mA DCS1800 4DL/1UL @29.2dBm 165 mA DCS1800 3DL/2UL @29.13dBm 267 mA DCS1800 2DL/3UL @29.01dBm 406 mA DCS1800 1DL/4UL @28.86dBm 467 mA EGSM900 4DL/1UL PCL=8 @27.1dBm 163 mA EGSM900 3DL/2UL PCL=8 @27.16dBm 274 mA EGSM900 2DL/3UL PCL=8 @26.91dBm 383 mA EGSM900 1DL/4UL PCL=8 @26.12dBm 463 mA DCS1800 4DL/1UL PCL=2 @25.54dBm 136 mA DCS1800 3DL/2UL PCL=2 @25.
LTE Module Series EG91 Hardware Design WCDMA voice call WCDMA B1 CH10700 @23.06dBm 555 mA WCDMA B8 CH3012 @23.45dBm 535 mA Table 33: EG91-NA Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 13 uA AT+CFUN=0 (USB disconnected) 1.0 mA WCDMA PF=64 (USB disconnected) 2.2 mA WCDMA PF=64 (USB suspended) 2.5 mA WCDMA PF=512 (USB disconnected) 1.4 mA LTE-FDD PF=64 (USB disconnected) 2.6 mA LTE-FDD PF=64 (USB suspended) 2.
LTE Module Series EG91 Hardware Design WCDMA voice call LTE-FDD B5 CH2525@23.39dBm 601 mA LTE-FDD B12 CH5060@23.16 dBm 650 mA LTE-FDD B13 CH5230 @23.36 dBm 602 mA WCDMA B2 CH9938 @23.34 dBm 627 mA WCDMA B4 CH1537@23.47 dBm 591 mA WCDMA B5 CH4357@23.37 dBm 536 mA Table 34: EG91-NS Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 8 uA AT+CFUN=0 (USB disconnected) 1.2 mA WCDMA PF=64 (USB disconnected) 2 mA WCDMA PF=64 (USB suspended) 2.
LTE Module Series EG91 Hardware Design LTE datatransfer WCDMA voice call WCDMA B5 HSDPA CH4407@23.05 dBm 553 mA WCDMA B5 HSUPACH4407 @22.91 dBm 556 mA LTE-FDD B2 CH1100@23.26 dBm 724 mA LTE-FDD B4 CH2175@23.52 dBm 693 mA LTE-FDD B5 CH2525@23.51dBm 613 mA LTE-FDD B12 CH5060@23.39 dBm 634 mA LTE-FDD B13 CH5230 @23.54 dBm 576 mA LTE-FDD B25CH8590@23.64 dBm 739 mA LTE-FDD B26CH8765@23.34 dBm 647 mA WCDMA B2 CH9938 @23.39 dBm 571 mA WCDMA B4 CH1738@23.
LTE Module Series EG91 Hardware Design Table 36: EG91-EC Current Consumption Parameter Description OFF state Conditions Typ.
LTE Module Series EG91 Hardware Design EDGE data transfer WCDMA datatransfer LTE datatransfer GSM voice call WCDMA voice call EG91_Hardware_Design DCS1800 2DL/3UL @TBDdBm TBD mA DCS1800 1DL/4UL @TBDdBm TBD mA EGSM900 4DL/1UL PCL=8 @TBDdBm TBD mA EGSM900 3DL/2UL PCL=8 @TBDdBm TBD mA EGSM900 2DL/3UL PCL=8 @TBDdBm TBD mA EGSM900 1DL/4UL PCL=8 @TBDdBm TBD mA DCS1800 4DL/1UL PCL=2 @TBDdBm TBD mA DCS1800 3DL/2UL PCL=2 @TBDdBm TBD mA DCS1800 2DL/3UL PCL=2 @TBDdBm TBD mA DCS1800 1D
LTE Module Series EG91 Hardware Design Table 37: GNSS Current Consumption of EG91 Parameter Description Searching IVBAT (GNSS) (AT+CFUN=0) Tracking (AT+CFUN=0) Conditions Typ. Unit Cold start @Passive Antenna 54 mA Hot Start @Passive Antenna 54 mA Lost state @Passive Antenna 53 mA Open Sky @Passive Antenna 32 mA 6.5. RF Output Power The following table shows the RF output power of EG91 module. Table 38: RF Output Power Frequency Max. Min.
LTE Module Series EG91 Hardware Design 6.6. RF Receiving Sensitivity The following tables show the conducted RF receiving sensitivity of EG91 module. Table 39: EG91-E Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP EGSM900 -108.6dBm NA NA -102dBm DCS1800 -109.4 dBm NA NA -102dbm WCDMA B1 -109.5dBm -110dBm -112.5dBm -106.7dBm WCDMA B8 -109.5dBm -110dBm -112.5dBm -103.7dBm LTE-FDD B1(10M) -97.5dBm -98.3dBm -101.4dBm -96.3dBm LTE-FDD B3(10M) -98.
LTE Module Series EG91 Hardware Design LTE-FDD B13 (10M) -99.2dBm -100dBm -102.5dBm -93.3dBm Table 41: EG91-NS Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP WCDMA B2 -110dBm -111dBm -112.5dBm -104.7dBm WCDMA B4 -110dBm -111dBm -112.5dBm -106.7dBm WCDMA B5 -111dBm -111.5dBm -113dBm -104.7dBm LTE-FDD B2 (10M) -98dBm -99dBm -102.2dBm -94.3dBm LTE-FDD B4 (10M) -97.8dBm -99.5dBm -102.2dBm -96.3dBm LTE-FDD B5 (10M) -99.4dBm -100dBm -102.7dBm -94.
LTE Module Series EG91 Hardware Design WCDMA B8 TBD TBD TBD -103.7dBm LTE-FDD B1 (10M) TBD TBD TBD -96.3dBm LTE-FDD B3 (10M) TBD TBD TBD -93.3dBm LTE-FDD B7 (10M) TBD TBD TBD -94.3dBm LTE-FDD B8 (10M) TBD TBD TBD -93.3dBm LTE-FDD B20 (10M) TBD TBD TBD -93.3dBm LTE-FDD B28 (10M) TBD TBD TBD -94.8dBm 6.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general.
LTE Module Series EG91 Hardware Design Do not place components on the opposite side of the PCB area where the module is mounted, in order to facilitate adding of heatsink when necessary. Do not apply solder mask on the opposite side of the PCB area where the module is mounted, so as to ensure better heat dissipation performance. The reference ground of the area where the module is mounted should be complete, and add ground vias as many as possible for better heat dissipation.
LTE Module Series EG91 Hardware Design Thermal Pad EG91 Module Thermal Pad Heatsink Heatsink Application Board Shielding Cover Application Board Figure 40: Referenced Heatsink Design (Heatsink at the Backsideof Customers’ PCB) NOTES 1. 2. The module offers the best performance when the internal BB chip stays below 105°C. When the maximum temperature of the BB chip reaches or exceeds 105°C, the module works normal but provides reduced performance (such as RF output power, data rate, etc.).
LTE Module Series EG91 Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module.All dimensions are measured in mm. The tolerances for dimensions without tolerance values are ±0.05mm. 7.1. Mechanical Dimensions of the Module 25±0.15 29±0.15 2.30±0.
LTE Mod dule Series s EG G91 Hardw ware Design n Figure 4 42: Module Bottom B Dim mensions (T TopView) EG91_Hard dware_Desiign 83 / 93
LTE Mod dule Series s EG G91 Hardw ware Design n 7.2. Recomm mended Footprin nt Figure 43: Recommended Fo ootprint (To op View) NOTE For easyma aintenance of o the module, please ke eep about 3m mm between n the module e and other componentss in thehost PCB.
LTE Mod dule Series s EG G91 Hardw ware Design n 7.3. Design Effect Drrawings of the M Module F Figure 44: Top T View off the Module Fig gure 45: Bo ottom View of the Module NOTE These are design effe ect drawingss of EG91 module. m For more acccurate picturres, please refer to the e module thatt you get from Quectel.
LTE Module Series EG91 Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage EG91is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are listed below. 1. Shelf life in vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be: Mounted within 168 hours at the factory environment of ≤30ºC/60%RH. Stored at <10% RH. 3.
LTE Module Series EG91 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properlyso as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, thethickness of stencil for the module is recommended to be 0.15mm~0.18mm. For more details, please refer todocument [4].
LTE Module Series EG91 Hardware Design Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 240°C ~ 245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle 1 8.3. Packaging EG91is packaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until the devices are ready to be soldered onto the application. The reel is 330mm in diameter and each reel contains 250pcs modules.
LTE Module Series EG91 Hardware Design e p a t r e v o C 48.5 13 100 d e e f f o n o i t c e r i D 44.5+0.20 -0.
LTE Module Series EG91 Hardware Design 9 Appendix A References Table 46: Related Documents SN Document Name Remark [1] Quectel_EC2x&EG9x&EM05_Power_Management_A pplication_Note Power Management Application Note for EC25, EC21, EC20 R2.0, EC20 R2.
LTE Module Series EG91 Hardware Design DFOTA Delta Firmware Upgrade Over-The-Air DL Downlink DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate ESD Electrostatic Discharge FDD Frequency Division Duplex FR Full Rate GMSK Gaussian Minimum Shift Keying GSM Global System for Mobile Communications HR Half Rate HSPA High Speed Packet Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access I/O Input/Output Inorm Normal Current
LTE Module Series EG91 Hardware Design PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized Rx Receive SMS Short Message Service TDD Time Division Duplexing TX Transmitting Direction UL Uplink UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code (U)SIM (Universal) Subscriber Identity Module Vmax Maximum V
LTE Module Series EG91 Hardware Design VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access EG91_Hardware_Design 93 / 93
LTE Module Series EG91 Hardware Design 10 Appendix B GPRS Coding Schemes Table 48: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
LTE Module Series EG91 Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
LTE Module Series EG91 Hardware Design 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 EG91_Hardware_Design 96 / 93
LTE Module Series EG91 Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 50: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.8kbps MCS-3 GMSK A 14.
