BG G96 6Ha ardw warre Des sign LTEM Module Series S Rev. BG96_Ha ardware_ _Design_ _V1.4 3-13 Date: 2019-03 Status: Releassed www.quec ctel.
LTE Module Series BG96 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email:info@quectel.com Or our local office. For more information, please visit: http://quectel.com/support/sales.
LTE Module Series BG96 Hardware Design About the Document History Revision Date Author Description Lyndon LIU/ 1.0 1.1 1.2 2017-08-04 2017-08-31 2017-12-22 Daryl DU Daryl DU 1. 2. 3. 4. Lyndon LIU/ Daryl DU 1. Added the storage temperature of the module in Table 2 and Chapter 6.3. 2. Updated transmitting power values in Table 2. 3. Added the description of sleep mode in Table 5 and Chapter 3.4.4. 4. Added the description of ADC interfaces in Chapter 3.16. 5.
LTE Module Series BG96 Hardware Design 6. Updated GNSS current consumption parameters in Table 35. 7. Updated the module’s baking temperatureand baking hours in Chapter 8.1. Lyndon LIU/ 1.4 2019-03-13 BG96_Hardware_Design Rex WANG 3 / 81 1. Updated the general description in Chapter 2.1. 2. Updated and added the BG96-M module in Table 1. 3. Updated the internal protocol features and USB interface in Table 2. 4. Updated the functional diagram in Figure 1. 5.
LTE Module Series BG96 Hardware Design Contents About the Document ................................................................................................................................ 2 Contents .................................................................................................................................................... 4 Table Index .............................................................................................................................................
LTE Module Series BG96 Hardware Design 3.14. 3.15. 3.16. 3.17. Behaviors of RI ....................................................................................................................... 52 USB_BOOT Interface ............................................................................................................. 53 ADC Interfaces ....................................................................................................................... 54 GPIOInterfaces .......................
LTE Module Series BG96 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF BG96 MODULE ...................................................................................... 14 TABLE 2: KEY FEATURES OF BG96 MODULE............................................................................................... 15 TABLE 3: DEFINITION OF I/O PARAMETERS................................................................................................. 23 TABLE 4: PIN DESCRIPTION ................................
LTE Module Series BG96 Hardware Design TABLE 42: TERMS AND ABBREVIATIONS ...................................................................................................... 88 TABLE 43: DESCRIPTION OF DIFFERENT CODING SCHEMES .................................................................. 91 TABLE 44: GPRS MULTI-SLOT CLASSES ...................................................................................................... 92 TABLE 45: EDGE MODULATION AND CODING SCHEMES ...........................
LTE Module Series BG96 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 18 FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 22 FIGURE 3: SLEEP MODE APPLICATION VIA UART .......................................................................................
LTE Module Series BG96 Hardware Design 1 Introduction This document defines BG96module and describes its air interface and hardware interfaces which are connected with customers’ applications. This document can help customers quickly understand the interface specifications, electrical and mechanical details, as well as other related information of BG96.To facilitate its application in different fields, reference design is also provided for customers’ reference.
LTE Module Series BG96 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating BG96. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
LTE Module Series BG96 Hardware Design In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices such as your phone or other cellular terminals. Areas with potentially explosive atmospheres include fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles such as grain, dust or metal powders, etc.
LTE Module Series BG96 Hardware Design 1.2. FCC/ISED Regulatory notices Modification statement Quectel has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user’s authority to operate the equipment. Quectel n’approuve aucune modification apportée à l’appareil par l’utilisateur, quelle qu’en soit la nature. Tout changement ou modification peuvent annuler le droit d’utilisation de l’appareil par l’utilisateur.
LTE Module Series BG96 Hardware Design ❒ LTE Band5:≤7.1dBi ❒ LTE Band12:≤6.61dBi ❒ LTE Band13:≤6.93dBi ❒ L TE Band25:≤8.0dBi L'émetteur ne doit pas être colocalisé ni fonctionner conjointement avec à autre antenne ou autre émetteur. FCC Class B digital device notice This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules.
LTE Module Series BG96 Hardware Design 2 Product Concept 2.1. General Description BG96isa series ofembeddedIoT(LTE Cat.M1/LTE Cat.NB1/EGPRS) wireless communication module.It provides data connectivity on LTE-TDD/LTE-FDD/GPRS/EGPRSnetworks, and supports half-duplex operation in LTE networks. It also provides GNSS1)and voice2)functionalityto meet customers’specific application demands.BG96 contains two variants: BG96 and BG96-M. Customers can choose a dedicated type based on the region or operator.
LTE Module Series BG96 Hardware Design 1. 2. 3. 4. 5. 1) GNSS function is optional. BG96 supports VoLTE(Voice over LTE) under LTECat M1 network. 3) BG96 GSM only supports Packet Switch. 4) B25 will be supported on BG96 modules with R1.2 hardware version. 5) B26 is under development. 2) With a compact profile of 26.5mm ×22.5mm ×2.3mm, BG96 can meet almost all requirements forM2M applications such as smart metering, tracking system, security, wireless POS, etc.
LTE Module Series BG96 Hardware Design Cat M1: Max. 375Kbps (DL)/375Kbps (UL) Cat NB1: Max. 32Kbps (DL)/70Kbps (UL) GPRS: Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max. 107Kbps (DL), Max. 85.6Kbps (UL) GSMFeatures EDGE: Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 Max. 296Kbps (DL), Max. 236.
LTE Module Series BG96 Hardware Design Network Indication OneNETLIGHT pin for network connectivity status indication Antenna Interfaces Including main antenna (ANT_MAIN) and GNSS antenna (ANT_GNSS) interfaces Physical Characteristics Size: (26.5±0.15)mm×(22.5±0.15)mm ×(2.3±0.2)mm Weight: approx. 3.
LTE Module Series BG96 Hardware Design ANT_GNSS ANT_MAIN SAW LNA PA (2G+ASM) PA (4G) VBAT_RF Tx GNSS Rx NAND DDR2 SDRAM Transceiver VBAT_BB PWRKEY IQ PMIC Control Control RESET_N Baseband STATUS NETLIGHT ADCs 19.2M XO VDD_EXT USB (U)SIM PCM* UARTs I2C* GPIOs Figure 1: Functional Diagram NOTE “*” means under development. 2.4.
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LTE Module Series BG96 Hardware Design 3 Application Interfaces BG96is equipped with 102 LGA pads that can be connected to customers’ cellular application platforms. The following sub-chapters will provide detailed description of interfaces listed below: Power supply (U)SIMinterface USB interface UART interfaces PCM* and I2C* interfaces Status indication USB_BOOT interface ADC interfaces GPIO interfaces NOTE “*” means under development.
LTE Module Series BG96 Hardware Design 3.1. Pin Assignment The following figure showsthe pin assignment of BG96.
9 USB_DM 10 ANT_MAIN GND GND RESERVED RESERVED GND GND VBAT_RF VBAT_RF RESERVED GND GND 50 USB_DP 51 8 52 7 53 PCM_OUT* USB_VBUS 54 6 55 PCM_IN* 56 5 57 4 58 PCM_CLK* PCM_SYNC* 59 3 60 2 GND 61 1 ADC1 62 PSM_IND GND LTE Module Series BG96 Hardware Design 49 82 80 81 102 79 100 101 99 63 83 98 78 GPIO64 64 84 97 77 65 85 96 76 66 86 95 75 USB_BOOT 67 87 94 74 68 88 93 73 48 GND 47 USIM_GND 46 USIM_CLK 45 USIM_DATA 44 USIM_R
LTE Module Series BG96 Hardware Design 3. 4. 1) PWRKEY output voltage is 0.8V because of the diode drop in the Qualcomm chipset. “*” means under development. 3.2. Pin Description The following tables show the pin definition and description of BG96.
LTE Module Series BG96 Hardware Design module’s RF part VDD_EXT 29 GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~102 PO Provide 1.8V for external circuit Vnorm=3.8V Vnorm=1.8V IOmax=50mA Power supply for external GPIO’s pull-up circuits. DC Characteristics Comment Ground Turn on/off Pin Name PWRKEY RESET_N Pin No. I/O Description DI Turnon/off the module Vnorm=0.8V VILmax=0.5V The output voltage is0.8V because of thediode drop in theQualcomm chipset.
LTE Module Series BG96 Hardware Design USB_DM Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. 10 IO USB differential data bus (-) Pin No. I/O Description DC Characteristics Comment DI (U)SIM card insertion detection VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep this pin open. (U)SIM Interface Pin Name USIM_ PRESENCE 42 For 1.8V(U)SIM: Vmax=1.9V Vmin=1.
LTE Module Series BG96 Hardware Design USIM_GND Specified ground for (U)SIM card 47 UART1 Interface Pin Name DTR RXD TXD CTS RTS DCD RI Pin No. 30 34 35 36 37 38 39 I/O Description DC Characteristics Comment DI Data terminal ready(sleepmo de control) VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep this pin open. Receive data VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep this pin open.
LTE Module Series BG96 Hardware Design Pin Name UART3_TXD UART3_RXD Pin No. 27 I/O DO Description DC Characteristics Comment Transmit data VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep this pin open. 1.8V power domain. If unused, keep this pin open. 28 DI Receive data VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Pin No. I/O Description DC Characteristics Comment DO PCMclock output VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep this pin open.
LTE Module Series BG96 Hardware Design Antenna Interfaces Pin Name Pin No. I/O Description DC Characteristics ANT_MAIN 60 IO Main antenna interface 50Ωimpedance ANT_GNSS 49 AI GNSS antenna interface 50Ωimpedance If unused, keep this pin open. Pin No. I/O Description DC Characteristics Comment DO Power saving mode indicator VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep this pin open. 1.8V power domain. Pull-up by default.
LTE Module Series BG96 Hardware Design ADC Interfaces Pin Name ADC1 ADC0 Pin No. 2 24 I/O Description DC Characteristics Comment AI General purpose analog to digital converter interface Voltage range: 0.3V to 1.8V If unused, keep this pin open. AI General purpose analog to digital converter interface Voltage range: 0.3V to 1.8V If unused, keep this pin open. I/O Description DC Characteristics Comment RESERVED Pins Pin Name Pin No.
LTE Module Series BG96 Hardware Design 3.3. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Normal Operation Details Talk/Data Network connection is ongoing. In this mode, the power consumption is decided by network settingand data transfer rate. Idle Software is active. The module hasregistered onnetwork, and it is ready to send and receive data.
LTE Module Series BG96 Hardware Design During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB interface will increase power consumption. 3.4. Power Saving 3.4.1. Airplane Mode When the module enters into airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible. This mode can be set via the following ways. Hardware: W_DISABLE# is pulled up by default.
LTE Module Series BG96 Hardware Design mode is similar to power-off, but the module remains registered on the network and there is no need to re-attach or re-establish PDN connections.So BG96 in PSM cannot immediately respond users’ requests. When the module wants to use the PSM it shall request an Active Time value during every Attach and TAU procedures. If the network supports PSM and accepts that the module uses PSM, the network confirms usage of PSM by allocating an Active Time value to the module.
LTE Module Series BG96 Hardware Design within a certain delay dependent on the DRX cycle value. Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or data transfers, and in particular they need to consider the delay tolerance of mobile terminated data. In order to negotiate the use of e-I-DRX, the UE requests e-I-DRXparameters during attach procedure and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX.
LTE Module Series BG96 Hardware Design Please refer to document [2] for details about AT+CEDRXScommand. 3.4.4. Sleep Mode BG96 is able to reduce its current consumption to a lower value during the sleep mode. The following sub-chapters describe the power saving procedure of BG96 module. 3.4.4.1. UART Application If the host communicates with module via UART interface, the following preconditions can let the module enter into sleep mode. Execute AT+QSCLK=1command to enable sleep mode.
LTE Module Series BG96 Hardware Design 3.5. Power Supply 3.5.1. Power Supply Pins BG96 provides the following four VBAT pins for connection with anexternal power supply. There are two separate voltage domains for VBAT. Two VBAT_RF pins for module’sRF part. Two VBAT_BB pins for module’s baseband part. The following table shows the details of VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max.
LTE Module Series BG96 Hardware Design Figure 4: Power Supply Limits during Burst Transmission To decrease voltage drop, a bypass capacitor of about 100µF with low ESRshould be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR.It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT pins.
LTE Module Series BG96 Hardware Design VBAT VBAT_RF VBAT_BB + + D1 TVS C1 100uF C2 C3 C5 C4 100nF 33pF 10pF C6 100uF C7 C8 100nF 33pF 10pF Module Figure 5: Star Structure of the Power Supply 3.5.3. Monitor the Power Supply AT+CBC command can be usedto monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.6. Turn on and off Scenarios 3.6.1. Turn on Module Using the PWRKEY Pin The following table shows the pin definition of PWRKEY.
LTE Module Series BG96 Hardware Design use an open drain/collector driver to control the PWRKEY.After STATUS pin outputting a high level, PWRKEY pin can be released. A simple reference circuit is illustrated in the following figure. PWRKEY ≥500ms 4.7K 10nF Turn on pulse 47K Figure 6: Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger.
LTE Module Series BG96 Hardware Design NOTE VBA T ≥500ms PWRKEY VIL≤0.5V RESET_N ≥ 4.8s STATUS (DO) ≥ 4.2s USB Inactive Active ≥ 4.9s URA T Inactive Active Figure 8: Timing of Turning on Module NOTE 1. Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms. 2. Customers should expect to see ~0.8V on the PWRKEY pin, because of there is pulled up to an internal voltage minus a diode drop in the Qualcomm chipset. 3.6.2.
LTE Module Series BG96 Hardware Design Figure 9: Timing of Turning off Module 3.6.2.2. Turn off Module Using AT Command It is also a safe way to use AT+QPOWDcommandto turn off the module, which is similar to turning off the module via PWRKEY pin. Please refer todocument [2] for details about AT+QPOWDcommand. 3.7. Reset the Module The RESET_N pin can be used to reset the module.The module can be reset by driving RESET_N to a low level voltage for time between 150ms and 460ms.
LTE Module Series BG96 Hardware Design Figure 10: Reference Circuit of RESET_N by Using Driving Circuit Figure 11: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated inthe following figure.
LTE Module Series BG96 Hardware Design Figure 12: Timing of Resetting Module NOTES 1. Use RESET_N only when turning off the module by AT+QPOWDcommand and PWRKEY pin both failed. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.8. (U)SIM Interface The(U)SIM interface circuitrymeets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards are supported. Table 9: Pin Definition of (U)SIM Interface Pin Name Pin No.
LTE Module Series BG96 Hardware Design BG96 supports (U)SIM card hot-plug via the USIM_PRESENCEpin. The function supports low level and high level detections, andisdisabled by default. Please refer to document [2] about AT+QSIMDETcommand for details. The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM cardconnector.
LTE Module Series BG96 Hardware Design Figure 14: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design: Keep placement of (U)SIM card connector as close to the module as possible. Keep the trace length as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces.
LTE Module Series BG96 Hardware Design 3.9. USB Interface BG96 contains one integrated Universal Serial Bus (USB) interfacewhich complies with the USB 2.0 specification and supports high-speed (480Mbps) and full-speed (12Mbps)modes. The USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. The following table shows the pin definition of USB interface. Table 10: Pin Definitionof USB Interface Pin Name Pin No.
LTE Module Series BG96 Hardware Design added in series between the module and the test points so as to facilitate debugging, and the resistors are not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components must be placed close to the module, and also these resistors should be placed close to each other. The extra stubs of trace must be as short as possible. The following principles should be complied with when design the USB interface, so as to meet USB 2.
LTE Module Series BG96 Hardware Design Table 11: Pin Definition of UART1Interface Pin Name Pin No. I/O Description Comment DTR 30 DI Data terminal ready. Sleepmode control 1.8V power domain RXD 34 DI Receive data 1.8V power domain TXD 35 DO Transmit data 1.8V power domain CTS 36 DO Clear to send 1.8V power domain RTS 37 DI Request to send 1.8V power domain DCD 38 DO Data carrier detection 1.8V power domain RI 39 DO Ring indicator 1.
LTE Module Series BG96 Hardware Design Table 14:Logic Levels of Digital I/O Parameter Min. Max. Unit VIL -0.3 0.6 V VIH 1.2 2.0 V VOL 0 0.45 V VOH 1.35 1.8 V The module provides 1.8V UART interface. A level translator should be used if customers’application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instrumentsis recommended. The following figure shows a reference design.
LTE Module Series BG96 Hardware Design terms of both module input and output circuit designs, but please pay attention to the direction of connection. Figure 17: Reference Circuit with Transistor Circuit NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 3.11. PCM* and I2C* Interfaces BG96 provides one Pulse Code Modulation (PCM)digital interface and one I2C interface.
LTE Module Series BG96 Hardware Design PCM_IN* 6 DI PCM data input 1.8V power domain PCM_OUT* 7 DO PCM dataoutput 1.8V power domain I2C_SCL* 40 OD I2C serial clock Require external pull-up to 1.8V I2C_SDA* 41 OD I2C serial data Require external pull-up to 1.8V The following figure shows a reference design of PCM and I2Cinterfaces with an external codec IC. Figure 18: Reference Circuit of PCM Application with Audio Codec NOTE “*” means under development. 3.12.
LTE Module Series BG96 Hardware Design Table 16: Pin Definition of NETLIGHT Pin Name Pin No. I/O Description Comment NETLIGHT 21 DO Indicate the module’snetwork activity status 1.
LTE Module Series BG96 Hardware Design 3.13. STATUS The STATUS pin is used to indicate the operation status of BG96 module. It will output high level when the module is poweredon. The following table describes the pin definition of STATUS. Table 18: Pin Definition of STATUS Pin Name Pin No. STATUS 20 I/O DO Description Indicate Comment the module’s operation status 1.8V power domain The following figure shows a reference circuit of STATUS. Figure 20: Reference Circuit of STATUS 3.14.
LTE Module Series BG96 Hardware Design No matter on which port URC is presented, URC will trigger the behavior of RI pin. NOTE URC can be outputted from UART port, USB AT port and USB modem port, through configuration viaAT+QURCCFGcommand. The default port is USB AT port. The default behaviors of RI areshown as below. Table 19:Default Behaviors of RI State Response Idle RI keeps in high level. URC RI outputs 120ms low pulse when new URC returns.
LTE Module Series BG96 Hardware Design Table 20: Pin Definition of USB_BOOT Interface Pin Name Pin No. I/O Description Comment 1.8V power domain. USB_BOOT 75 DI Force the module to enter into emergency download mode Active high. If unused, keep it open. The following figure shows a reference circuit of USB_BOOT interface. Figure 21: Reference Circuit of USB_BOOT Interface NOTE It is recommended to reserve the above circuit design during application design. 3.16.
LTE Module Series BG96 Hardware Design Table 21: Pin Definition of ADCInterfaces Pin Name Pin No. Description ADC0 24 General purpose analog to digital converter interface ADC1 2 General purpose analog to digital converter interface The following table describes the characteristics of ADC interfaces. Table 22: Characteristics of ADC Interfaces Parameter Min. ADC0 Voltage Range ADC1 Voltage Range Typ. Max. Unit 0.3 1.8 V 0.3 1.
LTE Module Series BG96 Hardware Design Table 23: Pin Definition of GPIOInterfaces Pin Name Pin No. Description GPIO26 26 General purpose input and output interface GPIO64 64 General purpose input and output interface The following table describes the characteristics of GPIOinterfaces. Table 24:Logic Levels of GPIO interfaces Parameter Min. Max. Unit VIL -0.3 0.6 V VIH 1.2 2.0 V VOL 0 0.45 V VOH 1.35 1.8 V NOTE “*” means under development.
LTE Module Series BG96 Hardware Design 4 GNSS Receiver 4.1. General Description BG96 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou/Compass, Galileo and QZSS). BG96 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USBinterface by default. By default, BG96 GNSS engine is switched off. It has to be switched on via AT command.
LTE Module Series BG96 Hardware Design Tracking Cold start @open sky TTFF (GNSS) Warm start @open sky Hot start @open sky Accuracy (GNSS) CEP-50 Autonomous -157 dBm Autonomous 31 s XTRA enabled 11.54 s Autonomous 21 s XTRA enabled 2.52 s Autonomous 2.7 s XTRA enabled 1.82 s Autonomous @open sky < 2.5 m NOTES 1. 2. 3. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes.
LTE Module Series BG96 Hardware Design 5 Antenna Interfaces BG96 includes a main antenna interface andaGNSS antennainterface. The antenna portshave an impedance of 50Ω. 5.1. MainAntenna Interface 5.1.1. Pin Definition The pin definition of main antenna interface is shown below. Table 26: Pin Definition of Main Antenna Interface Pin Name Pin No. I/O Description Comment ANT_MAIN 60 IO Main antennainterface 50Ωcharacteristicimpedance 5.1.2.
LTE Module Series BG96 Hardware Design LTE-FDD 824~849 869~894 MHz 880~915 925~960 MHz LTE-FDD B12 699~716 729~746 MHz LTE-FDD B13 777~787 746~756 MHz LTE-FDD B18 815~830 860~875 MHz LTE-FDD B19 830~845 875~890 MHz LTE-FDD B20 832~862 791~821 MHz LTE-FDD B25 1850~1915 1930~1995 MHz LTE-FDD B26 814~849 859~894 MHz LTE-FDD B28 703~748 758~803 MHz LTE-TDD B39 1880~1920 1880~1920 MHz B5,GSM850 LTE-FDD B8,EGSM900 Table 28: BG96-M Operating Frequency 3GPP Band Transmit
LTE Module Series BG96 Hardware Design LTE-FDD B13 777~787 746~756 MHz LTE-FDD B18 815~830 860~875 MHz LTE-FDD B19 830~845 875~890 MHz LTE-FDD B20 832~862 791~821 MHz LTE-FDD B25 1850~1915 1930~1995 MHz LTE-FDD B26 814~849 859~894 MHz LTE-FDD B28 703~748 758~803 MHz LTE-TDD B39 1880~1920 1880~1920 MHz 5.1.3. Reference Design of RF Antenna Interface Areference design of mainantenna padis shown as below.
LTE Module Series BG96 Hardware Design the trace width (W), the materials’ dielectric constant, the distance between signal layer and reference ground (H), and the clearance between RF trace and ground(S). Microstrip line or coplanar waveguide line is typically used in RF layout for characteristic impedance control. The following are reference designs of microstrip line or coplanar waveguide linewithdifferent PCB structures.
LTE Module Series BG96 Hardware Design Figure 25: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 26: Coplanar Waveguide Line Designon a4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: Use impedance simulation tool to control the characteristic impedanceof RF tracesas 50Ω.
LTE Module Series BG96 Hardware Design theground viasand RF traces should be no less than two times the width of RF signal traces (2*W). For more details about RF layout, please refer to document [4]. 5.2. GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNSS antenna interface. Table 28: Pin Definition of GNSS Antenna Interface Pin Name Pin No.
LTE Module Series BG96 Hardware Design Figure 27: Reference Circuit of GNSS Antenna Interface NOTES 1. 2. An external LDO can be selected to supply power according to the active antenna requirement. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1. Antenna Requirements The following table shows the requirements on main antennaand GNSS antenna.
LTE Module Series BG96 Hardware Design Table 30: Antenna Requirements Antenna Type Requirements GNSS1) Frequency range: 1559MHz ~1609MHz Polarization: RHCP or linear VSWR: <2 (Typ.) Passive antenna gain: >0dBi Active antenna noise figure: <1.
LTE Module Series BG96 Hardware Design Figure 28: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 29:Mechanicals of U.
LTE Mod dule Series s BG G96 Hardw ware Design n The followin ng figure desscribes the space s factorr of mated connector. Figure 30:S Space Facto or of Mated d Connectorr (Unit: mm m) For more e details, please visithttp://w www.hiro ose.com.
LTE Module Series BG96 Hardware Design 6 Electrical, Reliability and RadioCharacteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 31: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_BB -0.5 6 V VBAT_RF -1.2 6 V USB_VBUS -0.3 5.5 V Voltage at Digital Pins -0.3 2.3 V 6.2.
LTE Module Series BG96 Hardware Design Table 32: Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT VBAT_BB and VBAT_RF The actual input voltages must stay between the minimum and maximum values. 3.3 3.8 4.3 V IVBAT Peak supply current (during transmissionslot) Maximum power control level on EGSM900 1.8 2.0 A USB_VBUS USB detection 5.0 5.25 V 3.0 6.3.
LTE Module Series BG96 Hardware Design returns to the normal operating temperature levels, the module will meet 3GPP specifications again. 6.4. Current Consumption The following table shows current consumption of BG96 module. Table 34: BG96Current Consumption Parameter Typ.1) Unit Power off mode 8 uA PSM Power Saving Mode @Real Network 10 uA Rock bottom Sleep2) AT+CFUN=0@Sleep State 0.8 mA DRX=1.28s @ Instrument 1.5 mA DRX=1.28s @ Instrument 1.96 mA e-I-DRX=20.48s @ Instrument 1.
LTE Module Series BG96 Hardware Design LTE Cat NB1 data transfer (GNSS OFF) BG96_Hardware_Design LTE-FDD B3 @23.09dBm 214 mA LTE-FDD B4 @23.19dBm 214 mA LTE-FDD B5 @23.22dBm 210 mA LTE-FDD B8 @21.83dBm 203 mA LTE-FDD B12 @21.88dBm 215 mA LTE-FDD B13 @21.96dBm 197 mA LTE-FDD B18 @23.04dBm 212 mA LTE-FDD B19 @23.13dBm 211 mA LTE-FDD B20 @23.07dBm 209 mA LTE-FDD B25 @23.01dBm 211 mA LTE-FDD B26 @22.81dBm 214 mA LTE-FDD B28 @22.
LTE Module Series BG96 Hardware Design GPRS data transfer (GNSS OFF) BG96_Hardware_Design LTE-FDD B18 @23.1dBm 159 mA LTE-FDD B19 @22.9dBm 155 mA LTE-FDD B20 @22.7dBm 157 mA LTE-FDD B25 @23dBm 165 mA LTE-FDD B26 @22.8dBm 162 mA LTE-FDD B28 @22.5dBm 163 mA GSM850 4UL1DL @30.17dBm 575 mA GSM850 3UL2DL @32dBm 533 mA GSM850 2UL3DL @32.74dBm 402 mA GSM850 1UL4DL @32.52dBm 220 mA EGSM900 4UL1DL @30.54dBm 586 mA EGSM900 3UL2DL @31.36dBm 556 mA EGSM9002UL3DL @32.
LTE Module Series BG96 Hardware Design EDGE data transfer (GNSS OFF) LTE Voice (GNSS OFF) PCS1900 1UL4DL @29.94dBm 171 mA GSM850 4UL1DL @26.02dBm 403 mA GSM850 3UL2DL @26.11dBm 312 mA GSM850 2UL3DL @26.57dBm 224 mA GSM850 1UL4DL @26.92dBm 136 mA EGSM900 4UL1DL @25.92dBm 391 mA EGSM900 3UL2DL @26.11dBm 301 mA EGSM9002UL3DL @26.16dBm 217 mA EGSM9001UL4DL @26.88dBm 133 mA DCS1800 4UL1DL @24.7dBm 373 mA DCS18003UL2DL @25.97dBm 286 mA DCS18002UL3DL @25.
LTE Module Series BG96 Hardware Design through executing AT+QSCLK=1 command via UART interface and then controlling the module’s DTR pin. For details, please refer to Chapter 3.4.4. Table 35: GNSSCurrent Consumption Description Conditions Typ. Unit Searching Cold Start @Passive Antenna 41.7 mA (AT+CFUN=0) Lost State @Passive Antenna 42 mA Instrument Environment 21.7 mA Open Sky @Passive Antenna 36 mA Open Sky @Active Antenna 35 mA Tracking (AT+CFUN=0) 6.5.
LTE Module Series BG96 Hardware Design GSM850/EGSM900 (8-PSK) 27dBm±3dB 5dBm±5dB DCS1800/PCS1900 (8-PSK) 26dBm±3dB 0dBm±5dB 6.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of BG96 module. Table 37: BG96 Conducted RF Receiving Sensitivity Sensitivity(dBm) Network Band Primary Cat M1/3GPP Cat NB11)/3GPP LTE-FDD B1 -107.0/-102.7 -112.5/-107.5 LTE-FDD B2 -106.7/-100.3 -112.5/-107.5 LTE-FDD B3 -106.8/-99.3 -113/-107.5 LTE-FDD B4 -106.9/-102.
LTE Module Series BG96 Hardware Design LTE-FDD B28 -107.2/-100.8 -113/-107.5 LTE-TDD B39 TBD /-103 Not Supported Sensitivity (dBm) Network Band Primary Diversity GSM/3GPP GSM850/EGSM900 GSM DCS1800/PCS1900 Supported -109/-102 Not -108.5/-102 Supported Table 38: BG96-M Conducted RF Receiving Sensitivity Sensitivity(dBm) Network Band Primary Diversity Cat M1/3GPP LTE-FDD B1 -107.0/-102.7 LTE-FDD B2 -106.7/-100.3 LTE-FDD B3 -106.8/-99.3 LTE-FDD B4 -106.9/-102.3 LTE-FDD B5 -107.
LTE Module Series BG96 Hardware Design LTE-TDD B39 TBD /-103 NOTE 1) LTE Cat NB1 receiving sensitivity without repetitions. 6.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module.
LTE Module Series BG96 Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module.All dimensions are measured in mm, and the tolerances for dimensions without tolerance values are ±0.05mm. 7.1. Mechanical Dimensions of the Module 26.50±0.15 22.50±0.15 Figure 31: Module Top and Side Dimensions BG96_Hardware_Design 79 / 81 2.3±0.
LTE Module Series BG96 Hardware Design 22.50±0.15 7.45 7.15 0.92 1.95 1.10 0.55 1.10 1.65 0.92 1.50 5.10 8.50 26.50±0.15 1.00 0.85 1.70 1.90 1.10 0.85 1.00 1.00 1.70 1.70 0.55 0.70 1.15 1.50 40x1.0 62x0.7 40x1.0 62x1.15 Figure 32: Module Bottom Dimensions (Bottom View) BG96_Hardware_Design 80 / 81 0.50 1.
LTE Module Series BG96 Hardware Design 7.2. Recommended Footprint 22.50±0.15 9.18 9.18 7.45 7.15 1.50 0.55 1.10 5.10 2.55 2.55 1.70 0.15 1.90 0.85 8.50 1.00 4.25 5.95 7.65 9.60 11.03 0.85 1.10 0.85 0.85 1.70 1.00 0.50 1.65 0.70 1.15 1.70 26.50±0.15 1.10 1.95 0.92 1.65 4.25 5.95 7.65 9.70 11.03 0.92 1.00 0.55 4.25 5.95 4.25 5.95 40x1.0 62x0.7 62x1.15 1.50 40x1.0 Figure 33: Recommended Footprint (Top View) NOTES 1.
LTE Mod dule Series s BG G96 Hardw ware Design n For stenccil design n requirem ments of the modu ule, pleasse refer to o docum ment [5]. 7.3 3.
LTE Module Series BG96 Hardware Design NOTE These are design effect drawings of BG96 module. For more accurate pictures, please refer to the module that you get from Quectel.
LTE Module Series BG96 Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage BG96 is stored in avacuum-sealed bag. It is rated at MSL 3, and itsstorage restrictions are listed below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be: Mounted within 168 hours at the factory environment of ≤30ºC/60%RH. Stored at <10%RH. 3.
LTE Module Series BG96 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properlyso as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, thethickness of stencil for the module is recommended to be 0.18mm~0.20mm. For more details, please refer todocument [5].
LTE Module Series BG96 Hardware Design Max slope 1 to 3°C/sec Soak time (between A and B: 150°C and 200°C) 60 to 120 sec Reflow Zone Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 240°C ~ 245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle 1 8.3. Packaging BG96 ispackaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until the devices are ready to be soldered onto the application.
LTE Module Series BG96 Hardware Design Figure 37: Tape Dimensions e p a t r e v o C 48.5 13 100 d e e f f o n o i t c e r i D 44.5+0.20 -0.00 Figure 38: ReelDimensions Table 40: Reel Packaging Model Name BG96 MOQ for MP MinimumPackage: 250pcs Minimum Packagex4=1000pcs 250pcs Size: 370mm× 350mm × 56mm N.W: 1.0kg G.W: 1.71kg Size: 380mm× 250mm× 365mm N.W: 4.0kg G.W: 7.
LTE Module Series BG96 Hardware Design 9 Appendix A References Table 41: Related Documents SN Document Name Remark [1] Quectel_UMTS<E_EVB_User_Guide UMTS<EEVB User Guide [2] Quectel_BG96_AT_Commands_Manual BG96 AT Commands Manual [3] Quectel_BG96_GNSS_AT_Commands_Manual BG96 GNSS AT Commands Manual [4] Quectel_RF_Layout_Application_Note RF Layout Application Note [5] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 42: Terms and Abbreviations Abbreviatio
LTE Module Series BG96 Hardware Design ESD Electrostatic Discharge FDD Frequency Division Duplex FR Full Rate GMSK Gaussian Minimum Shift Keying GSM Global System for Mobile Communications HSS Home Subscriber Server I/O Input/Output Inorm Normal Current LED Light Emitting Diode LNA Low Noise Amplifier LTE Long Term Evolution MO Mobile Originated MS Mobile Station (GSM engine) MT Mobile Terminated PAP Password Authentication Protocol PCB Printed Circuit Board PDU Protocol Da
LTE Module Series BG96 Hardware Design TX Transmitting Direction UL Uplink UE User Equipment URC Unsolicited Result Code (U)SIM (Universal) Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absol
LTE Module Series BG96 Hardware Design 10 Appendix B GPRS Coding Schemes Table 43: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
LTE Module Series BG96 Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
LTE Module Series BG96 Hardware Design 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 BG96_Hardware_Design 93 / 81
LTE Module Series BG96 Hardware Design 12 Appendix D EDGE Modulationand Coding Schemes Table 45: EDGE Modulation and Coding Schemes Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.8kbps MCS-3 GMSK A 14.
