UG96 Hardware Design UMTS/HSPA Module Series Rev. UG96_Hardware_Design_FCC Date: 2015-07-20 www.quectel.
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UMTS/HSPA Module Series UG96 Hardware Design About the Document History Revision Date Author Description 1.
UMTS/HSPA Module Series UG96 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index .................................................................................................................................
UMTS/HSPA Module Series UG96 Hardware Design 3.12. 3.13. 3.14. 3.15. USB Interface .......................................................................................................................... 42 PCM and I2C Interface ............................................................................................................ 44 Network Status Indication ........................................................................................................ 47 Operating Status Indication .....
UMTS/HSPA Module Series UG96 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF UG96 MODULE...................................................................................... 10 TABLE 2: UG96 KEY FEATURES ...................................................................................................................... 11 TABLE 3: IO PARAMETERS DEFINITION ........................................................................................................ 18 TABLE 4: PIN DESCRIPTION .........
UMTS/HSPA Module Series UG96 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 15 FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 17 FIGURE 3: UART SLEEP APPLICATION .........................................................................................................
UMTS/HSPA Module Series UG96 Hardware Design FIGURE 42: TAPE AND REEL SPECIFICATION .............................................................................................. 68 FIGURE 43: DIMENSIONS OF REEL ...............................................................................................................
UMTS/HSPA Module Series UG96 Hardware Design 1 Introduction This document defines the UG96 module and describes its hardware interface which are connected with your application and the air interface. This document can help you quickly understand module interface specifications, electrical and mechanical details. Associated with application notes and user guide, you can use UG96 module to design and set up mobile applications easily.
UMTS/HSPA Module Series UG96 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating UG96 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product.
UMTS/HSPA Module Series UG96 Hardware Design 2 Product Concept 2.1. General Description UG96 module is an embedded 3G wireless communication module, supports GSM/GPRS/EDGE and UMTS/HSDPA/HSUPA networks. It can also provide voice functionality1) for your specific application. UG96 offers a maximum data rate of 7.2Mbps on downlink and 5.76Mbps on uplink in HSPA mode. GPRS supports the coding schemes CS-1, CS-2, CS-3 and CS-4. EDGE supports CS1-4 and MCS1-9 coding schemes.
UMTS/HSPA Module Series UG96 Hardware Design 2.2. Directives and Standards The UG96 module is designed to comply with the FCC statements. FCC ID: XMR201508UG96 The Host system using UG96 should have label “contains FCC ID: XMR201508UG96”. 2.2.1. 2.2.1. FCC Statement Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. 2.2.2.
UMTS/HSPA Module Series UG96 Hardware Design Power Supply Supply voltage: 3.3V~4.3V Typical supply voltage: 3.8V Frequency Bands GSM 4-band: 850/900/1800/1900MHz UMTS 5-band: 800/850/900/1900/2100MHz Transmission Data HSDPA category 8: Max 7.2Mbps HSUPA category 6: Max 5.76Mbps UMTS: Max 384kbps (DL)/Max 384kbps (UL) EDGE: Max 236.8kbps (DL)/Max 236.8kbps (UL) GPRS: Max 85.6kbps (DL)/Max 85.6kbps (UL) CSD: 14.
UMTS/HSPA Module Series UG96 Hardware Design Baud rate 300 to 921600bps Default autobauding 4800 to 115200bps Used for AT command, data transmission or firmware upgrade Multiplexing function USB Interface Compliant with USB 1.1/2.0 specification (slave only), the data transfer rate can reach up to 480Mbps Used for AT command communication, data transmission, software debug and firmware upgrade USB Driver: Support Windows XP, Windows Vista, Windows 7, Windows 8, Windows CE5.0/6.
UMTS/HSPA Module Series UG96 Hardware Design DDR+NAND flash Radio frequency Peripheral interface --UART interface --USIM card interface --USB interface --PCM interface --I2C interface --Status indication --Control interface UG96_Hardware_Design Confidential / Released 14 / 75
UMTS/HSPA Module Series UG96 Hardware Design GSM TX HB GSM TX LB B1 B1 B2 B2/PCS1900 PA DC/DC B5/B6 B5/B6/GSM850 B8 PM_L ASM RF_ANT B8/GSM900 Duplexer PM_H DCS1800 VBAT_RF PMU RF Transceiver 26MHz DCXO Reset I2C PCM UART USB USIM NETLIGHT STATUS VBAT_BB VDD_EXT VRTC PMU PWRKEY PWRDWN_N RESET_N Baseband MCP Nand+DDR 32kHz Figure 1: Functional Diagram 2.5.
UMTS/HSPA Module Series UG96 Hardware Design 3 Application Interface 3.1. General Description UG96 is equipped with a 62-pin 1.1mm pitch SMT pads plus 40-pin ground pads and reserved pads that connect to customer’s cellular application platform.
UMTS/HSPA Module Series UG96 Hardware Design 3.2. Pin Assignment 9 USB_DM 10 RESERVED VBAT_RF GND GND VBAT_RF GND VRTC RESERVED GND GND RF_ANT RESERVED GND 11 101 50 USB_DP 102 63 80 81 51 8 82 52 USB_VBUS 53 7 54 6 55 PCM_DIN PCM_DOUT 56 5 57 4 58 PCM_CLK PCM_SYNC 59 3 60 2 GND 61 1 62 RESERVED RESERVED GND The following figure shows the pin assignment of the UG96 module.
UMTS/HSPA Module Series UG96 Hardware Design 3.3. Pin Description The following tables show the UG96’s pin definition. Table 3: IO Parameters Definition Type Description IO Bidirectional input/output DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain Table 4: Pin Description Power Supply Pin Name VBAT_BB VBAT_RF VRTC VDD_EXT Pin No.
UMTS/HSPA Module Series UG96 Hardware Design If unused, keep this pin open. GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~102 Ground Turn On/Off Pin Name Description DC Characteristics Comment Turn on the module. RPU≈200kΩ VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally. Active low. Turn off the module. RPU≈4.7kΩ VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally. Active low. If unused, keep this pin open. DI Reset the module.
UMTS/HSPA Module Series UG96 Hardware Design IO USB differential data bus. Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. 10 IO USB differential data bus. Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. Pin Name Pin No.
UMTS/HSPA Module Series UG96 Hardware Design USIM_ PRESENCE 42 DI USIM card input detection. VILmax=0.35V VIHmin=1.3V VIHmax=1.85V 1.8V power domain. External pull-up resistor is required. Main UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment RI 39 DO Ring indicator. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. If unused, keep this pin open. DO Data carrier detection. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. If unused, keep this pin open. Clear to send.
UMTS/HSPA Module Series UG96 Hardware Design PCM_SYNC PCM_CLK 5 DO PCM data frame sync signal. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. In master mode, it is an output signal. If unused, keep this pin open. 4 DO PCM data bit clock. VOLmax=0.25V VOHmin=1.55V 1.8V power domain. In master mode, it’s an output signal. If unused, keep this pin open. Pin No. I/O Description DC Characteristics Comment I2C Interface Pin Name I2C_SCL I2C_SDA 40 OD I2C serial clock. 1.8V power domain.
UMTS/HSPA Module Series UG96 Hardware Design 49, 56, 57, 63~66, 75~78, 83~88, 92~99 NOTE The function of AP_READY is under development. 3.4. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Details GSM Idle The module has registered to the GSM network and is ready to send and receive data. GSM Talk/Data GSM connection is ongoing.
UMTS/HSPA Module Series UG96 Hardware Design HSPA Idle The module has registered to the HSPA network and the module is ready to send and receive data. HSPA Data HSPA data transfer is ongoing. In this mode, the power consumption is decided by network setting (e.g. TPC pattern) and data transfer rate. Minimum Functionality Mode AT+CFUN command can set the module entering into a minimum functionality mode without removing the power supply. In this case, both RF function and USIM card will be invalid.
UMTS/HSPA Module Series UG96 Hardware Design The following figure shows the connection between the module and application processor. Processor Module RXD TXD TXD RXD RI EINT DTR GPIO AP_READY GPIO GND GND Figure 3: UART Sleep Application The RI of module is used to wake up the processor, and AP_READY will detect the sleep state of processor (can be configured to high level or low level detection). You should pay attention to the level match shown in dotted line between module and processor.
UMTS/HSPA Module Series UG96 Hardware Design The following figure shows the connection between the module and processor. Processor Module VDD USB_VBUS USB_DP USB_DP USB_DM USB_DM RI EINT GND GND Figure 4: USB Application with Suspend Function When the processor’s USB bus returns to resume state, the module will be woken up. 3.5.1.3.
UMTS/HSPA Module Series UG96 Hardware Design NOTES 1. In sleep mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally. 2. The function of AP_READY is under development. .5.2. Minimum Functionality Mode Minimum functionality mode reduces the functionality of the module to minimum level, thus minimizes the current consumption at the same time. This mode can be set as below: Command AT+CFUN provides the choice of the functionality levels: =0, 1, 4.
.6.2. UMTS/HSPA Module Series UG96 Hardware Design GND 3, 31, 48, 50 54, 55, 58, 59, 61, 62, 67~74, 79~82, 89~91, 100~102 Ground - - - - Decrease Voltage Drop The power supply range of the module is 3.3V~ 4.3V. Make sure the input voltage will never drop below 3.3V. If the voltage drops below 3.3V, the module will turn off automatically. The following figure shows the voltage drop during transmitting burst in 2G network, the voltage drop will be less in 3G network. burst burst ≤ 2.
UMTS/HSPA Module Series UG96 Hardware Design VBAT VBAT_RF VBAT_BB + + C2 C3 C4 100nF 33pF 10pF C1 D1 100uF 5.1V C5 100uF C6 C7 C8 100nF 33pF 10pF Module Figure 7: Star Structure of the Power Supply 3.6.3. Reference Design for Power Supply The power design for the module is very important, since the performance of power supply for the module largely depends on the power source. The power supply is capable of providing the sufficient current up to 2A at least.
.6.4. .7.1. UMTS/HSPA Module Series UG96 Hardware Design NOTE It is suggested that you should switch off power supply for module in abnormal state, and then switch on power to restart module. Monitor the Power Supply The command AT+CBC can be used to monitor the VBAT_BB voltage value displayed in millivolt. For more details, please refer to document [1]. 3.7. Turn on and off Scenarios Turn on Module Turn on the module using the PWRKEY. The following table shows the pin definition of PWRKEY.
UMTS/HSPA Module Series UG96 Hardware Design The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate from finger. A reference circuit is shown in the following figure. S1 PWRKEY TVS Close to S1 Figure 10: Turn on the Module Using Keystroke The turn on scenarios is illustrated as the following figure. 1 ≥ 3.5s VBAT ≥ 100ms VIH ≥ 1.
UMTS/HSPA Module Series UG96 Hardware Design .7.2. Turn off Module The following procedures can be used to turn off the module: Normal power down procedure: Turn off the module using command AT+QPOWD. Emergency power down procedure: Turn off the module using the PWRDWN_N pin. Automatic shutdown: Turn off the module automatically if under-voltage or over-voltage is detected. 3.7.2.1. Turn off Module Using AT Command There are several different ways to turn off the module.
UMTS/HSPA Module Series UG96 Hardware Design 3.7.2.2. Emergency Shutdown The module can be shut down by the pin PWRDWN_N. It should only be used under emergent situation. The following table shows the pin definition of PWRDWN_N. Table 8: PWRDWN_N Pin Description Pin Name PWRDWN_N Pin No. 16 Description Turn off the module DC Characteristics Comment VIHmax=2.1V VIHmin=1.3V VILmax=0.5V Pull-up to VRTC internally with 4.7kΩ resistor.
UMTS/HSPA Module Series UG96 Hardware Design S2 PWRDWN_N TVS Close to S2 Figure 14: Turn off the Module Using Keystroke The emergency shutdown scenario is illustrated as the following figure. VBAT PWRDWN_N ≥100ms STATUS Module Status RUNNING Power-down procedure OFF Figure 15: Timing of Emergency Shutdown NOTE Use the PWRDWN_N only when turning off the module by the command AT+QPOWD or the RESET_N pin failed.
UMTS/HSPA Module Series UG96 Hardware Design 3.7.2.3. Automatic Shutdown The module will constantly monitor the voltage applied on the VBAT, if the voltage ≤ 3.5V, the following URC will be presented: +QIND: “vbatt”,-1 If the voltage ≥ 4.21V, the following URC will be presented: +QIND: “vbatt”,1 The uncritical voltage is 3.3V to 4.3V, If the voltage > 4.3V or < 3.3V the module would automatically shut down itself. If the voltage < 3.
UMTS/HSPA Module Series UG96 Hardware Design The recommended circuit is similar to the PWRKEY control circuit. You can use open drain/collector driver or button to control the RESET_N. RESET_N ≥ 100ms 4.7K Reset pulse 47K Figure 16: Reference Circuit of RESET_N by Using Driving Circuit S3 RESET_N TVS Close to S3 Figure 17: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated as the following figure. VBAT ≥ 100ms > 5s VIH ≥ 1.3V RESET_N VIL ≤ 0.
UMTS/HSPA Module Series UG96 Hardware Design 3.9. RTC Interface The RTC (Real Time Clock) can be powered by an external capacitor through the pin VRTC when the module is powered down and there is no power supply for the VBAT. If the voltage supply at VBAT is disconnected, the RTC can be powered by the capacitor. The capacitance determines the duration of buffering when no voltage is applied to UG96. The capacitor is charged from the internal LDO of UG96 when there is power supply for the VBAT.
UMTS/HSPA Module Series UG96 Hardware Design 3.10. UART Interface The module provides 7 lines UART interface. UART interface supports 300, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800 and 921600bps baud rate, and the default is auto-baud rate 4800~115200. This interface can be used for data transmission, AT communication or firmware upgrade. The module is designed as the DCE (Data Communication Equipment), following the traditional DCE-DTE (Data Terminal Equipment) connection.
UMTS/HSPA Module Series UG96 Hardware Design UG96 provides one 1.8V UART interface. A level shifter should be used if your application is equipped with a 3.3V UART interface. A level shifter TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows the reference design of the TXS0108EPWR. 0.1uF VDD_EXT VCCA 120K VCCB VDD_3.3V 0.1uF 10K OE GND RI A1 B1 RI_3.3V DCD A2 B2 DCD_3.3V CTS A3 TXS0108EPWR B3 CTS_3.3V RTS A4 B4 RTS_3.3V DTR A5 B5 DTR_3.
UMTS/HSPA Module Series UG96 Hardware Design The following figure is an example of connection between UG96 and PC. A voltage level translator and a RS-232 level translator chip must be inserted between module and PC, since the UART interface does not support the RS-232 level, while supports the 1.8V CMOS level only. 3.3V OE DCD TXD CTS RI DCD_1.8V TXD_1.8V DCD_3.3V TXD_3.3V DIN1 DIN2 DOUT1 DOUT2 CTS_1.8V RI_1.8V CTS_3.3V RI_3.3V DOUT3 DOUT4 DOUT5 RXD DTR RTS GND RXD_1.8V DTR_1.8V RTS_1.
UMTS/HSPA Module Series UG96 Hardware Design Table 12: Pin Definition of the USIM Interface Pin Name Pin No. I/O Description Comment USIM_PRESENCE 42 USIM card detection input. 1.8V power domain. Either 1.8V or 3.0V is supported by the module automatically. DI USIM_VDD 43 PO Power supply for USIM card. USIM_RST 44 DO Reset signal of USIM card. USIM_DATA 45 IO Data signal of USIM card. USIM_CLK 46 DO Clock signal of USIM card. USIM_GND 47 Pull-up to USIM_VDD with 4.
UMTS/HSPA Module Series UG96 Hardware Design USIM_VDD USIM_GND Module USIM_VDD USIM_RST USIM_CLK USIM_DATA 15K 100nF USIM holder VCC RST CLK 22R GND VPP IO 22R 22R 33pF 33pF 33pF ESD GND GND Figure 24: Reference Circuit of the 6-Pin USIM Card In order to enhance the reliability and availability of the USIM card in customer’s application, please follow the criteria below in the USIM circuit design: Keep layout of USIM card as close as possible to the module.
UMTS/HSPA Module Series UG96 Hardware Design The following table shows the pin definition of USB interface. Table 13: USB Pin Description Pin Name Pin No. I/O Description Comment USB_DP 9 IO USB differential data bus (positive). Require differential impedance of 90Ω. USB_DM 10 IO USB differential data bus (minus). Require differential impedance of 90Ω. USB_VBUS 8 PI Used for detecting the USB interface connected. 2.5~5.25V. Typical 5.0V. More details about the USB 2.
UMTS/HSPA Module Series UG96 Hardware Design Keep the ESD components as close as possible to the USB connector. It is suggested that reserve RC circuit near USB connector for debug. The USB interface is recommended to be reserved for firmware upgrade in your design. The following figure shows the recommended test points. Module USB_VBUS Connector USB_VBUS USB_DM USB_DM USB_DP USB_DP VBAT_BB VBAT VBAT_RF PWRKEY GND PWRKEY GND Figure 26: Test Points of Firmware Upgrade NOTES 1.
UMTS/HSPA Module Series UG96 Hardware Design The following table shows the pin definition of PCM and I2C interface. Table 14: Pin Definition of PCM and I2C Interface Pin Name Pin No. I/O Description Comment PCM_CLK 4 DO PCM data bit clock 1.8V power domain PCM_SYNC 5 DO PCM data frame sync signal 1.8V power domain PCM_IN 6 DI PCM data input 1.8V power domain PCM_OUT 7 DO PCM data output 1.8V power domain I2C_SCL 40 OD I2C serial clock Require external pull-up resistor.
UMTS/HSPA Module Series UG96 Hardware Design In general, the BitClockFrequency (BCLK) is calculated by the following expression: BitClockFrequency=(DataWordBit +1) × SamplingFrequency The following figure shows the reference design of PCM interface with external codec IC.
UMTS/HSPA Module Series UG96 Hardware Design 3.14. Network Status Indication The NETLIGHT signal can be used to drive a network status indication LED. The following tables describe pin definition and logic level changes in different network status. Table 15: Pin Definition of Network Indicator Pin Name Pin No. I/O Description Comment NETLIGHT 21 Indicate the module network activity status. 1.8V power domain.
UMTS/HSPA Module Series UG96 Hardware Design 3.15. Operating Status Indication The STATUS pin is set as the module status indicator. It will output high level when module is powered on. The following table describes pin definition of STATUS. Table 17: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the module operation status. 1.8V power domain A reference circuit is shown as below. VBAT Module 2.2K 4.
UMTS/HSPA Module Series UG96 Hardware Design 4 Antenna Interface The Pin 60 is the RF antenna pad. The RF interface has an impedance of 50Ω. 4.1. GSM/UMTS Antenna Interface .1.1. Pin Definition Table 18: Pin Definition of the RF Antenna Pin Name Pin No. GND 58 ground GND 59 ground RF_ANT 60 GND 61 ground GND 62 ground .1.2.
.1.3. UMTS/HSPA Module Series UG96 Hardware Design UMTS900 925 ~ 960 880 ~ 915 MHz UMTS850 869 ~ 894 824 ~ 849 MHz UMTS800 875 ~ 885 830 ~ 840 MHz Reference Design The RF external circuit is recommended as below. It should reserve a π-type matching circuit for better RF performance. The capacitors are not mounted by default. Module R1 0R RF_ANT C1 NM C2 NM Figure 31: Reference Circuit of Antenna Interface UG96 provides an RF antenna PAD for customer’s antenna connection.
.2.1. .2.2. UMTS/HSPA Module Series UG96 Hardware Design 4.2. Antenna Installation Antenna Requirement The following table shows the requirement on GSM/UMTS antenna. Table 20: Antenna Cable Requirements Type Requirements GSM850/EGSM900 UMTS800/850/900 Cable insertion loss <1dB DCS1800/PCS1900 UMTS1900/2100 Cable insertion loss <1.
UMTS/HSPA Module Series UG96 Hardware Design Figure 32: Dimensions of the UF.L-R-SMT Connector (Unit: mm) You can use U.FL-LP serial connector listed in the following figure to match the UF.L-R-SMT. Figure 33: Mechanicals of UF.
UMTS/HSPA Module Series UG96 Hardware Design The following figure describes the space factor of mated connector Figure 34: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
UMTS/HSPA Module Series UG96 Hardware Design 5 Electrical, Reliability and Radio Characteristics 5.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table. Table 22: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB 0 0.8 A Peak Current of VBAT_RF 0 2 A Voltage at Digital Pins -0.3 2.3 V 5.2.
UMTS/HSPA Module Series UG96 Hardware Design Parameter Description Conditions Min. IVBAT Peak supply current (during transmission slot) Maximum power control level on EGSM900. USB_VBUS USB insert detection 2.5 Typ. Max. Unit 1.8 2.0 A 5.0 5.25 V 5.3. Operating Temperature The operating temperature is listed in the following table. Table 24: Operating Temperature Parameter Min. Typ. Max.
UMTS/HSPA Module Series UG96 Hardware Design Parameter Description GSM/GPRS supply current WCDMA supply current GPRS data transfer UG96_Hardware_Design Conditions Min. Typ. Max. Unit Sleep (USB disconnected) @DRX=2 1.13 mA Sleep (USB disconnected) @DRX=5 1.10 mA Sleep (USB disconnected) @DRX=9 1.00 mA Sleep (USB disconnected) @DRX=6 2.52 mA Sleep (USB disconnected) @DRX=7 1.82 mA Sleep (USB disconnected) @DRX=8 1.75 mA Sleep (USB disconnected) @DRX=9 1.
UMTS/HSPA Module Series UG96 Hardware Design Parameter Description EDGE data transfer UG96_Hardware_Design Conditions Min. Typ. Max.
UMTS/HSPA Module Series UG96 Hardware Design Parameter Description WCDMA data transfer Conditions Min. Typ. Max.
UMTS/HSPA Module Series UG96 Hardware Design 5.5. RF Output Power The following table shows the RF output power of UG96 module. Table 26: Conducted RF Output Power Edge Frequency Max. Min. GSM850 32.5dBm±1dB 5dBm±5dB EGSM900 32.5dBm±1dB 5dBm±5dB DCS1800 29.5dBm±1dB 0dBm±5dB PCS1900 29.
UMTS/HSPA Module Series UG96 Hardware Design 5.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of UG96 module. Table 27: Conducted RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.) GSM850 -109.6dBm EGSM900 -108.5dBm DCS1800 -110dBm PCS1900 -108dBm UMTS850/800 -110dBm UMTS900 -110dBm UMTS1900 -109.5dBm UMTS2100 -110.5dBm 5.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general.
UMTS/HSPA Module Series UG96 Hardware Design 6 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 6.1. Mechanical Dimensions of the Module 2.2+/-0.2 22.5+/-0.15 26.5+/-0.15 0.8+/-0.
UMTS/HSPA Module Series UG96 Hardware Design 22.50 2.075 1.70 26.50 0.85 1.10 0.70 1.00 1.70 2.225 1.00 1.70 1.15 0.55 62x0.7 40x1.00 40x1.00 62x1.
UMTS/HSPA Module Series UG96 Hardware Design 6.2. Footprint of Recommendation 22.50 9.95 7.45 9.95 7.15 1.95 0.55 1.10 11.80 9.70 7.65 5.95 4.25 0.20 2.55 0.85 0.85 26.50 2.55 4.25 1.90 5.95 2.55 7.65 2.55 9.60 11.80 0.85 0.85 4.25 4.25 5.95 5.95 62x0.7 62x2.35 40x1.00 1.00 40x1.
UMTS/HSPA Module Series UG96 Hardware Design The recommended stencil of UG96 is shown as below figure. Figure 38: Recommended Stencil of UG96 (Top View) NOTES 1. In order to maintain the module, keep about 3mm between the module and other components in the host PCB. 2. All RESERVED pins must not be connected to GND. 3. All dimensions are in millimeters.
UMTS/HSPA Module Series UG96 Hardware Design 6.3. Top View of the Module Figure 39: Top View of the Module 6.4.
UMTS/HSPA Module Series UG96 Hardware Design 7 Storage and Manufacturing 7.1. Storage UG96 is stored in the vacuum-sealed bag. The restriction of storage condition is shown as below. Shelf life in sealed bag is 12 months at < 40ºC/90%RH. After this bag is opened, devices that will be subjected to reflow solder or other high temperature process must be: Mounted within 72 hours at factory conditions of ≤ 30ºC/60%RH. Stored at <10% RH.
UMTS/HSPA Module Series UG96 Hardware Design It is suggested that peak reflow temperature is 235 ~ 245ºC (for SnAg3.0Cu0.5 alloy). Absolute max reflow temperature is 260ºC. To avoid damage to the module when it was repeatedly heated, it is suggested that the module should be mounted after the first panel has been reflowed. The following picture is the actual diagram which we have operated.
UMTS/HSPA Module Series UG96 Hardware Design 7.3. Packaging The modules are stored inside a vacuum-sealed bag which is ESD protected. It should not be opened until the devices are ready to be soldered onto the application. The reel is 330mm in diameter and each reel contains 250 modules.
UMTS/HSPA Module Series UG96 Hardware Design Figure 43: Dimensions of Reel Table 28: Reel Packing Model Name UG96 MOQ for MP Minimum Package: 250pcs Minimum Package×4=1000pcs 250pcs Size: 370 × 350 × 56mm3 N.W: 0.78kg G.W: 1.46kg Size: 380 × 250 × 365mm3 N.W: 3.1kg G.W: 6.
UMTS/HSPA Module Series UG96 Hardware Design 8 Appendix A Reference Table 29: Related Documents SN Document Name Remark [1] Quectel_WCDMA_UGxx_AT_Commands_Manual UGxx AT Commands Manual [2] Quectel_UMTS<E_EVB_User_Guide UMTS<E EVB User Guide [3] Quectel_UG96_Reference_Design UG96 Reference Design [4] Quectel_UG96&UG95&M95 R2.0_Reference_Design UG96, UG95 and M95 R2.0 Compatible Reference Design [5] Quectel_UG96&UG95&M95 R2.0_Compatible_ Design UG96, UG95 and M95 R2.
UMTS/HSPA Module Series UG96 Hardware Design DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate EGSM Extended GSM900 band (includes standard GSM900 band) ESD Electrostatic Discharge FR Full Rate GMSK Gaussian Minimum Shift Keying GPS Global Positioning System GSM Global System for Mobile Communications HR Half Rate HSPA High Speed Packet Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access I/O Input/Output IMEI Internat
UMTS/HSPA Module Series UG96 Hardware Design PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol PSK Phase Shift Keying PWM Pulse Width Modulation QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized RMS Root Mean Square (value) RTC Real Time Clock Rx Receive SIM Subscriber Identification Module SMS Short Message Service TDMA Time Division Multiple Access TE Terminal Equipment
UMTS/HSPA Module Series UG96 Hardware Design VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage
UMTS/HSPA Module Series UG96 Hardware Design 9 Appendix B GPRS Coding Scheme Table 31: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 C4-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
UMTS/HSPA Module Series UG96 Hardware Design 10 Appendix C GPRS Multi-slot Class Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependant, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
UMTS/HSPA Module Series UG96 Hardware Design 11 Appendix D EDGE Modulation and Coding Scheme Table 33: EDGE Modulation and Coding Scheme Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.
