Datasheet

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1. Product profile

1.1 General description

PNP Resistor-Equipped Transistor (RET) family in small Surface-Mounted Device (SMD)

plastic packages.

1.2 Features and benefits

1.3 Applications

1.4 Quick reference data

PDTA114E series

PNP resistor-equipped transistors;

R1 = 10 k, R2 = 10 k

Rev. 10 — 21 December 2011 Product data sheet

Table 1. Product overview

Type number Package NPN

complement

Package

configuration

NXP JEITA JEDEC

PDTA114EE SOT416 SC-75 - PDTC114EE ultra small

PDTA114EM SOT883 SC-101 - PDTC114EM leadless ultra small

PDTA114ET SOT23 - TO-236AB PDTC114ET small

PDTA114EU SOT323 SC-70 - PDTC114EU very small

 100 mA output current capability  Reduces component count

 Built-in bias resistors  Reduces pick and place costs

 Simplifies circuit design  AEC-Q101 qualified

 Digital application in automotive and

industrial segments

 Cost-saving alternative for BC847/857

series in digital applications

 Control of IC inputs  Switching loads

Table 2. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

CEO

collector-emitter voltage open base - - 50 V

output current - - 100 mA

R1 bias resistor 1 (input) 7 10 13 k

R2/R1 bias resistor ratio 0.8 1.0 1.2

Summary of content (17 pages)

PAGE 1
PDTA114E series PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k Rev. 10 — 21 December 2011 Product data sheet 1. Product profile 1.1 General description PNP Resistor-Equipped Transistor (RET) family in small Surface-Mounted Device (SMD) plastic packages. Table 1.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 2. Pinning information Table 3. Pinning Pin Description Simplified outline Graphic symbol SOT23; SOT323; SOT416 1 input (base) 2 GND (emitter) 3 3 3 R1 output (collector) 1 R2 1 2 2 006aaa144 sym003 SOT883 1 input (base) 2 GND (emitter) 3 1 3 3 2 output (collector) R1 1 Transparent top view R2 2 sym003 3. Ordering information Table 4.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 006aac778 300 Ptot (mW) (1) (2) 200 (3) 100 0 -75 -25 25 75 125 175 Tamb (°C) (1) SOT23; FR4 PCB, standard footprint SOT883; FR4 PCB with 70 m copper strip line, standard footprint (2) SOT323; FR4 PCB, standard footprint (3) SOT416; FR4 PCB, standard footprint Fig 1. Power derating curves 6. Thermal characteristics Table 7.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 006aac781 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 0.2 102 0.1 0.05 0.02 10 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTA114EE (SOT416); typical values 006aac782 103 Zth(j-a) (K/W) duty cycle = 1 0.75 0.5 102 0.33 0.2 0.1 0.05 10 0.02 0.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 006aac779 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.2 0.1 0.05 0.02 10 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTA114ET (SOT23); typical values 006aac780 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.2 0.1 0.05 0.02 10 0.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 7. Characteristics Table 8. Characteristics Tamb = 25 C unless otherwise specified.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 006aac773 103 hFE 006aac774 -1 (1) VCEsat (V) (2) (3) 102 -10-1 (1) 10 (2) (3) 1 -10-1 -1 -102 -10 -10-2 -1 -102 -10 IC (mA) IC (mA) VCE = 5 V IC/IB = 20 (1) Tamb = 100 C (1) Tamb = 100 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 40 C Fig 6. DC current gain as a function of collector current; typical values Fig 7.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 006aac777 6 Cc (pF) 006aac763 103 fT (MHz) 4 102 2 0 0 -10 -20 -30 -40 -50 VCB (V) f = 1 MHz; Tamb = 25 C 10 -10-1 -1 -102 -10 IC (mA) VCE = 5 V; Tamb = 25 C Fig 10. Collector capacitance as a function of collector-base voltage; typical values Fig 11. Transition frequency as a function of collector current; typical values of built-in transistor 8. Test information 8.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 9. Package outline 0.62 0.55 0.55 0.47 0.95 0.60 1.8 1.4 3 0.45 0.15 0.50 0.46 3 0.30 0.22 1.75 0.9 1.45 0.7 1.02 0.95 0.65 1 0.30 0.22 2 0.30 0.15 0.25 0.10 2 1 0.20 0.12 1 0.35 Dimensions in mm 04-11-04 Fig 12. Package outline PDTA114EE (SOT416/SC-75) 3.0 2.8 Dimensions in mm 03-04-03 Fig 13. Package outline PDTA114EM (SOT883/SC-101) 1.1 0.9 2.2 1.8 1.1 0.8 0.45 0.15 3 3 0.45 0.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 11. Soldering 2.2 1.7 solder lands solder resist 1 0.85 2 solder paste 0.5 (3×) occupied area Dimensions in mm 0.6 (3×) 1.3 sot416_fr Reflow soldering is the only recommended soldering method. Fig 16. Reflow soldering footprint PDTA114EE (SOT416/SC-75) 1.3 0.7 R0.05 (12×) solder lands solder resist 0.9 0.6 0.7 solder paste 0.25 (2×) occupied area 0.3 (2×) 0.3 0.4 (2×) 0.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 3.3 2.9 1.9 solder lands solder resist 3 2 1.7 solder paste occupied area 0.6 (3×) 0.7 (3×) Dimensions in mm 0.5 (3×) 0.6 (3×) 1 sot023_fr Fig 18. Reflow soldering footprint PDTA114ET (SOT23) 2.2 1.2 (2×) 1.4 (2×) solder lands 4.6 solder resist 2.6 occupied area Dimensions in mm 1.4 preferred transport direction during soldering 2.8 4.5 sot023_fw Fig 19.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 2.65 1.85 1.325 solder lands solder resist 2 2.35 0.6 (3×) 3 solder paste 1.3 1 occupied area 0.5 (3×) Dimensions in mm 0.55 (3×) sot323_fr Fig 20. Reflow soldering footprint PDTA114EU (SOT323/SC-70) 4.6 2.575 1.425 (3×) solder lands solder resist occupied area 1.8 3.65 2.1 09 (2×) Dimensions in mm preferred transport direction during soldering sot323_fw Fig 21.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 12. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes PDTA114E_SER v.10 20111221 Product data sheet - PDTA114E_SER v.9 Modifications: • Figure 2 and 5: corrected PDTA114E_SER v.9 20111122 Product data sheet - PDTA114E_SERIES v.8 PDTA114E_SERIES v.8 20040802 Product specification - PDTA114E_SERIES v.7 PDTA114E_SERIES v.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.
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PDTA114E series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 10 k 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . .