Type1SC Hardware Design Guidelines Version 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Release Date 10/01/2018 11/08/2018 03/27/2019 07/01/2019 08/07/2019 12/12/2019 1/17/2020 1/30/2020 Comments Initial draft Revisions following first review Revised VBAT_FEM Max Current Added FCC Notice Updated graphic in Section 2.5.7. Updated FCC ID for NB1 Updated regulatory info Updated EIRP for antennas for FCC/IC Copyright © Murata Manufacturing Co., Ltd. All rights reserved. September 2018 Application Note: LBAD0XX1SC, v0.
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TABLE OF CONTENTS 1 2 3 4 5 6 7 8 Introduction .................................................................................................................................................. 7 1.1 Scope ....................................................................................................................................... 7 1.2 Audience .................................................................................................................................. 7 1.
8.5 8.6 Additional Testing Requirements ............................................................................................ 33 Test Modes .............................................................................................................................
LIST OF FIGURES Figure 1 Module block diagram ............................................................................................ 9 Figure 2 Land pattern: top view, in millimeters ..................................................................... 13 Figure 3 Pin layout: top view............................................................................................... 14 Figure 4 Power up sequence ..............................................................................................
LIST OF TABLES Table 1 Supported bands .................................................................................................................................... 9 Table 2 Power supply range ............................................................................................................................. 12 Table 3 Temperature range .............................................................................................................................. 12 Table 4 Pin description...
1 Introduction 1.1 Scope This document introduces the Murata Type1SC LTE CatM1/NB1 module and presents some possible and recommended guidelines for developing new products based on this module. The information given should be used as a guide and a starting point for properly developing products with the Murata module. 1.2 Audience This document is intended for Murata customers, especially system architects and HW engineers, to design products based on the Murata Type1SC module. 1.
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2 Introduction Type1SC is Murata’s new LTE series for IoT applications. The module can be used as a wireless communication front-end for wearable products, offering mobile communication features to an external host CPU through its interfaces. Note: NB1 will be supported in a future firmware release. 2.1 High Level Block Diagram The following block diagram illustrates the module which contains the ALT1250 LTE Cat M1/NB1 SoC, RF FEM, 128 MBits flash and clocks. Figure 1 Module block diagram 2.
allowed chip power mode configuration. An application note will be provided to show how to configure the module and the R&S CMW500 to test the different power modes. LS Power Mode Only one of the following pins can be used to wake up the device RTC Expiration PMU_POWER_BUTTON PMU_WAKEUP PMU_SHUTDOWN AntiTamper Other digital interface pins can also be configured to wake up the system (up to 10 GPIO’s can be used).
eDRX Current Draw The SIM card will have a major impact on this feature. Network Carriers will support different modes of operation. The R&S test SIM for the CMW500 does not support SIM deactivation during eDRX cycles. This caused the number to be significantly greater than a setup with a deactivation mode. The feature below shows result using the CMW500 test SIM. Under good conditions using a SIM that can be deactivated, the current draw could be as low as 45uA instead of 194uA for this setup.
2.6 Certification and Regulatory The module is certified to GCF 3.70.2 and PTCRB 5.36. The module is fully compliant to CAT M1 3GPP release 13. The module is FCC/IC certified (HSW-TY1SCDM and 4492A-TY1SCDM) and RED ETSI EN 301908-13, EN301908-1, EN301489-1, EN301489-19, EN301489-52 compliant. 2.7 Power Supply Range Parameter Range VBAT -0.3 V – 4.35 V VBAT_FEM -0.5 V – 5.2 V VBAT 2.2 V – 4.35 V VBAT_FEM 3.2 V – 4.5 V I/O (1.8V typ) 1.7 V – 1.9 V V VDDIO 1.7 V – 1.9 V V VDD 1.0 V – 1.
2.9 Mechanical Specifications Dimensions: Weight: 11.1 × 11.4 × 1.
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1SC Pin No Module Pin Name ALT12 50 IC Pin No ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description 13 I2C1_SCL H4 Digital I/O PU VDDIO Reserved (No Connection) 14 I2C0_SCL L7 Digital I/O PU VDDIO Reserved (No Connection) 15 I2C0_SDA J7 I2C1_SCL/ SPIS_CLK/ LED3/ M CU_I2C1_SCL/ MCU_FLASH1_ CS_N/ UART0_DTR/ MCU_SPI M1_EN0_A/ MCU_LED3/ GPIO45 I2C0_SCL/ SPIS_MISO/ KEYPA D9/ FEM19/ MCU_I2C0_SCL/ UART0_DSR/ GPIO43 I2C0_SDA/ SPIS_MOSI/ CLKO UT/ KEYPAD7/
1SC Pin No Module Pin Name ALT12 50 IC Pin No 27 RF_AUX_OUT1 28 GND 29 RF_RXTX 30 GND 31 PWM3 N13 32 PWM0 P10 33 AUX_ADC4 H12 34 AUX_ADC3 J13 35 AUX_ADC2 K14 36 AUX_ADC0 L13 37 AUX_ADC1 M14 38 GND 39 SF_SO/IO1 Y14 ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description RF Reserved (No Connection) RF LTE RF in/out signal PWM3/ I2C1_SDA/ SC_SWP/ F EM29/ MCU_CC_OUT3/ MCU_CC_IN3/ MCU_LED3/ MCU_P WM3/ GPIO53 PWM0/ CLKOUT/ MCU_CC_O UT0
1SC Pin No Module Pin Name ALT12 50 IC Pin No ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description 40 SF_SI/IO0 AA15 FLASH0_IO0/ GPIO70 Digital I/O PU V_FLASH Reserved (No Connection) 41 SF_nHOLD/IO3 Y12 FLASH0_IO3/ GPIO73 Digital I/O PU V_FLASH Reserved (No Connection) 42 SF_nWP/IO2 AA13 FLASH0_IO2/ GPIO72 Digital I/O PD V_FLASH Reserved (No Connection) 43 SPIM0_EN0 P12 Digital I/O PU VDDIO Port C: UART RTS 44 SPIM0_EN1 R13 D
1SC Pin No Module Pin Name ALT12 50 IC Pin No ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description 54 FLASH0_CS_N2 W11 Digital I/O PU V_FLASH Reserved (No Connection) 55 FLASH1_SCK U7 Digital I/O PD VDDIO Reserved (No Connection) 56 PMU_VBACKUP W7 FLASH0_CS_N2/ FEM27/ LED5/ MCU_LED5/ GPIO78 MCU_FLASH1_SCK/ PWM1/ K EYPAD8/ LED1/ MCU_LED1/ M CU_PWM1/ GPIO55 PMU_VBACKUP Power I 57 PMU_VRTC W5 PMU_VRTC Power O 58 VBAT U3 PMU_VBAT_LDO Po
1SC Pin No Module Pin Name ALT12 50 IC Pin No ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description Digital I/O PU VDDIO Default is UART0 Transmit Data Data host interface; UART TX (HI) Default is UART1 Request to Send Dedicated for debug interface Default is UART0 Receive Data Data host interface; UART RX (HI) Default is UART0 Clear to Send Data host interface; UART CTS (HI) UART3_RTS_A/ GPIO26 73 74 75 76 UART0_TX UART2_R
1SC Pin No Module Pin Name ALT12 50 IC Pin No ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description 83 PWM2 M12 Digital I/O PU VDDIO Reserved (No Connection) 84 SPIM1_MISO N9 Digital I/O PD VDDIO SC2_IO 85 SPIM1_EN P8 Digital I/O PU VDDIO SC2_DET 86 SPIM1_MOSI T8 Digital I/O PD VDDIO SC2_CLK 87 SPIM1_CLK R9 Digital I/O PD VDDIO SC2_RST 88 SF_CLK W15 PWM2/ I2C0_SCL/ MCU_SPIM1_MOSI_AB / FEM16/ MCU_C C_OUT2/ MCU_CC_IN2/ MCU_P
1SC Pin No Module Pin Name ALT12 50 IC Pin No ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description 96 PCM_IN N11 Digital I/O PU VDDIO Reserved (No Connection) 97 PCM_OUT T10 Digital I/O PU VDDIO Reserved (No Connection) 98 PCM_CLK V10 PCM_IN/ UART1_RX/ KEYPAD 2/ LED4/ MCU_FLASH1_IO2/ MCU_LED4/ MCU_UART1_RX/ MCU_PCM_IN/ GPIO48 PCM_OUT/ UART1_TX/ KEYPA D3/ PWM2/ MCU_FLASH1_IO 3/ MCU_PWM2/ MCU_UART1_TX/ MCU_PCM_OUT/ GPIO49 PCM_CLK/ UART1_CTS/ KEYP
1SC Pin No Module Pin Name 107115 GND_PAD ALT12 50 IC Pin No ALT1250 IC Symbol Pin Name Type Input/ Output Reset Value IO Domain/ Supply Description Table 4 Pin description If not used, all pins except the following should be left disconnected.
1SC Pin No Module Pin Name Port Signal 20 UART2_RX A UART RX 21 UART2_CTS A UART CTS 22 UART2_TX A UART TX 74 UART2_RTS A UART RTS 43 SPIM0_EN0 C UART RTS 45 SPIM0_MISO C UART RX 46 SPIM0_MOSI C UART TX 94 SPIM0_CLK C UART CTS Table 6 Special UART signals for certification/testing 2.11 Reference Circuit A reference circuit for the Type1SC is provided in [1].
LiPo Battery (3.2 ~ 4.35 V) The battery can supply the entire system (ALT1250 + FEM), without additional external power conditioning circuits. CR17450 Battery (2.2 ~ 3.0 V) The ALT1250 can be fully functional without additional external power conditioning circuits. However, the FEM requires a higher voltage supply, so an external boost circuit is required to supply VBAT_FEM. Boost converter such as TPS61021A may be turned on/off by the DCDC enable signal, AUX_ADC4 (pin 33, active high).
PMU_SHUTDOWN This pin has the highest priority compared to other chip functionalities, therefore asserting it will always force a hard reset 3.4.1.1 External circuitry on PMU_SHUTDOWN There are three use cases for PMU_SHUTDOWN pin connection: 1. Controlled by external host. 2. Controlled by mechanical switch. 3. Not used. 3.4.1.2 PMU_SHUTDOWN connected to external host In this use case it is the responsibility of the host to drive this pin with proper voltage at all times (1.8V/0V).
1SC Pin No Module Pin Name 6 PMU_WAKEUP 32 Direction Description Note HD Device Wake-Up Only needed if low power mode is required PWM0 DH Device reset status 64 PMU_SHUTDOWN HD Modem reset (active low) Optional 71 SC_SWP DH Host Wake-Up Only needed if low power mode is required 72 UART0_RTS DH UART RTS 73 UART0_TX DH UART TX 75 UART0_RX HD UART RX 76 UART0_CTS HD UART CTS Table 8 Host interface signals 6 Antenna Requirements The module has been FCC/IC/ETSI
VSWR recommended ≤ 2:1 (limit requirements) to fulfill all regulatory Maximum permitted antenna gain including cable loss should be determined from Tables 8.1 and 8.2. Failure to follow these guidelines wil result in radiated RF levels that exceed FCC MPE limits. 6.2 Antenna Design The LBAD0XX1SC-DM is configured for monostatic operation, which requires only a single RF I/O pin for full duplex communication. The output must be routed to the antenna via 50 ohm microstrip or stripline on the OEM PCB.
The trace from Pin No. 29 to antenna connector on the OEM PCB must be maintained identical as the above specification with SMA connector. Only trace designs approved with an original grant or through permissive change can be used by an OEM, any changes are deemed as antenna type change and should be reviewed to ensure compliance with the FCC and ISED requirements.
Profile Feature Average ramp-up rate (TL to TP) Preheat – Temperature Min (Tsmin) – Temperature Max (Tsmax) – Time (min to max) (ts) Tsmax to TL – Ramp-up Rate Time maintained above: – Temperature (TL) – Time (tL) Peak Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Time 25°C to Peak Temperature Pb-Free Assembly TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD. TBD Antenna Installation Guidelines Install the antenna in a place covered by the LTE signal.
the Type 1SC antenna pad by means of a transmission line implemented on the PCB. In the case the antenna is not directly connected at the antenna pad of the Type 1SC, then a PCB line is needed in order to connect with it or with its connector. This transmission line shall fulfil the following requirements: Value Item Characteristic Impedance 50 ohm Max Attenuation 0.
8 FCC Notice This device has Single Modular Approval. This device is approved for mobile and fixed use with respect to RF exposure compliance, and may only be marketed to OEM installers. The antenna(s) used for this transmitter, as described in this filing, must be installed to provide a separation distance of at least 20 cm from all persons. Installers and end-users must be provided with operating conditions for satisfying RF exposure compliance.
8.2 ISED Test Data ISED CAT M1 Conducted Max. output EIRP Operation Average Antenna Operation Freq. Power include (ERP) Distance output Gain Mode (MHz) tolerance Limit (cm) power (dBi) (dBm) (dBm) (dBm) Band 2 1850.7 20 22.80 23.00 10.20 33.00 Band 4 1710.7 20 22.97 23.00 7.03 30.00 Band 5 824.7 20 22.46 23.00 8.12 38.45 Band 12 699.7 20 20.85 23.00 7.63 34.77 Band 13 779.5 20 20.71 23.00 7.95 34.77 Band 17 704.1 20 22.94 23.00 7.65 34.77 Band 25 1850.7 20 21.11 23.00 10.52 33.00 Band 26 814.7 20 20.
8.4 Labeling Requirements Any device incorporating this module must include an external, visible, permanent marking or label which states: “Contains FCC ID: HSW-TY1SCDM” and “Contains IC :4492A-TY1SCDM” Obligation d'étiquetage du produit final: Tout dispositif intégrant ce module doit comporter un externe, visible, marquage permanent ou une étiquette qui dit: "Contient IC : 4492A-TY1SCDM” 8.5 Additional Testing Requirements The modular transmitter is only FCC authorized for the specific rule parts (i.
