T 2003 ECHNICAL RAINING Projection Television Technical Training & Troubleshooting Manual V23 V23 WS-48513 WS-55513 WS-65513 WS-73513 V23+ V23++ V23+++ WS-48613 WS-65713 WS-55813 WS-55613 WS-73713 WS-65813 WS-65613 MITSUBISHI ELECTRIC MITSUBISHI DIGITAL ELECTRONICS AMERICA, INC.
T 2003 ECHNICAL RAINING V23 Chassis Projection Television Technical Training & Troubleshooting Manual Copyright © 2003, Mitsubishi Digital Electronics America, Inc.
V23 CHASSIS TECHNICAL TRAINING AND TROUBLESHOOTING MANUAL TABLE of CONTENTS Introduction ... New Technologies Models ............................................................................................................... 1 Features ............................................................................................................... 2 NetCommand™ 3.0 ............................................................................................. 3 Five Format Memory Card Reader ...............
Chapter 5 ... Video/Color Circuitry Overall Block Diagram ....................................................................................... 5-1 PCB-Terminal .................................................................................................... 5-2 PCB-Signal ........................................................................................................ 5-3 RGB CRT Drive & Protect Circuitry ...................................................................
Introduction Series Chassis 48" W Screen 55" W Size 65" W 73" W Gold Gold Plus Platinum Diamond V23 V23+ V23++ V23+++ WS-48513 WS-48613 WS-55513 WS-55613 WS-55813 WS-65513 WS-65613 WS-65713 WS-65813 WS-73513 WS-73713 Table 1: V23 Models The V23 Chassis is carried in the Gold, Gold Plus, Platinum and Diamond series models for 2003 and 2004. This full featured, integrated HDTV chassis represents the latest technologies in CRT based projection television. A breakdown of V23 models is shown in Table 1.
V23 Features Feature 3rd Generation HDTV Receiver Explaination ATSC and Unscrambled QAM Reception Greater Sensitivity NetCommand™ 3.0 Home Theater Control by Firewire or IR Five-Format Memory Card Reader For viewing JPEG digital photos and listening to MP3 or WMA audio recordings. AMVP (Advanced Multimedia Video 8 Screen Formats, Improved Line Doubling and Processor) Noise Reduction FireWire/IEEE1394 Digital Home Networking Interface. DTV-LINK Standard for future FireWire interfaces.
NetCommand 3.0 NetCommand allows most common home theater products to be connected and controlled by way of the TV's remote control by simply selecting onscreen icons. See Figure 1. Figure 1: NetCommand Icons The control interface can be by one of two means. • IEEE1394/Firewire • Infrared (IR Blaster) The 3rd generation of NetCommand offers additional functionality and a simplier user interface. When using the Firewire, NetCommand is "plugand-play.
5 Format Memory Card Reader Digital music and photography can now be enjoyed in the home theater environment thanks to the memory card reader featured in the V23 chassis. When the user inserts a memory card into any one of the four card reader slots on the front of the set, NetCommand will take control, allowing a slide show or giving a music play list.
PerfectColor™ Compatibility Users having difficulties with the memory card reader should be aware of the following requirements: For JPEG Pictures up to 128mb: 1. Still images recorded using the Exchangable Image File Format (EXIF) for digital still cameras and Design Rules for Camera File Systems (DCF). 2. Standard digital images with a maximum size of 5-megapixels (2560x1920). 3. File name maximum of 50 characters ending with a .jpg extension.
MonitorLink™ MonitorLink is a new digital interface introduced in Mitsubishi's 2003-2004 model line, including the V23 chassis. MonitorLink provides a proprietary connection for Mitsubishi's HD-5000, Monitor/Receiver, allowing Mitsubishi's upgradeability promise to be fulfilled using a digital, rather than analog, interface. While MonitorLink is a proprietary connection, it uses industry standard technologies that may provide even more versatility. • RS-232C - Provides device communication and control.
DDC DDWG DMPM DVI-A DVI-D DVI-I EDID HDCP TMDS VESA Acronyms Display Data Channel Digital Display Working Group Digital Monitor Power Management Digital Visual Interface - Analog Digital Visual Interface - Digital Digital Visual Interface - Integrated (Digital or Analog) Extended Display Identification Data High-bandwidth Digital Content Protection Transistion Minimized Differential Signaling Video Electronics Standards Association Table 5 Used with its optional copy protection scheme, DVI makes it possib
Figure 10: Single-Link TMDS Display Data Channel (DDC) The VESA standard Display Data Channel, shown in Figure 10, is part of the DVI specification. It is an I2C bus used for data communications between the two devices. The data can include information specifying the type of display device connected and can also be used to support copy protection.
the host know it is plugged in. When the host device detects a High condition greater than 2.4 VDC (typically 5.0 VDC), it will read the EDID and start operation. If the potential falls below 2.0 VDC the TMDS transmitter is stopped. High-bandwidth Digital Content Protection (HDCP) HDCP is a system designed to protect the outputs of a DVI device from being copied. The protection can be applied in various ways.
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SIGNAL PIN SIGNAL TMDS Data 216 Hot Plug Detect TMDS Data 2+ 17 TMDS Data 0TMDS 2&4 Shield 18 TMDS Data 0+ TMDS Data 4- (NA) 19 TMDS 0&5 Shield TMDS Data 4+ (NA) 20 TMDS Data 5- (NA) DDC Clock 21 TMDS Data 5+ (NA) DDC Data 22 TMDS Clock Shield Analog Vertical Sync (NA) 23 TMDS Clock+ TMDS Data 124 TMDS ClockTMDS Data 1+ C1 Analog Red (NA) TMDS 1&3 Shield C2 Analog Green (NA) TMDS Data 3- (NA) C3 Analog Blue (NA) TMDS Data 3+ (NA) C4 Analog Horizontal Sync (NA) +5.
Figure 13: V23 Chassis DVI Input Block Diagram 11
Chassis Option Menu Adjustment Mode VZ5/VZ6/V15 1-3-7-0 2-3-5-7 VZ7/VZ8/V16 1-2-7-0 1-2-5-7 V17 8-2-7-0 8-2-5-7 VZ9/V18/V19 0-1-7-0 0-1-5-7 V20/VK20 2-2-7-0 2-2-5-7 V21 2-1-7-0 2-1-5-7 K20/V22/V23 0-3-7-0 0-3-5-7 Convergence Mode 2-3-5-9 <6><5><4> 1-2-5-9 <6><5><4> 8-2-5-9 <6><5><4> 0-1-5-9 <6><5><4> 2-2-5-9 <6><5><4> 2-1-5-9 <6><5><4> 0-3-5-9 <6><5><4> Service Menu Access Codes 12 OSD Position Adjust Mode Adjust Mode Adjust Mode Adj. Mode/0-1-8-8 Adjust Mode 2-1-8-8 Adj.
Chapter 1 Disassembly and Service Figure 1-1: Lightbox Removal - 48” Models With 11 different models, mechanical features and disassembly procedures vary in the V23. Since all features and disassembly procedures are in the Service Manual, this chapter will only provide a general discussion.
The lightbox removal procedure for 48” V23 models is shown in Figure 1-1. 1. Remove the Back Board by removing 7 screws (a), 2 screws (b) and 8 screws (c). 2. Remove the Back Cover by removing 8 screws (d). 3 Remove 4 screws (e) to remove the Board Slide. 4. Remove 8 screws (f) to remove the Board Shelves. 5. Remove screw (g) holding the chassis. 6. Remove 4 screws (h) securing the Light Box Assembly. 7.
Figure 1-2: Main Chassis Removal REAR VIEW Step 1 TOP VIEW Step 2 Figure 1-3: DM Replacement 1-3 TOP VIEW Step 3
Figure 1-4: PCB Locations Figure 1-5: Main Component Locations 1-4
PCB-DTV Tuner IR Learning DM Interface DTV Tuner & Demodulator Interface DM PCB-MLINK NetCommand DVI Decoder IEEE1394 RS-232C Interface Card Viewer OSD-Menus Digital uPC Control PCB-Doubler PIP-POP Picture Format 3:2 Pull Down Line Double 480i to 480p PCB-SVM Scan Velocity Modulation (Picture Edge Enhancement) PCB-Terminal A/V Inputs A/V Selection 3D-Y/C NTSC Video Decoders PCB-Signal Control uPC Tuning VCJ Convergence Generator PCB-Power PCB-Main PCB-DBF Power Supplies Horizontal Defl.
V23+++ Composite Cabinet Back The WS-55813 and WS-65813 feature a unique cabinet similar to last year’s WS-65712. It has a composite cabinet back that offers several advantages. • Rounded edges in the back have a modern appearance. • Unit construction gives it high strength. • Low Weight - The 55” version is about 50 lbs lighter and the 65” version is about 100 lbs lighter than comparable models! The disassembly procedure for the cabinet front differs from conventional cabinets.
Chapter 2 Alignment Procedures With the exception of the Service Menu access codes, the general alignment procedures for the V23 chassis remains the same as previous HD chassis. A chart showing all recent Service Menu Access Codes is provided on page 12 of the Introduction. This chapter will give an overview of the following alignment procedures.
MAIN MENU DEFAULT SETTINGS SETUP Edit Setup Review (v) Enabled Antenna A (v) Enabled Antenna B (v) Enabled Input DTV (v) Enabled Input 1 (v) Enabled Input 2 (v) Enabled Input 3 (v) Enabled Component 1 (v) Enabled Component 2 (v) Enabled Antenna DTV (v) Enabled VGA (v) Enabled MonLink (v) Enabled Card 1 (v) Enabled Card 2 (v) Enabled Card 3 (v) Enabled Card 4 Icon Position As above Ant-A, Ant-B, Ant-DTV, ComFlash MemStick, SmartMed, MMC& SD Input-1, Input-2, Input-3, Comp-1, Comp-2, Input DTV, VGA, MonLink,
Circuit Adjustment Mode Most of the adjustments can only be performed using the remote hand unit. See Figure 2-2. Many of the adjustments must be performed in both the 480i and 1080i modes. Video/Color adjustments must be performed in the 480i and 1080i modes, and data must be preset in the 480P (DVD) and VGA modes. Note: Set the Remote Operational Mode to “NetCommand”. (Hold the “Power” button and press “9-3-5” in sequence.) This slows the remote’s response and makes adjustments easier.
Selection of adjustment Functions and Adjustment Items To select an adjustment item in the circuit adjustment mode, first select the adjustment function that includes the specific adjustment item to be selected. Then select the adjustment item. Refer to the following pages for the listing of adjustment functions and adjustment items.
Convergence Adjustment Mode The Convergence mode is used to perform raster geometry correction and convergence adjustments. These adjustments must be made in both the SD (NTSC 480i) and HD (1080i) modes. Note: Before activating the Convergence mode, turn “Video Mute” Off. The internal crosshatch pattern will not be displayed with “Video Mute” On, only a blue background is displayed. Convergence Mode Functions In the Convergence Mode there are three main Functions (Categories).
1) Use AUDIO button to select a Sub Function 2) Use the VIDEO button to select an Adjustment Item. 3) Use the ADJUST buttons to change data. FINE CONV (Press 4) This mode is used to perform Fine Raster Correction, and Fine Red and Blue Convergence Adjustments. There are three Sub Adjustment Functions, selected with the AUDIO button: • FINE GREEN .... a Green Crosshatch is displayed, to make Fine Raster Corrections. • FINE RED .... a White Crosshatch is displayed, to make Fine Red Convergence Adjustments.
Chapter 3 Power Supply From the above diagram, it is apparent that the V23 Chassis has four Power Supply Operational Modes. 1) Low Energy Mode 2) Standard Standby Supply Mode. 3) Time Shift Recording Mode. 4) Conventional PTV On Mode. In the Low Energy Mode the set is booted up each time the TV is switched On. When switched On, the LED will flash for approximately one minute before the TV powers On. Low Energy Mode Activation The Low Energy Mode is activated from the user's Onscreen Menus.
Figure 3-1: User Setup Menu A 132 kHz internal Oscillator drives an internal Output For regulation a sample of the 9VS supply is fed back FET. The signal from the FET at pin 5 of IC9A10, to pin 4 of IC9A10, via D9A14 and PC9A20. drives transformer T9A10. Signal from pin 10 of T9A10 is rectified, generating the 9VS supply. Regulation IC9A10 does not regulate by controlling the PWM of The signal from pin 2 of the transformer is rectified and the oscillator signal.
The 3.3V-ES supplies power to the PTV Control circuit E2PROM, now located on the PCB-TERMINAL. Low Energy Power Distribution Figure 3-4 shows the Low Energy Mode Power Distribution. As stated earlier, the Low Energy 9VS is the source for the 5VS, 3.3V-ES and 3.3VS-1. The 5VS and 3.3VS-1 supplies power to the IC7A00 the PTV Control µPC. The 9VS supply also provides power for the Antenna Relay in the RF Switch.
The Standard Standby Regulator circuit is shown in Figure 3-5. • When oscillation starts, the signal from pin 2 of T9A20 is rectified by D9A22 and added to the start-up voltage to maintain oscillation. Start-up The Start-up Voltage Supply is from R9A18 in the Low Energy Mode circuit, refer to Figure 3-2. The SUBPOWER command from the Control Circuitry activates the Standby Supply. Regulation The secondary 12VS supply is monitored for regulation. A sample of the 12VS is compared to a reference in IC9A21.
Standard Standby Supplies Two Standby supplies are generated directly from T9A20, 12VS and 6VS. Both of these supplies are directed to the DM module, and are denoted as 12VDM and 6V-DM. In addition to being the 6V-DM source, the 6VS supply supplies power for CRT Protect circuitry, and is the source for the 3.3V-1 and 5V-2 supplies. Time Shift Recording Power Supplies. A 30VS supply is derived from the 12VS source using voltage doubler circuitry, comprised of D9A31, D9A32, C9A32 and C9A27.
When PON-1 goes High, Q9A21 turns Off, allowing Q9A20 to turn On. With Q9A20 conducting, the 12V supply is generated from the 12VS supply. The 12V supply enables IC9A22 and the 5V-1 supply is generated. Time Shift Supply Power Distribution Figure 3-8 illustrates the Power Distribution for the Time Shift supplies. The 5V-1 supply is used by the MLink, 3DYC and Signal Select circuitry. It is also the source for the 3.
gence Generator, 3DYC and Signal Select circuitry, and to IC2E65. IC2E65 generates 2.5 Volts for 3DYC. 1) Closing relay K9A50, shorting out current limiting resistor R9A02, refer to Figure 3-2. 2) Activating a Photo Coupler in PC9A50. The 12V supply provides power for Tuners and CRT Protect circuitry. It also is the source of four additional DC Supplies: • 9V-1 for the Signal Select circuitry • 5V-DECOD for the NTSC Decoders. • 9V-2 for CRT Drive, MCS, Signal Select and Doubler circuitry.
Troubleshooting the oscillator drive to the FET. The PWM is automatically changed to maintain a constant 110V source. The most common symptom due to Power Supply problems is "The TV Will Not Turn On". The Flow Chart in Figure 3-11 may be of some help in isolating the cause of a "Won't Turn On Problem". Five supplies are directly generated by signal from T9A50, 210V, 110V, 17V, +24V and -24V.
If the LED does not flash: • Check that the DM board is seated properly. • Check that there is Standby 9VS (Fig. 3-2). • Check that the SUB-POWER command line does not go High (Fig. 3-5). • Chirping sound - check the Standby Regulator, IC9A20 (Fig.3-5). • If it Turns On then Off -Check the ±24V fuses -Check Horizontal Deflection Circuitry.
3-10
Chapter 4 Control Circuitry Even though circuitry is becoming more complex, the same basic requirements must be met for a µPC to operate. As in the two earlier integrated HDTV chassis, V19 and V21, the V23 uses two Microprocessors in the Control circuitry. 1) TV µPC … controlling the analog circuitry. 2) DM µPC … controlling the digital circuitry. Basic µPC Requirements Figure 4-1 illustrates the four basic requirements for the TV µPC operation in the V23. 1) DC Supply … 3.3V-ES and 5VS.
IC7C70 is the Reset IC. A Low from pin 1 resets the TV µPC. IC7C70 is a Watch Dog type of Reset IC that monitors the µPC’s operation. It has an internal counter that is continually reset by pulses from the µPC, input at pin 4 of the IC. If the µPC locks up, no pulses are generated. The counter reaches its maximum count and a reset pulse is output at pin 1 to reset the µPC. we are not showing the details of the DM circuitry. Figure 4-1 shows only the DC supplies and Reset signal going to the DM module.
Input Command Circuitry Both the µPCs have the ability to reset each other if communication is lost. IC7C30 serves as a Reset interface between the two µPCs and the front panel Reset button. If the TV µPC gets no response from the DM, it outputs a High at pin 73 of IC7A00. The High is routed through IC7C30 and drives the DM-RESET input at pin 15 of the TC connector High. Figure 4-3 illustrates the Command Input circuit.
back to the TV µPC over the DM-RXD line. If the commands are for a System 5 component they are directed to the SYS-5 IR Blaster Outputs. IR signals from a Mitsubishi Remote are directed to the RMC input of IC7A00. The signals are filtered, processed and directed over the IR-IN-BUSY line to the SYS-5 µPC on PCB-DTV TUNER. If the SYS-5 circuitry is busy, it holds the IR-IN-BUSY line Low until it is clear to receive data.
Figure 4-4 also shows that the DM Module receives and processes the signals from the Card Reader. Note that the output of the Wide Band Preamp (IR-IN) is also directed to the SYS-5 µPC. This connection was not used in the V19 and V21. It enables the Learning feature. The signals from the units Remote are memorized by the SYS-5 circuitry. µPC Parallel Inputs The parallel inputs to the µPC are status inputs or signals inputs required for control purposes.
SHORT Detect The short Detect circuitry is shown in Figure 4-6 and is the same as in the V19 and V21 chassis. If a short occurs in the + or – 24V supplies, pin 46 on IC7A00 goes Low indicating a short and the TV shuts Off. With -24V shorted, the 12VS supply turns Q9A53 On, pulling the SHORT line Low. If +24V is shorted D9A54 is forward biased and the short line goes Low. X-RAY Protect Refer to Figure 4-7, the X-Ray input is at pin 47 of IC7A00, and is normally High.
Additional IC7A00 Outputs Pin # 42 49 50 51 52 56 57 71 76 80 82 86 87 Name BLNK-CRT PON-2 PON-1 BWC F F31K DEFL-MUTE BLK-EN MUTE SUB MUTE SPKR POWERGOOD MUTE MON SUB POWER Purpose Blanks CRTs during Input &Channel changes. Power ON: (Defl, Conv, HV, etc. circuitry) Power ON: Signal Processing circuitry) Band Width Control for Doubler Output Sets the Free Run Horizontal Frequency Decreases H-Defl DC supply for 31.5 kHz. Decreases H-Defl DC supply during freq. change.
The PerfectColor feature is performed in the Doubler circuit, therefore all signal sources must pass through the Doubler. With DM signal sources, any OSD is already inserted in the signal before it goes to the Doubler. The PerfectColor circuitry can cause incorrect color in the OSD. The DM-BLK signal is directed to the Doubler when the source is Digital, momentarily disabling the PerfectColor during the OSD. ered a status sensor.
Chapter 5 Video/Color Circuitry The above block diagram illustrates the Video/Color circuitry in the V23 chassis. Although initially it looks the same as in the V21, there are differences. The A/V Switch circuitry still selects main and sub picture signals from NTSC signal sources. Although it’s not apparent from the Block Diagram, the NTSC Decoders, Component Switch ICs, and the Doubler circuitry are different.
PCB-TERMINAL Video Path The Component Switch ICs are also new, generic # MM1519XQ. There are two Component Switch ICs on PCB-TERMINAL, and a third one on PCB-SIGNAL, not shown in Figure 5-1. Figure 5-1 illustrates the Video Signal Path on the PCBTERMINAL. The AV-Switch circuitry has not changed, IC2L00 and IC2K00 are the same ICs used in the V21 chassis.
The Sub picture signals from IC2B00 are directed to IC2G00, the Sub Decoder. Switch circuitry in IC2G00 selects Sub picture signals from IC2B00 or the AVSW(2), IC2K00. or the MLINK signal from the MLINK Decoder, or the RGB signal from the DM Module. The output of IC2H01 is applied to the Main Picture inputs to the Doubler circuit. As in previous chassis, the main and sub selected YPbPr signal are direct to the PCB-SIGNAL. Note that the OSD RGB signals from the DM Module are also directed the VCJ, IC2V01.
The outputs of the Doubler circuit, ASIC-Y, ASIC-Pb and ASIC-Pr are directed to the VCJ. The signals are processed in the VCJ and CRT RGB drive signals are output at pins 64, 63, and 62. The conduction of Q2W03 is controlled from two sources: 1) The BLANK-CRT command from the µPC, momentarily blanking the CRTs during channel or input selection changes. 2) The VBLNK line. The logic on the VBLNK line is controlled by Deflection Loss Detection circuitry.
Digital Signal Path put of the Demodulator is the Transport data stream used to modulate the carrier at the station. The basic Digital Signal path was shown in Figure 5-2. Figure 5-4 shows the Digital Path in more detail. Digital signal sources are the DTV/AQM Tuner, 1394 Inputs and the front panel Card Reader. There are two 1394 inputs at the rear of the DM module. A third 1394 input is on the front of the Card Reader.
Monitor Out Circuit the signal from IC2L00 or the DM signal input at pins 24 and 26 of IC2K00. Figure 5-5 shows that the Monitor Output signal source is limited to an NTSC source, or the DM Module. The NTSC Y and C signals from the 3DYC Comb Filter, are directed back to IC2L00. IC2L00 directs the signals to the monitor Inputs of IC2K00. IC2K00 selects If the signal source is from a Component Input, the DTV Input, VGA Input or MLINK Input, no signal is available at the Monitor Outputs.
Chapter 6 Sync, Deflection & High Voltage The Overall Sync, Deflection and Hign Voltage circuitry in the V23 is shown in the Block Diagram at the top of the page. The V23 can display either of two scanning formats, 480p or 1080i. The horizontal scanning frequency for 480p is 31.5 kHz, and 1080i is 33.75 kHz. Sync Select circuitry selects the Main picture sync source. The selected output is used to synchronize the Horizontal and Vertical Deflection Generators.
Sync Signal Path Figure 6-1 illustrates the Sync Signal Path for the Main Picture signals on the PCB-Terminal. IC2K00, IC2A00, IC2B00 and IC2A95 comprise the Main Picture Sync Select Circuitry. Sync must be extracted from NTSC, Composite and Component Format Y Signals. NTSC and Composite signals are 480i scanning format. Component signals can be 480i, 480p or 1080i. IC2F00, the Main NTSC Decoder, extracts horizontal and vertical sync when the source signal is composite or component video.
Figure 6-2 illustrates the Sub Sync Signal Path for the Sub-Picture signals on the PCB-Terminal. It functions the same as the Main Sync Signal Path using different pin sets on the same ICs. The sub sync signals are used by Doubler circuitry for POP/ PIP signal processing. Figure 6-3 shows the sync signal functions performed by the PCN-Signal. It serves to interface the sync signals as follows: • DVI and DM inputs to the PCB-Terminal • Selected Main and Sub sync signals from the Terminal to the Doubler PCBs.
From the flip-flops, sync pulses are directed to the VCJ, IC2V01. Both Horizontal and Vertical Drive Generators are in the VCJ. Horizontal drive is out- 6-4 put at pin 40, and vertical drive is output at pins 52 and 53. The signals are directed to their respective output circuitry on the PCB-MAIN.
Vertical Deflection Figure 6-4 shows the Vertical Deflection circuitry. The Vertical Deflection Generator in the VCJ outputs push-pull type of vertical deflection drive signal. +VDR at pin 53 and –VDR atz pin 52. Both signals are applied to the Vertical Output IC, IC4B01. The amplified output from IC4B01 is directed to the vertical coils in the Deflection Yokes. D4B01 and C4B04 make up the pump-up circuitry.
Horizontal Deflection DC Supply Circuitry The DC supplies for Q5A32 and Q5A31 are derived from Horizontal Deflection DC Supply circuitry. The 31K line from the Control µPC controls the DC voltage for Q5A31. Q5A31 supply voltage is approximately 10 volts higher for the 33.75 kHz scan format (1080i), than that for the 31.5 kHz scan (480p), The H-Deflection DC Supply circuitry is also used to: • Add side pincushion correction, controlled by the EWDRV signal from the VCJ.
The DEFL-MUTE line from the µPC and Q5A08 reduce the DC supply during scan frequency change by the same method. The DC supply for the Horizontal Drive transistor, Q5A32, is derived from the Horizontal Output DC supply through R5A36, R5A37 and Q5A34. In the 31.5 kHz mode, the DC supply for Q5A32 would drop, since the supply for Q5A31 decreases. To prevent this the 31K control line also connects to the base of Q5A35.
HV & HV Regulation Figure 6-8 illustrates the HV and HV Regulation circuitry. Drive from the Horizontal Deflection Output circuitry is applied the HD-IN input of IC5A00. IC5A00 amplifies the signal which is output at pin 1, and through Q5A07 and Q5A09, is applied to the gate of Q5A51. The output of Q5A51 is the drive signal for the Flyback transformer, T5A51. In the Flyback, the signals are stepped up and rectified to generate the HV and Focus voltages for the three CRTs.
DO NOT measure the HV-DC-FB voltage at pin 13 of the T5A51. The meter may load down the internal resistive divider, resulting in excessive HV. X-Ray Protect X-Ray Protect circuitry is the basically the same as in previous models, as shown in Figure 5. The XRay Protect circuit in the V20 monitors three items: 1) Q5A51 (HV Output) current, by monitoring Q5A51 source voltage. 2) Excessive HV, by monitoring the rectified voltage from D5A57.
Q5A20 and its associated circuitry comprise an Arc Protect circuit. If a CRT Arcs this circuitry immediately removes HV Drive. 6-10 If X-Ray Protect shuts the TV Off, pressing the Power button will turn the TV back On (it may shut Off again if the problem still exists). If Arc Protect is activated, the TV must be switched Off before it can be switched back On.
Chapter 7 Convergence Circuitry Figure 7-1: Convergence Circuitry - Overall Block Diagram The Overall Block Diagram in Figure 7-1 shows the the V23 Convergence Circuitry.. A Waveform Generator generates the convergence correction signals timed from horizontal and vertical sync pulses. The correction signals from the Waveform Generator are in a serial digital format. The following Digital/Analog Converter changes the digital signals to analog signals.
Figure 7-2: Convergence Waveform Generator & D/A Converter Waveform Generator & D/A Converter Figure 7-2 illustrates the Convergence Waveform Generator and Digital/Analog Converter circuitry. Horizontal Sync from the doubler circuitry is applied to pin 34 of IC8D00. Vertical Sync is applied to pin 27. From these two signals, IC8D00 generates six Convergence Correction signals, consisting of horizontal and vertical correction signals for each CRT.
Figure 7-3: Low Pass Filter and Summing Amplifiers LPF & Summing Amps Figure 7-3 illustrates the LPF and Summing Amplifiers. The circuitry consists of three ICs, IC8E00, IC8E01 and IC8E02. Each correction signal from IC8D00 goes through two stages of amplification: 1) The first stage is part of the LPF. 2) The second stage is the Summing Amplifier. 7-3 Green horizontal and vertical correction signals are added to the Red and Blue Summing Amplifier inputs.
Figure 7-4: Convergence Output Circuitry Convergence Output Circuitry Figure 7-4 shows the Convergence Output circuitry located on the PCB-Power. The correction signals 7-4 are amplified and directed to the Sub Vertical and Sub Horizontal coils located within their respective red, green and blue Deflection Yokes.
Chapter 8 Sound Circuitry Figure 8-1: Sound Circuitry - Overall Block Diagram The V23 Sound Circuitry is shown above in the Overall Block Diagram, Figure 8-1. The Sound Source Select circuitry selects the sound source for both the main and sub pictures.
Figure 8-2: Overall Sound Circuitry Block Diagram 8-2
Overall Sound Signal Path Digital Audio Output Figure 8-2 illustrates the Overall Sound Circuitry Block Diagram. The AV/SW ICs, IC2L00 and IC2K00, used to select Main and Sub Picture Video/ Color are also used to the select the Sound sources. There is one additional audio output signal in the V23 chassis, External Digital Audio Output on the rear of the DM. This is an AC-3 digital data stream (when available from a digital source). It allows connection to an external A/V Receiver with an AC-3 Decoder.
8-4
Chapter 9 Troubleshooting Tips LED Indications Off Fast Blink for 70 sec. Fast Blink for 70 sec. Fast Blink (Doesn't stop) Slow Blink Conditions Probable Cause After AC is applied No Standby Power or TV µPC not running After AC is applied Normal - DM µPC is booting up.
Error Code Probable Cause 12 No error detected 21 X-Ray Protect 22 Short Protect 23 Loss of Deflection Table 9-2: Error Codes trol may not be in the NetCommand Operational Mode. To put the Remote in the NetCommand Mode: 1) Set the Remote to the TV Layer. 2) Point the Remote away from the TV. 3) Press and Hold the "POWER" button and enter "9-3-5" in sequence.
Copyright © 2003 Mitsubishi Digital Electronics America, Inc.