MeiG_SLM550_Hardware Design Manual MeiG SLM550 Hardware Design Manual Released Date: 2022/07/20 Version Number: V1.02 MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual Important Notice Copyright Notice All rights reserved. MeiG Smart Technology Co., Ltd This manual and all its contents are owned by MeiG Smart Technology Co., Ltd and protected by Chinese laws and relevant copyright laws in applicable international conventions. Without the written authorization of MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual Revision History Revision Date Description V1.00 2021-04-01 First edition V1.01 2021-05-24 V1.02 2022-07-20 MeiG Smart Technology Co., Ltd 1. Module pin distribution diagram 2. The capacity of TF card is modified to support 256GB at most. 3. Update the pin characteristics table 1. Add multiplexing function Table 43. 2. Update microphone receiving circuit Figure 26. 3. BAT_THERM Pull-down resistor correct to 47K 4. Update Table 6. 5.
MeiG_SLM550_Hardware Design Manual SLM550 Hardware Design Guide_V1.02 MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual Foreword Thank you for using the SLM550 module from Meg Smart. This product can provide data communication services. Please read the user manual carefully before use, you will appreciate its perfect function and simple operation method. The company does not assume responsibility for property damage or personal injury caused by improper operation of the user.
MeiG_SLM550_Hardware Design Manual FCC Statement Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designtion.
MeiG_SLM550_Hardware Design Manual In the event that these conditions cannot be met, then the FCC authorization for this module in combination with the host equipment is no longer considered valid and the FCC ID of the module cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization.
MeiG_SLM550_Hardware Design Manual This equipment should be installed and operated with a minimum distance of 40centimeters between the radiator and your body. This module is installed on the host equipment and requires a Permissive Class II Change test if the exposure conditions change. Cet équipementdevrait être installé et actionné avec une distance minimum de 40 centimètres entre le radiateur et votre corps.
MeiG_SLM550_Hardware Design Manual Contents Important Notice ....................................................................................................................................... 1 Revision History ....................................................................................................................................... 2 SLM550 Hardware Design Guide_V1.02................................................................................................. 3 Contents ..............
MeiG_SLM550_Hardware Design Manual 5 6 7 8 9 4.17 Antenna Interface..................................................................................................................... 61 4.17.1 Main Antenna................................................................................................................. 61 4.17.2 DRX Antenna ................................................................................................................. 62 4.17.3 GPS Antenna ............................
MeiG_SLM550_Hardware Design Manual 1 Introduction This document describes the hardware application interface of the module, including the connection of the circuit and the RF interface. It can help users quickly understand the interface definition, electrical performance, and structural dimensions of the module. Combining this document with other application documents, users can quickly use modules to design mobile communication applications. MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual 2 Module overview SLM550 module uses the Qualcomm solution based on Arm Cortex-A53 Quad-core applications processor, with the highest main frequency of 4 * 2.0GHz, and the memory supports Dual-channel LPDDR4X SDRAM. This module is suitable for broadband intelligent wireless communication modules of TD-LTE/FDD-LTE/WCDMA/EVDO/TD-SCDMA/CDMA/GSM network standards.
MeiG_SLM550_Hardware Design Manual System memory 64GB eMMC + 3GB LPDDR4X compatible with 32GB+2GB OS Android 11 Size 40.5x40.5x2.8mm，LCC 146pin+LGA 128pin Wi-Fi IEEE 802.11b/g/n 2.4G 802.11a/n/ac 5G Bluetooth BT 4.2/5.0 FM No support GNSS GPS/Beidou/Glonass Data Access TD-LTE Cat4 TD-LTE 117/30Mbps FDD-LTE Cat4 FDD-LTE 150/50Mbps DC-HSPA+ 42/11.2Mbps TD-HSPA 2.8/2.3Mbps EVDO Rev.A 3.1/1.8Mbps EDGE Class12, 236.8kbps/236.8kbps GPRS Class12, 85.6kbps/85.
MeiG_SLM550_Hardware Design Manual Key (Power on/off, Reset , Home, Volume+, Volume-) Input Device Capacitive TP Reset Application interface Support HW reset Interface name Main function description VBAT 4pin，Power input，3.4V～4.2V，Nominal value3.
MeiG_SLM550_Hardware Design Manual ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ baseband chip power management chip Transceiver chip WCN3950-WIFI/BT Two in one chip Antenna interface LCD/CAM-MIPI interface EMCP memory chip AUDIO interface UART, SD card interface，SIM card interface，I2Cinterface,etc. ANT_MAIN ANT_GNSS ANT_DIV PAM SAW Switch SAW Duplex WIFI&BT LNA Duplex SAW PA 5G 2.
MeiG_SLM550_Hardware Design Manual 3 Module Package 3.
MeiG_SLM550_Hardware Design Manual 3.2 Pin definitions Table 2 Pin description Pin number Pin number I/O Description Comment The power supply VBAT 1, 2, 145, 146 I The module provides Four VBAT power pin pins. The SLM550 operates from a single supply with a voltage range from 3.4V to 4.2V for VBAT. VBUS 141, 142 I/O 5V charging input power. When the VBAT of the system power is absent, the external backup battery provides power to the system real-time clock.
MeiG_SLM550_Hardware Design Manual 88, 89, 120, 122, 130, 132, 135, 140, 143, 144, 149, 162, 171, 172, 176, 187~191, 202~204 206~224, 226~231 233~238, 240, 241, 243, 244, 245, 247, 248, 250, 251, 255, 256, 258, 259, 261, 266, 268, 269, 271~274 display interface (MIPI) DSI_CLK_N 52 I/O MIPI_LCD clock DSI_CLK_P 53 I/O DSI_LN0_N 54 I/O DSI_LN0_P 55 I/O DSI_LN1_N 56 I/O DSI_LN1_P 57 I/O MIPI_LCD data DSI_LN2_N 58 I/O DSI_LN2_P 59 I/O DSI_LN3_N 60 I/O DSI_LN3_P 61 I/O GPIO82_LCD0_R
MeiG_SLM550_Hardware Design Manual GPIO12_DBG_UART_ TX GPIO13_DBG_UART_ RX 94 I UART5 data receive 93 O UART5 data transmit GPIO69_UART2_TXD 34 I UART2 data receive GPIO70_UART2_RXD 35 O UART2 data transmit GPIO4_UART2_CTS 36 I GPIO5_UART2_RTS 37 O GPIO79_UIM1_DET 22 I UIM1 insert detect UIM1_RESET 23 O UIM1 reset UIM1_CLK 24 O UIM1 clock UIM1_DATA 25 I/O UIM1 data GPIO75_UIM2_DET 17 I UIM2 insert detect UIM2_RESET 18 O UIM2 reset UIM2_CLK 19 O UIM2 clock UI
MeiG_SLM550_Hardware Design Manual CSI0_LN3_P GPIO27_SCAM_MCL K2 GPIO24_SCAM_RST_ N GPIO26_SCAM_PWD N 200 I/O 75 I/O Front Camera main clock 81 I/O Front Camera reset 82 I/O Front Camera dormancy 63 I/O Rear Camera CSI1_CLK_N Rear Camera MIPI clock CSI1_CLK_P 64 I/O CSI1_LN0_N 65 I/O CSI1_LN0_P 66 I/O CSI1_LN1_N 67 I/O CSI1_LN1_P 68 I/O Rear Camera MIPI data CSI1_LN2_N 72 I/O CSI1_LN2_P 73 I/O CSI1_LN3_N 70 I/O CSI1_LN3_P 71 I/O 74 I/O Rear Camera main clock 79
MeiG_SLM550_Hardware Design Manual MIC_BIAS2 155 O The BIAS voltage of the earphone MIC is used in the design of silicon wheat CDC_HPH_R 136 O Right channel of earphone CDC_HPH_L 138 O Left channel of earphone CDC_HSDET_L 139 I Headphone plug and unplug detection CDC_HPH_REF 137 I Earphone reference GND EAR_P 8 O Earpiece output negative EAR_M 9 O Earpiece output positive LINE_OUT_P 10 O LINE _OUT_M 11 O 45 I/O SD card insertion detection 40 I/O SD CMD SDC2_SDCARD_CL
MeiG_SLM550_Hardware Design Manual GPIO6_TP_I2C3_SDA 48 I/O GPIO7_TP_I2C3_SCL 47 I/O GPIO0 167 I/O Universal I2C signal, which is used by default for TP Pullup to VREG_L15_1P8 Universal I2C signal GPIO1 168 I/O TP GPIO6_TP_I2C3_SDA GPIO7_TP_I2C3_SCL GPIO80_TP_INT_N GPIO71_TP_RESET_ N GPIO6_TP_I2 C3_SDA GPIO7_TP_I2 C3_SCL GPIO80_TP_I NT_N GPIO71_TP_ RESET_N I/O I/O Universal I2C signal, which is used by default for TP I TP interrupt O TP reset Pullup to VREG_L15_1P8 USB USB_HS_DM 13
MeiG_SLM550_Hardware Design Manual The default configuration is G-sensor interrupt The default configuration is Ps-sensor interrupt signal The default configuration is the gyroscope interrupt signal.
MeiG_SLM550_Hardware Design Manual Generic GPIO, without default configuration Generic GPIO, without default configuration GPIO107 113 I/O GPIO114 124 I/O PM_GPIO4 123 I/O Configure as output only GPIO_38 106 I/O Configure as output only PM_GPIO7 177 I/O Configure as output only GPIO106 112 I/O GPIO98 104 I/O GPIO99 103 I/O GPIO112 169 I/O GPIO102 90 I/O GPIO31 97 I/O GPIO62_RFFE5_CLK 260 I/O GPIO61_RFFE5_DAT A 262 I/O GRFC only used for RF Tuner，control，not for g
MeiG_SLM550_Hardware Design Manual BATT_THERM 134 I Battery temperature detection, Battery terminal NTC resistance default 10K).
MeiG_SLM550_Hardware Design Manual Table 3 Pin Characteristics Pad characteristics Functional description VBAT PI,PO Battery,3.5V-4.2V,default 3.8V 2 VBAT PI,PO Battery,3.5V-4.2V,default 3.
MeiG_SLM550_Hardware Design Manual 23 UIM1_RESET B-PD:nppukp Configurable I/O,UIM1 reset 24 UIM1_CLK B-PD:nppukp Configurable I/O,UIM1 clock 25 UIM1_DATA B-PD:nppukp Configurable I/O,UIM1 data 26 VREG_L18_UIM1 PO PMIC output for UIM1 27 GND GND GND 28 PM_VIB_DRV_P PO Haptics driver output negative 29 PWM AO-Z,DI,DO Configurable MPP,PWM,ADC 30 GPIO80_TP_INT_N GPIO80* B-PD:nppukp Configurable I/O,TP INT 31 GPIO71_TP_RESET _N GPIO71 B-PD:nppukp Configurable I/O,TP RESET 3
MeiG_SLM550_Hardware Design Manual 47 48 49 GPIO7_TP_I2C3_SC L GPIO6_TP_I2C3_SD A GPIO82_LCD_RESE T_N GPIO7 B-PD:nppukp Configurable I/O,TP I2C SCL GPIO6* B-PD:nppukp Configurable I/O,TP I2C SDA GPIO82 B-PD:nppukp Configurable I/O, LCD RESET GPIO81 B-PD:nppukp Configurable I/O, LCD TE GND 50 GPIO81_LCD_TE0 51 GND GND 52 MIPI_DSI0_CLK_M AI,AO 53 MIPI_DSI0_CLK_P AI,AO 54 55 56 57 58 59 60 61 MIPI_DSI0_LANE0_ M MIPI_DSI0_LANE0_ P MIPI_DSI0_LANE1_ M MIPI_DSI0_LANE1_ P MIPI_DSI0_LANE2_
MeiG_SLM550_Hardware Design Manual 71 72 73 74 75 MIPI_CSI1_LANE3_ P MIPI_CSI1_LANE2_ M MIPI_CSI1_LANE2_ P GPIO21_MCAM_MC LK0 GPIO27_SCAM_MCL K2 AI,AO AI,AO AI,AO MIPI camera serial interface 1 lane3+ MIPI camera serial interface 1 lane2MIPI camera serial interface 1 lane2+ GPIO21 B-PD:nppukp Configurable I/O,main CAM MCLK GPIO27* B-PD:nppukp Configurable I/O,front CAM MCLK 76 GND GND GND 77 RF_WIFI/BT AI RF signal for WIFI/BT 78 GND GND GND 79 80 81 82 83 84 GPIO19_MCAM_RS T_N GPIO2
MeiG_SLM550_Hardware Design Manual 95 96 GPIO96_KEY_VOL_ UP_N GPIO97_KEY_VOL_ DOWN_N GPIO96* B-PD:nppukp Configurable I/O,KEY VOL+ GPIO97* B-PD:nppukp Configurable I/O,KEY VOL- 97 GPIO31 GPIO31* B-PD:nppukp Configurable I/O 98 GPIO36 GPIO36* B-PD:nppukp Configurable I/O 99 GPIO103 B-PD:nppukp Configurable I/O 100 PM_GPIO1 B-PD:nppukp Only Configurable Out 101 GPIO100 GPIO100 B-PD:nppukp Configurable I/O 102 GPIO101 GPIO102 * B-PD:nppukp Configurable I/O 103 GPIO99 GPIO
MeiG_SLM550_Hardware Design Manual 119 GPIO15 120 B-PD:nppukp Configurable I/O, SPI MOSI GND GND GND 121 RF_GPS AI RF signal for GPS ANT 122 GND GND GND 123 PM_GPIO4 PM_GPI O4* B-PD:nppukp Only Configurable Out 124 GPIO114 GPIO114 B-PD:nppukp Configurable I/O 125 NC 126 VCOIN AI,AO Coin-cell battery or backup battery 127 CHARGE_SEL AI Charger select 128 ADC AO-Z,AI,DO Configurable MPP,PWM,ADC 129 VREG_L20_2P85 PO PMIC output 2.
MeiG_SLM550_Hardware Design Manual 144 GND GND GND 145 VBAT PI,PO Battery,3.5V-4.2V,default 3.8V 146 VBAT PI,PO Battery,3.5V-4.2V,default 3.8V 147 MIC_BIAS1 AO Microphone bias #1 148 MIC_IN3_P AI Microphone 3 input plus 149 GND GND GND 150 MIC_BIAS3 Microphone bias #3 151 USB_SS_RX1_M USB 3.1 152 USB_SS_RX1_M USB 3.
MeiG_SLM550_Hardware Design Manual 168 GPIO1 B-PD:nppukp Configurable I/O, I2C2 SCL 169 GPIO112 B-PD:nppukp Configurable I/O 170 GPIO_37 B-PD:nppukp Only Configurable Out 171 GND GND GND 172 GND GND GND 173 FLASH_LED1 Reserved 174 NC Reserved 175 NC Reserved 176 GND 177 GPIO90 178 MIC1_INM Reserved 179 MIC2_INM Reserved 180 MIC3_INM Reserved 181 NFC_CLK DO NFC CLK 182 NFC_CLK_REQ DO-Z,DI Configurable I/O, NFC CLK REQ 183 VPH_PWR Reserved 184 VPH_PWR Re
MeiG_SLM550_Hardware Design Manual 193 NC 194 GNSS_LNA_EN 195 CHG_LED AO 196 MIPI_CSI0_CLK_P AI,AO 197 198 199 200 GPIO63 MIPI_CSI0_LANE0_ P MIPI_CSI0_LANE1_ P MIPI_CSI0_LANE2_ P MIPI_CSI0_LANE3_ P 201 GPIO111 202 B-PD:nppukp AI,AO AI,AO AI,AO AI,AO Configurable I/O, GNSS_LNA_EN Current sink for charging indication MIPI camera serial interface 0 clock+ MIPI camera serial interface 0 lane0+ MIPI camera serial interface 0 lane1+ MIPI camera serial interface 0 lane2+ MIPI camera serial inter
MeiG_SLM550_Hardware Design Manual 217 GND GND GND 218 GND GND GND 219 GND GND GND 220 GND GND GND 221 GND GND GND 222 GND GND GND 223 GND GND GND 224 GND GND GND 225 RESET_N DI KEY RESET 226 GND GND GND 227 GND GND GND 228 GND GND GND 229 GND GND GND 230 GND GND GND 231 GND GND GND 232 USB0_SS_TX1_P 233 GND GND GND 234 GND GND GND 235 GND GND GND 236 GND GND GND 237 GND GND GND 238 GND GND GND 239 PM_GPIO8 B-PD:nppukp
MeiG_SLM550_Hardware Design Manual 242 USB_CC2 243 GND GND GND 244 GND GND GND 245 GND GND GND 246 NC 247 GND GND GND 248 GND GND GND 249 NC 250 GND GND GND 251 GND GND GND 252 USB0_SS_TX0_P Reserved 253 USB0_SS_RX0_M Reserved 254 USB0_SS_RX0_M Reserved 255 GND GND GND 256 GND GND GND 257 USB0_SS_TX1_M 258 GND GND GND 259 GND GND GND 260 GPIO62_RFFE5_CL K B-PD:nppukp Configurable I/O,RFFE5 CLK 261 GND GND GND 262 GPIO61_RFFE5_DA TA B-PD
MeiG_SLM550_Hardware Design Manual 267 GPIO104 268 GPIO104 * B-PD:nppukp Configurable I/O GND GND GND 269 GND GND GND 270 USB0_SS_TX0_M 271 GND GND GND 272 GND GND GND 273 GND GND GND 274 GND GND GND Reserved *: Wake-up system interrupt pin B: Bidirectionaldigital with CMOS input H: High-voltage tolerant NP: pdpukp=defaultno-pull with programmable options following the colon (:) PD: nppukp=defaultpulldown with programmable options following the colon (:) PU: nppdkp=defaultpu
MeiG_SLM550_Hardware Design Manual Figure 6 Module 3D size（unit ：mm） Figure 7 Recommended PCB package size（unit ：mm） MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual 4 Interface application 4.1 Power Supply In the case of a battery device, the voltage input range of the module VBAT is 3.4V to 4.2V, and the recommended voltage is 3.8V. In the GSM band, when the module is transmitting at maximum power, the peak current can reach up to 3A, resulting in a large voltage drop on VBAT. It is recommended to use a large capacitor regulator close to VBAT. It is recommended to use two 47uF ceramic capacitors.
MeiG_SLM550_Hardware Design Manual Note： If the user does not use battery power, please note that a 47K resistor is connected to the 134 pin (BAT_THERM) of the module and pulled down to GND to prevent the software from judging the abnormal battery temperature after the module is turned on, resulting in shutdown. The connection diagram is as follows: R5 47K Figure 10 Connection diagram when not powered by battery The user can directly use a 3.
MeiG_SLM550_Hardware Design Manual follows; or the CBL_PWR_N pin (186) is pulled low. CBL_PWR_N can be powered on by 10K pull-down resistor to GND. It does not need to release this signal after booting. Figure 12 Using an external signal to drive the module to boot Figure 13 Booting with the button circuit The following figure is the boot timing description: Figure 14 Using PWRKEY boot timing diagram MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual 4.2.2 Module Shutdown Users can use the PWRKEY pin to shut down. 4.2.2.1 PWRKEY Shutdown The user can turn off the PWRKEY signal by pulling it down for at least 3 seconds. The shutdown circuit can refer to the design of the boot circuit. After the module detects the shutdown action, a prompt window pops up on the screen to confirm whether to perform the shutdown action.
MeiG_SLM550_Hardware Design Manual not possible to directly use the GPIO of the MCU to drive the pin. An isolation circuit is required. The hardware parameters of the RESET(225) can refer to the following table: Table 4 RESET Hardware Parameters Pin RESET_N Description Minimum Typical Maximu m Unit Input high level 1 - - V Input low level - - 0.65 V Pull down effective time 500 - ms 4.3 VCOIN Power When VBAT is disconnected, the user needs to save the real-time clock.
MeiG_SLM550_Hardware Design Manual Rechargeable battery powered: Figure 19 Rechargeable Battery Powers RTC Note: This VCOIN power supply is 2.0-3.25V, typical typically 3.0V 4.4 Power Output The SLM550 has multiple power outputs. For LCD, Camera, touch panel, etc. In application, it is recommended to add parallel 33PF and 10PF capacitors to each power supply to effectively remove high frequency interference. Table 5 Power Description Signal Default Voltage(V) Drive Current(mA) VREG_L15_1P8 1.
MeiG_SLM550_Hardware Design Manual 4.5 Serial Port The SLM550 provides three serial ports for communication. And corresponding to one groups of I2C interfaces can be multiplexed into hardware flow control, note that the I2C interface can not be added to the UART_RTS/CTS when the pull resistor can be added.
MeiG_SLM550_Hardware Design Manual When the serial level used by the user does not match the module, in addition to adding the level shifting IC, the following figure can also be used to achieve level matching. Only the matching circuits on TX and RX are listed here. Other low speed signals can refer to this two circuits.
MeiG_SLM550_Hardware Design Manual Input low level - 0.45 V Input high level 1.35 - V Note: 1. The serial port of the module is a CMOS interface, and the RS232 signal cannot be directly connected. If necessary, please use the RS232 conversion chip. 2. If the 1.8V output of the module cannot meet the high level range of the user terminal, please add a level shifting circuit. 4.6 MIPI Interface The SLM550 supports the Mobile Industry Processor Interface (MIPI) interface for Camera and LCD.
MeiG_SLM550_Hardware Design Manual MIPI_DSI0_LANE3_M 60 I/O MIPI_DSI0_LANE3_P 61 I/O MIPI_DSI0_LANE2_M 58 I/O MIPI_DSI0_LANE2_P 59 I/O GPIO82_LCD_RESET_N 49 O LCD reset pin GPIO81_LCD_TE0 50 I/O LCD frame sync signal VREG_L20_2P85 129 O 2.8V power supply LCD_ID of the module, this pin is internally GPIO. When used as LCD_ID, please confirm the internal circuit of LCD.
MeiG_SLM550_Hardware Design Manual PMIC does not support backlight drive. LCD backlight driver circuit needs to be added by customers. Please refer to the following figure for specific circuit Figure 24 Backlight drive schematic 4.6.2 MIPI Camera Interface The SLM550 module supports the MIPI interface Camera and provides a dedicated camera power supply. The main camera is a CSI1 interface that supports four sets of data lines and can support up to 13M pixels.
MeiG_SLM550_Hardware Design Manual MIPI_CSI1_LANE2_P 73 I/O MIPI_CSI1_LANE3_M 70 I/O MIPI_CSI1_LANE3_P 71 I/O GPIO21_MCAM_MCLK0 74 O Main camera clock signal GPIO19_MCAM_RST_N 79 O Main camera reset signal GPIO25_MCAM_PWDN 80 O Main camera sleep signal GPIO29_CAM_I2C_SDA0 84 I/O I2C data GPIO30_CAM_I2C_SCL0 83 I/O I2C clock Extra LDO VREG_L20_2P85 1.8V IOVDD 129 O 2.8V AFVDD Extra LDO 2.8V AVDD Extra LDO 1.2V DVDD Extra LDO 1.
MeiG_SLM550_Hardware Design Manual MIPI_CSI0_LANE3_P 200 I/O GPIO27_SCAM_MCLK2 75 O Sub camera clock signal GPIO24_SCAM_RST_N 81 O Sub camera reset signal GPIO26_SCAM_PWDN 82 O Sub camera sleep signal GPIO29_CAM_I2C_SDA0 84 I/O I2C data GPIO30_CAM_I2C_SCL0 83 I/O I2C clock Extra LDO 1.8V IOVDD Extra LDO 2.8V AVDD VREG_L20_2P85 129 Extra LDO O 2.8V AFVDD 1.
MeiG_SLM550_Hardware Design Manual Figure 26 MIPI Camera Reference Circuit MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual Important note: When designing the camera function, you need to pay attention to the position of the connector. There will be a small person in the specification of the camera to indicate the imaging direction. You need to ensure that the villain is standing on the long side of the LCD, otherwise the camera will be flipped. The software cannot be adjusted at 90°. As shown in the two figures below. SIM 卡座 SIM 卡座 Figure 27 Camera imaging diagram 4.
MeiG_SLM550_Hardware Design Manual Note: The interface definition of the capacitive touch can be adjusted by software, and the user can change the GPIO and I2C according to the design needs. 4.8 Audio Interface The module provides three analog audio inputs, MIC_IN1_P for the main microphone, MIC_IN2_P for the microphone, and MIC_IN3_P for the noise reduction microphone. The module also provides three analog audio outputs (HPH_L/R, REC_P/N, LINE_OUT_P/N).
MeiG_SLM550_Hardware Design Manual LINE_OUT_M 11 O Amplifier (0.7W) output negative LINE_OUT _P 10 O Amplifier (0.7W) output positive Users are advised to use the following circuit according to the actual application to get better sound effects. 4.8.1 Receiver Interface Circuit Module Figure 28 Receiver Interface Circuit 4.8.2 Microphone receiving Circuit The figure below shows the interface circuit of MEMS microphone. Figure 29 Microphone Differential Interface Circuit 4.8.
MeiG_SLM550_Hardware Design Manual The module integrates a stereo headphone jack. Users are advised to reserve ESD devices during the design phase to prevent ESD damage. The HS_DET pin of the module can be set as an interrupt. In software, this pin is the earphone interrupt by default. The user can use this pin to detect the plugging and unplugging of the earphone. Figure 30 Headphone Interface Circuit Note: 1. The earphone holder in Figure 4.24 is normally closed.
MeiG_SLM550_Hardware Design Manual GPIO101 102 I I2S1 Input DATA GPIO98 104 O I2S1_ SLK 4.9 USB Interface The SLM550 supports a USB 2.0 High speed interface (Type-C optional). It must control the 90 ohm differential impedance during Layout and control the external trace length. The module supports OTG function. The voltage input range during charging is as follows: Table 12 Voltage input range during charging Name Description Minimum Typical Maximu m Unit VBUS Input range 4 - 6.
MeiG_SLM550_Hardware Design Manual MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual 4.9.1 USB OTG The SLM550 module can provide USB OTG function. The pins used in this function are as follows: Table 13 USB OTG Pin Description Pin name Pin Description VBUS 141, 142 5V charging input / OTG output power. USB_HS_DM 13 USB Date- USB_HS_DP 14 USB Date+ USB_HS_ID 16 USB ID The recommended circuit diagram of USB OTG is as follows: Figure 32 USB-OTG Connection Diagram 4.10 Charging Interface The SLM550 module integrates a 2A charging solution.
MeiG_SLM550_Hardware Design Manual charging current gradually decreases, the charging current drops to about 100mA, and the charging is stopped. Figure 33 Charging diagram 4.10.1 Charging Detection When the VBUS pin voltage is higher than 4.0V, a hardware interrupt will be generated inside the module. The software determines whether the charger is inserted or the USB data cable is inserted by judging the status of USB_DP/USB_DM. 4.10.
MeiG_SLM550_Hardware Design Manual PM4125 Figure 34 Charging circuit connection diagram 4.11 UIM Card Interface The SLM550 can support two SIM cards at the same time to achieve dual card dual standby. Support SIM card hot swap, can automatically recognize 1.8V and 3.0V cards. The figure below is the SIM recommended interface circuit. In order to protect the SIM card, it is recommended to use TVS devices for electrostatic protection.
MeiG_SLM550_Hardware Design Manual 4.12 SD Card Interface SLM550 supports SD card interface. The reference circuit is as follows: Figure 36 SD Card Interface Circuit 4.13 I2C Bus Interface The SLM550 module supports five hardware I2C bus interfaces include two camera-specific CCI interface.
MeiG_SLM550_Hardware Design Manual GPIO6_TP_I2C3_SDA 48 General purpose I2C, default for TP GPIO7_TP_I2C3_SCL 47 GPIO0 167 Universal I2C GPIO1 168 Note: To use the 2.2KΩ pull-up resistor to 1.8V. Gpio109 / 110 can only be used to connect sensor devices in Qualcomm QVL, no other devices. 4.14 Analog to Digital Converter (ADC) The SLM550 module provides two MPP function signals from the power management chip: PWM (29PIN) and ADC (128PIN), MPP can be configured as an ADC or PWM signal.
MeiG_SLM550_Hardware Design Manual 4.16 Motor The SLM550 supports motor functions and can be implemented by the user via PM_VIB_DRV_N (28PIN). The reference schematic diagram is as follows. Note that the uF-level capacitor cannot be placed on the signal line. Figure 37 Motor interface circuit 4.17 Antenna Interface The module provides four antenna interfaces: MAIN antenna, DRX antenna, GPS antenna and WiFi/BT antenna.
MeiG_SLM550_Hardware Design Manual In the figure, R101, C101, and C102 are antenna matching devices, and the specific component values can be determined after the antenna factory debugs the antenna. Among them, R101 defaults to 0R, C101 and C102 do not paste by default.
MeiG_SLM550_Hardware Design Manual If there are fewer components between the antenna and the module output, or if the RF test head is not needed in the design, the antenna matching circuit can be simplified as shown below: Figure 41 DRX Antenna Interface Simplified Connection Circuit In the above figure, R102 defaults to 0R, C103 and C104 are not attached by default. 4.17.3 GPS Antenna The module provides the GNSS antenna pin RF_GPS.
MeiG_SLM550_Hardware Design Manual Figure 43 WiFI_BT antenna interface connection circuit In the figure, R301, C301, and C302 are antenna matching devices, and the specific component values can be determined after the antenna factory debugs the antenna. Among them, R301 defaults to 0R, C301 and C302 do not paste by default.
MeiG_SLM550_Hardware Design Manual 5 PCB Layout The performance of a product depends largely on the PCB trace. As mentioned above, if the PCB layout is unreasonable, it may cause interference problems such as card loss. The way to solve these interferences is often to redesign the PCB. If you can plan a good PCB layout in the early stage, the PCB traces smoothly, saving a lot of time. Of course, it can also save a lot of costs.
MeiG_SLM550_Hardware Design Manual away from high-speed signal lines and strong interference sources to avoid crossing or parallel with any signal lines in adjacent layers. The length of the RF cable between the antenna pin of the module and the antenna connector should be as short as possible. The situation of crossing the entire PCB should be absolutely avoided.
MeiG_SLM550_Hardware Design Manual much as possible. The MIPI interface selects a small-capacity TVS when selecting an ESD device. It is recommended that the parasitic capacitance be less than 1pF. ⚫ ⚫ ⚫ ⚫ ⚫ The MIPI routing requirements are as follows: The total length of the cable does not exceed 305mm It is required to control 100 ohm differential impedance with an error of ±10%. The error of the differential line length within the group is controlled within 1mm.
MeiG_SLM550_Hardware Design Manual The conducted interference is mainly caused by the voltage drop of VBAT. If the Audio PA is directly powered by VBAT, it is easier to hear the “zizi” sound at the SPK output. Therefore, it is better to connect in parallel with the input of the Audio PA in the schematic design. Some large capacitance capacitors and series magnetic beads. The conducted interference is also strongly related to TDD and GND.
MeiG_SLM550_Hardware Design Manual 6 Electrical, Reliability 6.1 Absolute Maximum The table below shows the absolute maximum values that the module can withstand. Exceeding these limits can cause permanent damage to the module. Table 17 Absolute Maximum Parameter Minimum Typical Maximum Unit VBAT - - 6 V VBUS - - 10.5 V Peak current - - 3 A 6.
MeiG_SLM550_Hardware Design Manual 6.4 Digital Interface Features Table 20 Digital Interface Features (1.8V) Parameter Description Minimum Typical Maximum Unit VIH Input high level voltage 1.17 - - V VIL Input low level voltage - - 0.63 V VOH Output high level voltage 1.35 - - V VOL Output low level voltage - - 0.45 V Minimum Typical Maximum - 3 - 6.5 SIM_VDD Characteristics Table 21 SIM_VDD Characteristics Parameter VO IO Description Output voltage Unit V - 1.
MeiG_SLM550_Hardware Design Manual 6.7 VCOIN Feature Table 23 VCOIN Characteristics Parameter Description Minimum Typical Maximum Unit VCOIN-IN VCOIN input voltage 2 3 3.25 V IRTC-IN VCOIN Current consumption - 3 uA VCOIN-OUT VCOIN Output voltage - - V IRTC-OUT VCOIN Output current - 2 mA 3 6.8 Current Consumption (VBAT = 3.
MeiG_SLM550_Hardware Design Manual Imax Peak current Power control at maximum output power - - 3 A 6.9 Electrostatic Protection The module is not specifically protected against electrostatic discharge. Therefore, users must pay attention to electrostatic protection when producing, assembling, and operating modules. 6.10 Module Operating Frequency Band The table below lists the operating frequency bands of the module and complies with the 3GPP TS 05.05 technical specification.
MeiG_SLM550_Hardware Design Manual TX: 19200~19949 LTE B3 1805～1880 MHz 1710～1785 MHz RX: 1200~1949 TX: 20400～20649 LTE B5 869～894MHz 824～849MHz RX: 2400~2649 TX: 21450～21799 LTE B8 925～960MHz 880～915MHz RX: 3450~3799 LTE B34 2010～2025 MHz 2010～2025 MHz 36200～36349 LTE B38 2570～2620 MHz 2570～2620 MHz 37750～38249 LTE B39 1880～1920 MHz 1880～1920 MHz 38250～38649 LTE B40 2300～2400 MHz 2300～2400 MHz 38650～39649 LTE B41 2496～2690 MHz 2496～2690 MHz 39650～41589 Note: The SLM550's LTE T
MeiG_SLM550_Hardware Design Manual 6.12 Module Conduction Receiving Sensitivity The table below lists the conducted receive sensitivity of the module and is tested under static conditions. Table 27 Conducted Receive Sensitivity Frequency band Receive sensitivity (typical) Receive sensitivity (maximum) GSM850, EGSM900 <-108dBm 3GPPrequirements DCS1800 <-108dBm 3GPPrequirements WCDMAB1 <-109 dBm 3GPPrequirements WCDMAB5 <-109 dBm 3GPPrequirements CDMABC0 <-110 dBm 3GPPrequirements TDSCDMA1.
MeiG_SLM550_Hardware Design Manual 9 - - -99 -96 -94.2 -93 FDD 10 - - -100 -97 -95.2 -94 FDD 11 - - -100 -97 FDD 12 -101.7 -98.7 -97 -94 FDD -97 -94 FDD - -97 -94 FDD FDD 13 14 ... 17 - - -97 -94 18 - - -1007 -977 -95.27 - FDD 19 - - -100 -97 -95.2 - FDD 20 -97 -94 -91.2 -90 FDD 21 -100 -97 -95.2 22 -97 -94 -92.2 -91 FDD -100 -97 -95.2 -94 FDD -100 -97 23 -104.7 -101.7 24 FDD FDD 25 -101.2 -98.2 -96.5 -93.5 -91.
MeiG_SLM550_Hardware Design Manual 37 - - -100 -97 -95.2 -94 TDD 38 - - -100 -97 -95.2 -94 TDD 39 - - -100 -97 -95.2 -94 TDD 40 - - -100 -97 -95.2 -94 TDD 41 - - -98 -95 -93.2 -92 TDD 6.13 WIFI Main RF Performance The table below lists the main RF performance under WIFI conduction. Table 29 Main RF performance parameters under WIFI conduction Transmission performance(2.4G) 802.11B 802.11G 802.11N Transmit power (minimum rate) 19 16.
MeiG_SLM550_Hardware Design Manual Minimum rate -89 -88.5 -88.5 dBm Maximum rate -74.5 -73 -67.5 dBm Note: At the time of 5G plus FEM, the power under various standard modes was increased by 3DB, and the Receiving sensitivityn was increased by 1.5db. 6.14 BT Main RF Prformance The table below lists the main RF performance under BT conduction. Table 30 Main RF performance parameters under BT conduction Transmission performance DH5 2DH5 3DH5 10 6 6 DH5 2DH5 3DH5 -94.5 -94.
MeiG_SLM550_Hardware Design Manual 7 Production 7.1 Top And Bottom Views Of The Module Figure 45 Module top and bottom views MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual 7.2 Recommended Soldering Furnace Temperature Curve Figure 46 Module recommended soldering furnace temperature curve 7.3 Humidity Sensitivity (MSL) The SLM550 module meets moisture sensitivity level 3. The dry package is subjected to the J-STD020C specification in accordance with the IPC/JEDEC standard under ambient conditions of temperature <30 ℃ and relative humidity <60%.
MeiG_SLM550_Hardware Design Manual After unpacking, the SMT patch should be taken within 168 hours under ambient conditions of <30 ℃ and relative humidity <60%. If the above conditions are not met, baking is required. Note: Oxidation risk: Baking SMD packages can cause metal oxidation and, if excessive, can cause solderability problems during board assembly. The temperature and time of the SMD package are baked, thus limiting solderability considerations.
MeiG_SLM550_Hardware Design Manual 8 Support Peripheral Device List Table 34 List of supported display models Vendor Drive IC Specification ILITEK ILI9881P 1280x720 Table 35 Support for Camera Model List Vendor Drive IC Specification Sunny S5K3M2XX 13M Sunny S5K4H7 8M Sunny S5K5E8 5M Table 36 Support for touch screen model list Vendor Drive IC Specification GOODiX GT5688 5" Table 37 Support for G Sensor Model List Vendor Model Specification Bosch BMI120 9-axis,16bit/16bit Tabl
MeiG_SLM550_Hardware Design Manual Table 39 Support PS/ALS Sensor Model List Vendor Model Specification LITEON LTR-553ALS-01 ALS+PS Table 40 Support for Gyro Sensor Model List Vendor Model Specification Bosch BMI120 9-axis,16bit/16bit MeiG Smart Technology Co.
MeiG_SLM550_Hardware Design Manual 9 Appendix 9.1 Related Documents Table 41 Related documents Serial number File name Comment [1] GSM 07.07： Digital cellular telecommunications (Phase 2+); AT command set for GSM Mobile Equipment (ME) [2] GSM 07.10： Support GSM 07.10 multiplexing protocol [3] GSM 07.05： [4] GSM 11.14： [5] GSM 11.11： [6] GSM 03.38： [7] GSM 11.
MeiG_SLM550_Hardware Design Manual DTE Data Terminal Equipment (typically computer, terminal, printer) DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate EGSM Enhanced GSM ESD Electrostatic Discharge ETS European Telecommunication Standard FR Full Rate GPRS General Packet Radio Service GSM Global Standard for Mobile Communications HR Half Rate IMEI International Mobile Equipment Identity Li-ion Lithium-Ion MO Mobile Originated MS Mobile Station (GSM e
MeiG_SLM550_Hardware Design Manual RX Receive Direction SIM Subscriber Identification Module SMS Short Message Service TDD Time Division Distortion TE Terminal Equipment, also referred to as DTE TX Transmit Direction UART Universal Asynchronous Receiver & Transmitter URC Unsolicited Result Code USSD Unstructured Supplementary Service Data Phone book abbreviation Explanations FD SIM fix dialing phonebook LD SIM last dialing phonebook (list of numbers most recently dialed) MC Mobile
MeiG_SLM550_Hardware Design Manual GPIO_3 153 SPI_CS_N UART_RXD GPIO_4 36 SPI_MISO UART_CTS I2C_SDA GPIO_5 37 SPI_MOSI UART_RTS I2C_SCL GPIO_69 34 SPI_SCLK UART_TXD GPIO_70 35 SPI_CS_N UART_RXD GPIO_62) 48 SPI_MISO UART_CTS I2C_SDA GPIO_72) 47 SPI_MOSI UART_RTS I2C_SCL GPIO_712) 31 SPI_SCLK UART_TXD GPIO_802) 30 SPI_CS_N UART_RXD GPIO_963) 95 SPI_MISO UART_CTS I2C_SDA GPIO_973) 96 SPI_MOSI UART_RTS I2C_SCL GPIO_124) 94 SPI_SCLK UART_TXD GPIO_134) 93 S
MeiG_SLM550_Hardware Design Manual 9.4 Safety Warning Pay attention to the following safety precautions when using or repairing any terminal or mobile phone that contains modules. The user should be informed of the following safety information on the terminal device. Otherwise, Meig will not be responsible for any consequences caused by the user not following these warning actions.
