SLM756P User Manual Released Date：2019/3 File name： SLM756P User Manual Version Number：V1.00 Company：MeiG Smart Technology Co., Ltd MeiG Smart Technology Co.
IMPORTANT NOTICE COPYRIGHT NOTICE Copyright © MeiG Smart Technology Co., Ltd. All rights reserved. All contents of this manual are exclusively owned by MeiG Smart Technology Co., Ltd(MeiG Smart for short), which is under the protection of Chineselawsandcopyrightlaws in international conventions. Anyone shall not copy, spread, distribute, modify or use in other ways with its contents without the written authorization of MeiG Smart.
SLM756P_Hardware Design Guide_V1.
Foreword Thank you for using the SLM756P module from Meg Smart. This product can provide data communication services. Please read the user manual carefully before use, you will appreciate its perfect function and simple operation method. The company does not assume responsibility for property damage or personal injury caused by improper operation of the user. Users are requested to develop the corresponding products according to the technical specifications and reference designs in the manual.
1. Introduction................................................................................................................................................................ 9 2. Module Overview ...................................................................................................................................................... 9 2.1 Summary of features ........................................................................................................................................
. Electrical & Reliability ............................................................................................................................................ 33 6.1 Absolute Maximum........................................................................................................................................ 33 6.2 Working Temperature..................................................................................................................................... 33 6.3 Working Voltage.
Version History Date 2019-6 Version 1.
1. Introduction This document describes the hardware application interface of the module, including the circuit connections and RF interfaces of the relevant applications. It can help users quickly understand the module's interface definition, electrical performance and structural size details. Combined with this and other application documents, users can quickly use modules to design mobile communication applications. 2.
GPU A304 409.6MHz System memory 8GB eMMC + 1GB LPDDR3/16GB eMMC + 2GB LPDDR3 OS Android 5.1/ Android 7.1 Size 44.0x39.0x3.0mm， LCC+LGA130pin SLM756P Network band -NA (North America) FDD-LTE: B2/4/5/7/12/13/17 WCDMA: B2/4/5 Wi-Fi IEEE 802.11a/b/g/n 2.4G&5G Bluetooth BT4.1 FM Support GNSS GPS/Beidou/Glonass DAT A TDD-LTE FDD-LTE DC-HSPA+ TD-HSPA Cat4 TDD-LTE 117/30Mbps Cat4 FDD-LTE 150/50Mbps 42/11.2Mbps 2.8/2.3Mbps DSDS (Dual Sim-card Dual Stanby) 3.0/1.
I2C*4 For sensors/TP/others SPI*1 Master only ADC*2 Charging function Motor GPIO Support VCOIN Real-time clock backup battery RF PIN Multimode LTE main antenna Multimode LTE diversity antenna The GPS antenna 2.4 G WiFi/BT antenna Audio 2-way single-ended MIC （ ECM&MEMS ） ,1 way headphone MIC 1 way speakerphone (with amplifier) 1 way earpiece 1 channel stereo headset Built-in 5V/1.
2.2 Block diagram The following figure lists the main functional parts of the module. MSM8909 Baseband PM8909 Power management Antenna interface MIPI interface Storage EMCP AUDIO interface Serial port, SD card interface, SIM card interface, I2C interface, etc.
3. Module Encapsulation 3.1 Pin distribution diagram Figure 3.
MeiG hardware design guide 3.2 Pin definitions Table 3.1：Pin description Pin Name Pin number I/O The power supply Description VBAT 49、50 I The module provides four VBAT power pin pins. The SLM756P operates from a single supply with a voltage range from 3.3V to 4.2V for VBAT. VBUS 51 I Charging input power.
MeiG hardware design guide MIPI_DSI0_LANE1_N MIPI_DSI0_LANE1_P MIPI_DSI0_LANE2_N MIPI_DSI0_LANE2_P MIPI_DSI0_LANE3_N MIPI_DSI0_LANE3_P LCD_RST_N LCD_TE0 UART_TX UART_RX UART_CTS UART_RTS UART_MSM_TX UART_MSM_RX UIM1_DET UIM1_RESET UIM1_CLK UIM1_DATA UIM2_DET UIM2_RESET UIM2_CLK UIM2_DATA I/O I/O I/O I/O I/O I/O O I UART 80 O 79 I 78 I 77 O 82 O 81 I UIM Card Interface 88 I 108 O 110 O I/O 109 84 I 104 O 106 O I/O 105 123 124 125 126 1 2 117 5 LCD reset LCD frame sync signal UART1 Data sent UART1 Data rec
MeiG hardware design guide CDC_HPH_L CDC_HS_DET CDC_HPH_REF CDC_EAR_P CDC_EAR_M 40 45 39 41 42 O I I O O SPKR_DRV_P 43 O SPKR_DRV_M 44 O Headphone left channel Headphone plug detection Headphone reference ground Earpiece output positive Earpiece output negative Amplifier (0.85W) output positive Amplifier (0.
MeiG hardware design guide GPIO8_SPI1_MOSI GPIO9_SPI1_MISO GPIO10_SPI1_CS GPIO11_SPI1_CLK 116 10 11 83 O I O O GPIO14 76 I/O GPIO15 75 I/O GPIO16 70 I/O GPIO17 69 I/O GPIO36 127 I/O GPIO90 128 I/O GPIO95 130 I/O GPIO98 129 I/O configuration SPI interface SPI interface SPI interface SPI interface Generic GPIO, without default configuration Generic GPIO, without default configuration Generic GPIO, without default configuration Generic GPIO, without default configuration Generic GPI
MeiG hardware design guide 11 GPIO10_SPI_CS GPIO10 B-PD:nppukp 12 CAM0_RST_N GPIO35* DO;B-PD:nppukp Rear camera reset; Configurable I/O 13 CAM0_PWDN GPIO34* DO;B-PD:nppukp Rear camera pwdn;Configurable I/O 14 CAM0_MCLK GPIO26 DO;B-PD:nppukp Rear camera clock; Configurable I/O 15 GND 16 MIPI_CSI0_LANE0_N AI, AO MIPI camera serial interface 0 lane 0 - negative 17 MIPI_CSI0_LANE0_P AI, AO MIPI camera serial interface 0 lane 0 –positive 18 MIPI_CSI0_LANE1_N AI, AO 19 MIPI_CSI0_
MeiG hardware design guide 48 GND GND GND 49 VBAT PI,PO Battery 50 VBAT PI,PO Battery 51 VBUS PI USB VBUS Voltage 52 KYPD_PWR_N DI Power on key 53 GND GND GND 54 RF_WIFI/BT AI,AO RF signal 55 GND GND GND 56 GND GND GND 57 PM_RESIN_N 58 GPIO7_I2C_SCL GPIO7 DO;B-PD:nppukp Configurable I/O I2C or GPIO 59 GPIO6_I2C_SDA GPIO6 DO;B-PD:nppukp Configurable I/O I2C or GPIO 60 GND 61 RF_GPS 62 GND 63 RF_FM 64 GND 65 RF_DIV 66 GND 67 PM8909_MPP4 68 VCOI
MeiG hardware design guide 86 RF_MAIN AI,AO RF signal-Main ANT 87 GND GND GND 88 UIM1_DET_N GPIO56 DI,B-PD:nppukp 89 GPIO3 GPIO3 B-PD:nppukp Configurable I/O, MI2S_2_D1 90 GPIO2 GPIO2 B-PD:nppukp Configurable I/O,MI2S_2_D0 91 GPIO1 GPIO1 B-PD:nppukp Configurable I/O,MI2S_2_SCK 92 GPIO0 GPIO0 B-PD:nppukp Configurable I/O,MI2S_2_WS 93 GND 94 VREG_L11_SDC 95 SDC2_SDCARD_DET 96 SDC2_SDCARD_CMD BH-PD:nppukp Secure digital controller 2 command 97 SDC2_SDCARD_CLK BH-NP:
MeiG hardware design guide 123 MIPI_DSI0_LANE1_N AI, AO MIPI display serial interface 0 lane 1 – negative 124 MIPI_DSI0_LANE1_P AI, AO MIPI display serial interface 0 lane 1 –positive 125 MIPI_DSI0_LANE2_N AI, AO MIPI display serial interface 0 lane 2 –negative 126 MIPI_DSI0_LANE2_P AI, AO MIPI display serial interface 0 lane 2 –positive 127 GPIO36 GPIO36* B-PD:nppukp 128 GPIO90_KEY_VOL_U P GPIO90* DI;B-PD:nppukp 129 GPIO98 GPIO98* B-PD:nppukp Configurable I/O 130 GPIO95 GPIO
MeiG hardware design guide GPIO14 76 CS_N SDA GPIO GPIO15 75 CLK SCL GPIO GPIO16 70 MOSI GPIO GPIO17 69 MISO GPIO GPIO18 72 CS_N SDA GPIO GPIO19 71 CLK SCL GPIO GPIO20 80 MOSI TX GPIO GPIO21 79 MISO RX GPIO GPIO111 78 CS_N CTS SDA GPIO GPIO112 77 CLK RTS SCL GPIO 22
MeiG hardware design guide 3.
MeiG hardware design guide BOTTOM: 2
MeiG hardware design guide Side： Figure 3.
MeiG hardware design guide 4. Interface Application 4.1 Power Supply In the case of a battery device, the voltage input range of the module VBAT is 3.4V to 4.2V, and the recommended voltage is 3.8V. In the LTE band, when the module is transmitting at maximum power, the peak current can reach up to 3A, resulting in a large voltage drop on VBAT. It is recommended to use a large capacitor regulator close to VBAT. It is recommended to use two 47uF ceramic capacitors.
MeiG hardware design guide Figure 4.2：DC-DC power supply circuit Note： If the user does not use battery power, please note that a 10K resistor is connected to the 134 pin (BAT_THERM) of the module and pulled down to GND to prevent the software from judging the abnormal battery temperature after the module is turned on, resulting in shutdown. The connection diagram is as follows: Figure 4.3：Connection diagram when not powered by battery 4.1.
MeiG hardware design guide Figure 4.4：VBAT lowest voltage drop 4.2 Power on and off Do not turn on the module when the module's temperature and voltage limits are exceeded. In extreme cases, such operations can cause permanent damage to the module. 4.2.1 Module Boot The user can power up the module by pulling the PWRKEY pin (52) low. Pull down for at least 5 seconds. This pin has been pulled up to 1.8V in the module. The recommended circuit is as follows: Figure 4.
MeiG hardware design guide Figure 4.6：Use the PWRKEY button circuit to boot The following figure is the boot timing description： Figure 4.7： Using PWRKEY boot timing diagram 4.2.2 Module Shutdown Users can use the PWRKEY pin to shut down. 4.2.2.1 PWRKEY Shutdown The user can turn off the PWRKEY signal by pulling it down for at least 3 seconds. The shutdown circuit can refer to the design of the boot circuit.
MeiG hardware design guide Figure 4.8： Reset using the key circuit Figure 4.9：Reset Module Using External Signa When the pin is high, the voltage is typically 1.8V. Therefore, for users with a level of 3V or 3.3V, it is not possible to directly use the GPIO of the MCU to drive the pin. An isolation circuit is required. The hardware parameters of the RESET can refer to the following table: Table 4.
MeiG hardware design guide Figure 4.10: External Capacitor Powering the RTC Non-rechargeable battery powered: Figure 4.11: Non-rechargeable battery to power the RTC Rechargeable battery powered: Figure 4.12: Rechargeable Battery Powers RTC This VCOIN power supply is typically 3.0V and consumes approximately 8uA when VBAT is disconnected. 4.4 Power Output The SLM756P has multiple power outputs. For LCD, Camera, touch panel, etc.
MeiG hardware design guide VREG_L2_1P2 VREG_L6_1P8 VREG_L17_2P85 VREG_L11_SDC VREG_L8_2P9 VREG_L14_UIM1 VREG_L15_UIM2 1.8 1.8 2.85 2.95 2.9 1.8/3.3 1.8/3.3 1.75~3.337 1.75~3.337 1.75~3.337 200 200 420 600 300 55 55 4.5 Serial Port The SLM756P provides two serial ports for communication. UART1 with hardware flow control, UART2 default for debugging. Table 4.
MeiG hardware design guide Figure 4.14: TX Connection Diagram Figure 4.15: RX Connection Diagram Note: When using Levels 14 and 15 for level isolation, you need to pay attention to the output timing of VREG_L6_1P8. Only after VREG_L6_1P8 is output normally, the serial port can communicate normally. VREG_L6_1P8 will enter low power mode when sleeping. If the serial port needs to be in sleep mode. When communicating, please use the commonly used 1.8V as the pull-up power supply. Table 4.
MeiG hardware design guide 4.6 MIPI Interface The SLM756P supports the Moble Industry Processor Interface (MIPI) interface for Camera andLCM. The module supports up to HD (720P) display, of which MIPI interface Main Camera supports up to 8MP and Front Camera supports 5MP. MIPI is a high-speed signal line. In the Layout stage, please strictly follow the impedance and length requirements to control the length of the differential pair within the group and the group length.
MeiG hardware design guide MIPI_DSI0_LANE2_P 126 MIPI_DSI0_LANE3_N MIPI_DSI0_LANE3_P PM8909_MPP2 LCD_TE LDO6_1P8 LDO17_2P85 1 2 4 5 7 8 I/O I/O I/O O I/O O O Backlight PWM ontrol signal Frame synchronization signal 1.8V power supply 2.85V power supply The LCD_ID of the module can use GPIO (only recognize high and low level) or ADC (PM8909_MPP4). Please confirm the internal circuit of LCM. If the internal divider of LCM uses resistor divider, please note that the voltage domain is 1.8V.
MeiG hardware design guide Figure 4.17: Backlight Drive Circuit Note: 1. The backlight circuit should select the chip according to the backlight circuit of LCD. Users should carefully read the LCD document and select the correct driver chip. The reference circuit provided in this document is a series-type PWM dimming backlight driver circuit; if a series-type oneline dimming backlight driver circuit (such as KTD2801) is used due to design requirements, GPIO is required for control. 4.6.
MeiG hardware design guide CAM_I2C_SDA 23 I/O I2Csignal,CAMdedicated CAM_I2C_SCL 24 I/O I2Csignal,CAMdedicated VREG_L6_1P8 7 O 1.8V IOVDD VREG_L17_2P85 8 O 2.8V AVDD VREG_L8_2P9 9 O 2.9V AFVDD（powering the focus motor） VREG_L2_1P2 6 O 1.2V DVDD If the user designs to use the CAMERA module with autofocus function, please note that the I2C of the module cannot be directly connected to the AF device.
MeiG hardware design guide Figure 4.19: MIPI Camera Reference Circuit When designing the camera function, you need to pay attention to the position of the connector. There will be a small person in the specification of the camera to indicate the imaging direction. You need to ensure that the villain stands on the long side of the LCD. As shown in the two figures below.
MeiG hardware design guide Figure 4.20: Camera imaging diagram 4.7 Resistive Touch Interface The module does not provide a resistive touch screen interface. If the user needs to use a resistive touch, an external dedicated chip is required. The module can provide an I2C interface.The reference circuit is as follows: Figure 4.21: RTP Reference Circuit 4.
MeiG hardware design guide GPIO10_TP_I2C3_SDA 82 I/O GPIO11_TP_I2C3_SCL 81 I/O GPIO65_TP_INT_N 79 I The capacitive touch I2C interface needs to be pulled up toVREG_L5_1P8 Interrupt GPIO64_TP_RST_N 80 O Reset VREG_L17_2P85 112 O 2.8V Power Note: The interface definition of the capacitive touch can be adjusted by software, and the user can change the GPIO and I2C according to the design needs. 4.
MeiG hardware design guide 4.9.1 Receiver Interface Circuit Figure 4.21: Receiver Interface Circuit 4.9.1 Microphone receiving Circuit Below is the MEMS microphone interface circuit, which has more BIAS power supply than the electret MIC. Figure 4.22: Microphone Differential Interface Circuit 4.9.2 Headphone Interface Circuit The module integrates a stereo headphone jack. Users are advised to reserve ESD devices during the design phase to prevent ESD damage.
MeiG hardware design guide Figure 4.23: Headphone Interface Circuit note: 1. The earphone holder in Figure 4.23 is normally closed. If the user is using the normally open mode earphone holder, please modify the detection circuit according to the actual pin and modify the software accordingly. 2.
MeiG hardware design guide Figure 4.25: Recommended Circuit with External Audio Power Amplifier 4.9.5 I2S Interface There is a set of GPIO-compatible I2S interfaces inside the module. The pins used by this function are as follows: Name Pin Input/Output Description GPIO3 89 I I2S1 input DATA GPIO2 90 O I2S1 output DATA GPIO1 91 O I2S1_ SCK GPIO0 92 O I2S1_ WS 4.10 USB Interface The SLM756P supports a USB 2.0 High speed interface.
MeiG hardware design guide Figure 4.26: USB Connection Diagram 4.10.1 USB OTG The SLM756P module provides USB OTG functionality and requires an external charging chip or power chip to output 5V power to external devices. The work The pins that can be used are as follows: Table 4.10: USB OTG Pin Description Name Pin USB_DM USB_DP USB_ID Decription 112 113 114 USB dataUSB data+ USB ID The recommended circuit diagram of USBOTG is as follows: Figure 4.
MeiG hardware design guide 4.11 Charging Interface 4.11.1 Charging Detection The USB_VBUS power supply is a USB power supply or an adapter power supply. It can be used as a USB plug-in detection and charge the battery through the internal PMU of the module. The power input voltage range is 4.35~6.3V, and the recommended value is 5V. The module supports single-cell lithium battery charge management, and different capacity models need to set different charging parameters.
MeiG hardware design guide 4.12 UIM Card Interface The SLM756P can support two SIM cards at the same time to achieve dual card dual standby. Support SIM card hot swap, can automatically recognize 1.8V and 3.0V cards. The figure below shows the recommended interface circuit for the SIM card. In order to protect the SIM card, it is recommended to use TVS devices for electrostatic protection. The DATA signal requires a 15K resistor to pull up to the SIM power supply.
MeiG hardware design guide 4.14 I2C Bus Interface The SLM756P module supports multiple hardware I2C bus interfaces. The default I2C pin definition functions are as follows: Table 4.
MeiG hardware design guide 4.17 Motor The SLM756P supports motor functions that can be implemented by the user with GPIO control power. The reference schematic is as follows: Figure 4.32: Motor interface circuit 4.18 Antenna Interface The module provides four antenna interfaces: MAIN antenna, DRX antenna, GPS antenna and WiFi/BT antenna.
MeiG hardware design guide In the figure, R101, C101, and C102 are antenna matching devices, and the specific component values can be determined after the antenna factory debugs the antenna. Among them, R101 defaults to 0R, C101 and C102 do not paste by default. If there are fewer components between the antenna and the module output, or if the RF test head is not needed in the design, the antenna matching circuit can be simplified as shown below: Figure 4.
MeiG hardware design guide If there are fewer components between the antenna and the module output, or if the RF test head is not needed in the design, the antenna matching circuit can be simplified as shown below: Figure 4.36: DRX Antenna Interface Simplified Connection Circuit In the above figure, R102 defaults to 0R, C103 and C104 are not attached by default. 4.18.3 GPS Antenna The module provides the GNSS antenna pin RF_GPS.
MeiG hardware design guide Figure 4.38: Connecting Active Antennas 4.18.4 WiFi/BT antenna The module provides the WiFi/BT antenna pin RF_WIFI/BT. The antenna on the user's motherboard should be connected to the antenna pin of the module using a 50 ohm microstrip line or strip line. In order to facilitate antenna debugging and certification testing, an RF connector and antenna matching network should be added. The recommended circuit diagram is as follows: Figure 4.
MeiG hardware design guide Figure 4.40: WIFI_BT antenna interface simplified connection circuit In the above figure, R301 defaults to 0R, and C301 and C302 do not paste by default. 5. PCB Layout The performance of a product depends largely on the PCB trace. As mentioned above, if the PCB layout is unreasonable, it may cause interference problems such as card loss. The way to solve these interferences is often to redesign the PCB.
MeiG hardware design guide 5.2.1. Antenna Antenna part design, SLM756P module has a total of 5 antenna interfaces, they are: RF_MAIN, RF_DRX, RF_GPS, RF_WIFI, RF_FM.
MeiG hardware design guide 5.2.4. MIPI MIPI is a high-speed signal line. Users must pay attention to protection during the layout phase, so that they are away from the signal lines that are easily interfered. The GND processing must be performed on the upper and lower sides, and the traces are differential pairs. 100 ohm differential impedance matching is performed. Ensure impedance consistency and do not bridge different GND planes as much as possible.
MeiG hardware design guide The LTE antenna is the main source of coupling interference for FDD, so users should pay attention to keeping the audio trace away from the LTE antenna and VBAT during PCB layout and routing. The filter capacitor of the audio is preferably placed close to the module end and placed next to the interface end. The audio output should be routed according to the differential signal rules. The conducted interference is mainly caused by the voltage drop of VBAT.
MeiG hardware design guide Storage temper ature -40 - ℃ 90 6.3 Working Voltage Table 6.3: Module Operating Voltage Parameter Minimum Typical Maximum Unit VBAT 3.4 - 4.2 V VBUS 4 5 6 V Hardware shutdown voltage 2.5 2.8 - V 6.4 Digital Interface Features Table 6.4: Digital Interface Features (1.8V) Parameter Description Minimum Typical Maximum Unit VIH Input high level voltage 1.17 - - V VIL Input low level voltage - - 0.63 V 1.35 - - V - - 0.
MeiG hardware design guide low level - Effective time 2000 - 0.6 V ms 6.7 VCOIN Feature Table 6.6: VCOIN Characteristics Paramet Description er Minimum Typical Maximum Unit VCOIN-IN VCOIN input voltage 2 3 3.25 V IRTC-IN VCOINCurrent consumption - - 8 uA VCOIN Output voltage - 3 - V VCOIN Output current - - 2 mA VCOINOUT IRTC-OUT 6.8 Current Consumption (VBAT = 3.8V) Table 6.
MeiG hardware design guide 6.9 Electrostatic Protection The module is not specifically protected against electrostatic discharge. Therefore, users must pay attention to electrostatic protection when producing, assembling, and operating modules. 6.10 Module Operating Frequency Band The table below lists the operating frequency bands of the module and complies with the 3GPP TS 05.05 technical specification. Table 6.
MeiG hardware design guide 6.11 RF Characteristics The following table lists the conducted RF output power of the module, in accordance with 3GPP TS 05.05 technical specification, 3GPP TS 134121-1 standard. Table 6.10: Conducted Output Power 6.12 Module Conduction Receiving Sensitivity The table below lists the conducted receive sensitivity of the module and is tested under static conditions.
MeiG hardware design guide Table 6.11: Conducted Receive Sensitivity Frequency band Receive sensitivity (typical) WCDMAB5 <-109 dBm 3GPP Claim TDSCDMA1.9G <-110 dBm 3GPP Claim TDSCDMA2G <-110 dBm 3GPP Claim LTEFDD/TDD See table 6.12 3GPP Claim Receive sensitivity (maximum) Table 6.12: LTE Reference Sensitivity 3GPP Dual Antenna Requirements (QPSK) E-UTRA Frequency band number 1.4 MHz 3 MHz 5 MHz 10 MHz 15 MHz 20 MHz Duplex mode 1 - - -100 -97 -95.2 -94 FDD 2 -102.7 -99.
MeiG hardware design guide 27 -103.2 -100.2 -98 -95 -100.2 -98.5 -95.5 -99.0 -95.7 -93.5 33 - - -100 -97 -95.2 -94 TDD 34 - - -100 -97 -95.2 - TDD 35 -106.2 -102.2 -100 -97 -95.2 -94 TDD 36 -106.2 -102.2 -100 -97 -95.2 -94 TDD 37 - - -100 -97 -95.2 -94 TDD 38 - - -100 -97 -95.2 -94 TDD 39 - - -100 -97 -95.2 -94 TDD 40 - - -100 -97 -95.2 -94 TDD 41 - - -98 -95 -93.2 -92 TDD 28 31 FDD -93.7 -91 FDD FDD ... 6.
MeiG hardware design guide Receiving performance Receiving sensitivity 802.11B 802.11N Minimum rate -88 -89 dBm Maximum rate -73 -71 dBm 6.14 BT Main RF Prformance The table below lists the main RF performance under BT conduction. Table 6.14: Main RF performance parameters under BT conduction Transmission performance Target power DH5 2DH5 11 11 3DH5 11.5 dBm Receiving performance Receiving sensitivity DH5 2DH5 3DH5 -94.5 -94.5 -86 dBm 6.
MeiG hardware design guide 7. Production 7.1. Top And Bottom Views Of The Module Figure 48: Module top and bottom views 7.2. Recommended Soldering Furnace Temperature Curve Figure 49: Module recommended soldering furnace temperature curve 7.3. Humidity Sensitivity (MSL) The SLM756P module meets moisture sensitivity level 3.
MeiG hardware design guide degrees and relative humidity <90%, the shelf life is at least 6 months without unpacking. After unpacking, Table 22 lists the shelf life of the modules for different moisture sensitivity levels. Table 7.1: Humidity sensitivity level distinction Grade Factory environment≦+30℃/60%RH 1 Indefinite quality in the environment≦+30℃/85% RH Under conditions 2 1 Year 2a 4 Weeks 3 168 hours 4 72 hours 5 48 hours 5a 24 hours 6 Use it after forced baking.
MeiG hardware design guide DJN ILI9881C HOLITECH ILI9881C Table 8.2: List of supported camera models Vendor Drive IC GXKJ SP5506 GXKJ SP2509 Table 8.3: List of supported touch screen models Vendor Drive IC DJN GT5688 HOLITECH GT5688 DIXIAN GT970 Table8.4：List of supported G sensor models Vendor Model Specification Bosch BMA223 3-Axis,8-bit Table8.5：List of supported Ecompass models Vendor Model Specification AKM AK09911 3-Axis,14-bit Table8.
MeiG hardware design guide Identification CHINA-VISION Sweeping the pier Zeba 9. Appendix 9.1. Related Documents Table 9.1: Related documents Serial number [1] [2] [3] [4] [5] [6] [7] File name Comment GSM Digital cellular telecommunications (Phase 2+); AT command set for GSM Mobile Equipment (ME) 07.07： GSM 07.10： GSM 07.05： GSM 11.14： GSM 11.11： GSM 03.38： GSM 11.10 Support GSM 07.
MeiG hardware design guide CSD Circuit Switched Data CTS Clear to Send DTE Data Terminal Equipment (typically computer, terminal, printer) DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate ESD Electrostatic Discharge ETS European Telecommunication Standard FR Full Rate HR Half Rate IMEI International Mobile Equipment Identity Li-ion Lithium-Ion MO Mobile Originated MS Mobile Station (GSM engine), also referred to as TE MT Mobile Terminated PAP Pass
MeiG hardware design guide Phone book abbreviation Explanations FD SIM fix dialing phonebook LD SIM last dialing phonebook (list of numbers most recently dialed) MC Mobile Equipment list of unanswered MT calls (missed calls) ON SIM (or ME) own numbers (MSISDNs) list RC Mobile Equipment list of received calls SM SIM phonebook NC Not connect 9.3. Multiplexing function Table 9.
MeiG hardware design guide GPIO111 78 CS_N CTS SDA GPIO GPIO112 77 CLK RTS SCL GPIO 9.4. Safety Warning Pay attention to the following safety precautions when using or repairing any terminal or mobile phone that contains modules. The user should be informed of the following safety information on the terminal device. Otherwise, MeiG will not be responsible for any consequences caused by the user not following these warning actions. Table 9.
MeiG hardware design guide 10. OEM/Integrators Installation Manual 10.1. List of applicable FCC rules This module has been tested and found to comply with part 22, part 24, part 27 ， part 15.247,part 15.407 requirements for Modular Approval. 10.2. Summarize the specific operational use conditions This module can be used in POS and other equipment. The input voltage to the module should be nominally 3.5~4.2 VDC ,typical value 3.8VDC and the ambient temperature of the module should not exceed 60℃.
MeiG hardware design guide External fixed rubber antenna Peak Gain 13.92(dBi) 10.7. Label and compliance information When the module is installed in the host device, the FCC ID/IC label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved.
MeiG hardware design guide devices or drivers are not available. When testing for emissions from the unintentional radiator, the transmitter shall be placed in the receive mode or idle mode, if possible. If receive mode only is not possible then, the radio shall be passive (preferred) and/or active scanning. In these cases, this would need to enable activity on the communication BUS (i.e., PCIe, SDIO, USB) to ensure the unintentional radiator circuitry is enabled.
