Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsDiodesMAX4895EETE+

General Description

The MAX4895E integrates level-translating buffers and

features R, G, B port protection for VGA signals.

The MAX4895E has H, V (horizontal, vertical) translat-

ing buffers that take low-level CMOS inputs from the

graphics outputs to meet full +5.0V, TTL-compatible

outputs. Each output can drive ±10mA and meet the

VESA

specification. In addition, the device takes the

+5.0V, direct digital control (DDC) signals and trans-

lates them to the lower level required by the graphics

device. This level is set by the user by connecting V

the graphics output supply. The R, G, B terminals pro-

tect the graphics output pins against electrostatic dis-

charge (ESD) events. All seven outputs have high-level

ESD protection.

The MAX4895E is specified over the extended -40°C to

+85°C temperature range, and is available in a 16-pin,

3mm x 3mm TQFN package.

Applications

Notebook Computers

Desktops

Servers

Graphics Cards

Features

♦ ESD Protection on H1, V1, SDA1, SCL1, R, G, and B

±15kV—Human Body Model

±8kV—IEC 61000-4-2, Contact Discharge

♦ Low Quiescent Current, I

≤ 5µA (max)

♦ Low 3pF (max) Capacitance (R, G, B Ports)

♦ DDC Level-Shifting Protection and Isolation

♦ Horizontal Sync, Vertical Sync Level Shifting/

Buffering

♦ Input Compatible with V

♦ Output Full +5.0V TTL Compatible (per VESA)

♦ ±10mA Drive on Each H, V Terminal

♦ Space-Saving, Lead-Free, 16-Pin (3mm x 3mm)

TQFN Package

MAX4895E

VGA Port Protector

________________________________________________________________

Maxim Integrated Products

Ordering Information

MAX4895E

1μF

GND

+5V

1μF

+3.3V

SDA0, SCL0

H0, V0

VGA OUTPUTS VGA PORT

SDA1, SCL1

H1, V1

N.C.

Typical Operating Circuit

19-4569; Rev 1; 6/10

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

PART TEMP RANGE PIN-PACKAGE

MAX4895EETE+ -40°C to +85°C 16 TQFN-EP*

Denotes a lead(Pb)-free/RoHS-compliant package.

EP = Exposed pad.

VESA is a registered service mark of Video Electronics

Standards Association Corporation.

Summary of content (8 pages)

PAGE 1
9-4569; Rev 1; 6/10 VGA Port Protector Features The MAX4895E integrates level-translating buffers and features R, G, B port protection for VGA signals. ♦ ESD Protection on H1, V1, SDA1, SCL1, R, G, and B ±15kV—Human Body Model The MAX4895E has H, V (horizontal, vertical) translating buffers that take low-level CMOS inputs from the graphics outputs to meet full +5.0V, TTL-compatible outputs. Each output can drive ±10mA and meet the VESA® specification. In addition, the device takes the +5.
PAGE 2
MAX4895E VGA Port Protector ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) VCC ........................................................................-0.3V to +6.0V VL .............................................................-0.3V to +(VCC + 0.3V) R, G, B, H1, V1, SCL1, SDA1...................-0.3V to +(VCC + 0.3V) EN, H0, V0, SCL0, SDA0 ............................-0.3V to +(VL + 0.3V) Continuous Current through SDA_, SCL_.........................
PAGE 3
VGA Port Protector (VCC = +4.5V to +5.5V, VL = +2.0V to VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V, and TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ESD PROTECTION SDA1, SCL1, H1, V1, R, G, B Human Body Model (Note 4) SDA1, SCL1, H1, V1, R, G, B IEC 61000-4-2 Contact ±15 kV ±8 kV Note 2: All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by design.
PAGE 4
VGA Port Protector MAX4895E Pin Configuration H1 H0 SCL1 SCL0 TOP VIEW 12 11 10 9 V0 13 8 SDA1 V1 14 7 SDA0 6 N.C. 5 VL MAX4895E VCC 15 EP 2 3 4 GND R 1 B + G EN 16 TQFN (3mm × 3mm) Pin Description PIN 4 NAME FUNCTION 1 R High-ESD Protection Diodes for RGB Signals 2 G High-ESD Protection Diodes for RGB Signals 3 B High-ESD Protection Diodes for RGB Signals 4 GND 5 VL 6 N.C. No Connection. Leave unconnected. 7 SDA0 SDA I/O. SDA0 referenced to VL.
PAGE 5
VGA Port Protector VL VCC SDA1 ±15kV SDA0 CLAMP SCL0 ±15kV SCL1 H1 ±15kV H0 EN V1 ±15kV V0 B ±15kV MAX4895E G ±15kV ±15kV R GND Applications Information The MAX4895E provides the level shifting necessary to drive two standard VGA ports from a graphics controller as low as +2.2V. Internal buffers drive the HSYNC and VSYNC signals to VGA standard TTL levels. The DDC switch provides level shifting by clamping signals to a diode drop less than VL (see the Typical Operating Circuit).
PAGE 6
MAX4895E VGA Port Protector Detailed Description The MAX4895E integrates level-translating buffers and features R, G, B port protection for VGA signals. Horizontal and vertical synchronization (H0/V0) inputs feature level-shifting buffers to support low-voltage CMOS or standard TTL-compatible graphics controllers. The device meets ±10mA VESA drive requirements. The MAX4895E also features I2C level shifting using two nMOS devices.
PAGE 7
VGA Port Protector CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 100pF RD 1500Ω RC 50MΩ TO 100MΩ DISCHARGE RESISTANCE CHARGE-CURRENTLIMIT RESISTOR DEVICE UNDER TEST STORAGE CAPACITOR DISCHARGE RESISTANCE STORAGE CAPACITOR DEVICE UNDER TEST I 100% 90% PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) IPEAK Ir Cs 150pF RD 330Ω Figure 1c. IEC 61000-4-2 ESD Test Model Figure 1a. Human Body ESD Test Model IP 100% 90% HIGHVOLTAGE DC SOURCE MAX4895E RC 1MΩ AMPS 36.
PAGE 8
MAX4895E VGA Port Protector Revision History PAGES CHANGED REVISION NUMBER REVISION DATE 0 4/09 Initial release — 1 6/10 Deleted the “Top Mark” column from the Ordering Information 1 DESCRIPTION Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.