Lu x Co s h nf ar id een IC tia T l LS001ONWAS Datasheet IEEE 802.11 1X1 a/b/g/n Wireless LAN+ Bluetooth 5.1 Combo Stamp Module Datasheet Version 1.
LS001ONWAS Datasheet Date Revision Content Revised By Version Initial Release EE V1.0 2020/9/18 Modify Pin Map and PHY DMI EE V1.1 2020/11/6 Modify Pin Definition EE V1.2 2020/12/12 Updated 1. Pin Definition 2. Block Diagram 3. Specifications Table 4. Electrical Characteristics 5. Host Interface Updated 1. Package LGA change to Stamp 2. CON[0] and CON[1] 100k change to 51k 3. Dimension 4. Power up Timing Sequence Updated 1. Power up Timing Sequence Release 1. WLAN&BT Specification Modify 1.
LS001ONWAS Datasheet Contents Lu x Co s h nf ar id een IC tia T l 1. Introduction ............................................................................................................................................................. 4 2. Features ................................................................................................................................................................... 5 2.1 Wi-Fi Features ......................................................................
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 7.4.2 PCM Timing Diagram—Master Mode ............................................................................................... 25 7.4.3 PCM Timing Data—Master Mode ..................................................................................................... 26 7.4.4 PCM Timing Diagram—Slave Mode .................................................................................................. 27 7.4.5 PCM Timing Data—Slave Mode .......
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 1. Introduction Product Overview and Functional Description The LS001ONWAS is a highly integrated Wi-Fi 4 (2.4G/5G) and Bluetooth 5.1 Wi-Fi Module solution with a highly effective bill of material. The device has a power optimized architecture and features to save energy. With the Bluetooth 5.
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 2. Features 2.1 Wi-Fi Features • Support 802.11 a/b/g/n • Dual bands: 2.4 GHz and 5 GHz • Single stream 802.11n with 20 MHz and 40 MHz channels • Up to MCS7 data rates (150 Mbps) • Support 802.11mc for location • Dynamic Rapid Channel Switching (DRCS) for simultaneous and power efficient • operation in 2.4 GHz and 5 GHz bands • Security: WPA3 and WPA 2.2 Bluetooth Features • Full Bluetooth 5.
LS001ONWAS Datasheet 3. Block Diagram Lu x Co s h nf ar id een IC tia T l A simplified block diagram of the LS001ONWAS is depicted in the figure below.
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 4. Specifications Table 4.1 General Specification Model Name LS001ONWAS Product Description Support Wi-Fi 2.4G&5G/BT5.1 Functionalities Dimension L x W x H(Max):15*15*2.55(Max)mm Main Chip IW416(NXP) Standard 802.11a/b/g/n Wi-Fi Encryption WEP 64- and 128-bit encryption with hardware TKIP processing (WPA) AES/CCMP as part of the 802.11i security standard (WPA2 and WPA3) AES/CMAC as part of the 802.
LS001ONWAS Datasheet 4.2 WLAN&BT Specification Lu x Co s h nf ar id een IC tia T l 4.2.1 2.4G WLAN Specification Features Operating Frequency Standards Modulation Data Rates Description 2.412GHz~2.472 GHz IEEE 802.11b/g/n, Wi-Fi compliant 802.11b: DQPSK, DBPSK, CCK 802.11g/n : OFDM 802.11b: 1, 2, 5.5, 11Mbps 802.11g: 6, 9, 12, 18, 24, 36, 48, 54Mbps 802.11n: Maximum data rates up to 150Mbps (40MHz channel) 802.11b@11Mbps : 17dBm +/- 2dBm @ EVM≦35% Output Power 802.
LS001ONWAS Datasheet 4.2.2 5G WLAN Specification Description Lu x Co s h nf ar id een IC tia T l Features Operating Frequency Standards Modulation Data Rates 5.15GHz~5.825 GHz IEEE 802.11a/n, Wi-Fi compliant 802.11a/n : OFDM 802.11a: 6, 9, 12, 18, 24, 36, 48, 54Mbps 802.11n: Maximum data rates up to 150Mbps (40MHz channel) 802.11a@54Mbps : 16dBm +/- 2dBm @ EVM≦-27dB Output Power 802.11n@ HT20 MCS 7 : 15dBm +/- 2dBm @ EVM≦-28dB 802.
LS001ONWAS Datasheet 4.2.3 BT Specification Bluetooth 5.1 GFSK, π/4-DQPSK, 8DPSK 2402MHz~2483MHz BDR: 0~4dBm, typ:2dBm EDR: 0~4dBm, typ:2dBm LE: 0~4dBm, typ:2dBm Lu x Co s h nf ar id een IC tia T l Standard Modulation Frequency Band Output Power Sensitivity Number of Channels BDR(DH5): -80dBm @ BER<0.1% EDR(2DH5): -85dBm @ BER<0.01% LE : -92dBm @ BER<30.8% 79 Channels 4.3 Operating Conditions Operation Conditions VDD33: 3.3V Voltage AVDD18: 1.8V VIO: 3.3V/1.8V VIO_SD: 3.3V/1.
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 5. Pin Assignments 5.
LS001ONWAS Datasheet 5.2 Pin Definition Definition Description Voltage Type Lu x Co s h nf ar id een IC tia T l Pin No 1 GND Ground connections --- --- 2 GND Ground connections --- --- 3 NC No connect to anything --- Floating VDD33 I VDD33 I --- Floating 1.8V P Firmware Boot Options 4 CON[0] [00] or [01]: USB[WLAN+BT] [10]: SDIO[WLAN]+UART[BT] [11]: SDIO[WLAN]+SDIO[BT] To set a configuration bit to 0, attach a 51k 5 CON[1] resistor from the pin to ground.
LS001ONWAS Datasheet 19 GPIO5 PCM_DOUT O I2S_DOUT O I/O Lu x Co s h nf ar id een IC tia T l GPIO Mode: GPIO [7] 20 GPIO7 PCM_SYNC VIO I2S_LRCLK I/O I/O Full Power-down input 21 System_PDn Low: Full power-down mode High: Normal mode AVDD18 I VIO O Internal pull-up on this pin 22 WL_HOST_WAKE WL device wake-up HOST GPIO Mode: GPIO [4] 23 GPIO4 PCM_DIN I/O VIO I2S_DIN 24 BT_HOST_WAKE Bluetooth device to wake-up HOST VIO GPIO Mode: GPIO [6] 25 26 GPIO6 GPIO3 PCM_CLK I I
LS001ONWAS Datasheet USB_DP USB 2.0 Serial Differential Data Positive VDD33 I/O 36 USB_DN USB 2.0 Serial Differential Data Negative VDD33 I/O 37 GND Ground connections --- --- 38 VIO 1.8V/3.3V Digital I/O Power Supply 1.8/3.
LS001ONWAS Datasheet 5.
LS001ONWAS Datasheet 5.
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 6. Electrical Characteristics 6.1 Absolute Maximum Ratings Symbol Parameter Min Typ Max Units VDD33 Power supply voltage with respect to VSS -- 3.3 3.96 V AVDD18 Power supply voltage with respect to VSS -- 1.8 1.98 V VIO Power supply voltage with respect to VSS -- 1.8 2.2 V -- 3.3 4.0 V VIO_SD Power supply voltage with respect to VSS -- 1.8 2.2 V -- 3.3 4.0 V Min Typ Max Units 6.
LS001ONWAS Datasheet 6.3 DC Characteristics Lu x Co s h nf ar id een IC tia T l 6.3.1 VIO DC characteristics-3.3V/1.8V operation Symbol Parameter VIH Condition Min Typ Max Units Input high voltage -- 0.7*VIO -- VIO+0.4 V VIL Input low voltage -- -0.4 -- 0.3*VIO V VHYS Input hysteresis -- 100 -- -- mV VOH Output high voltage -- VIO-0.4 -- -- V VOL Output low voltage -- -- -- 0.4 V 6.3.2 VIO_SD DC characteristics-3.3V/1.
LS001ONWAS Datasheet 6.3.3 Power up Timing Sequence Lu x Co s h nf ar id een IC tia T l A minimum time of 600us is required from VDD33/VIO/VIO_SD ready until AVDD18 ramp-up. 7. Host Interface 7.1 SDIO Host Interface The SDIO host interface pins are powered by VIO_SD voltage supply. The SDIO electrical specifications are identical for 4-bit SDIO and 1-bit SDIO (and SPI) transfer modes.
LS001ONWAS Datasheet 7.1.
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 7.1.
LS001ONWAS Datasheet 7.1.
LS001ONWAS Datasheet 7.1.5 SDIO Timing Data—SDR12/SDR25/SDR50 Modes (up to 100 MHz) (1.8V) Symbol Condition Min Typ Max Lu x Co s h nf ar id een IC tia T l Parameter Units fPP Clock frequency SDR12/25/50 25 -- 100 MHz TIS Input setup time SDR12/25/50 3 -- -- ns TIH Input hold time SDR12/25/50 0.8 -- -- ns TCLK Clock time SDR12/25/50 10 -- 40 ns SDR12/25/50 -- -- 0.2*TCLK ns SDR12/25/50 -- -- 7.5 ns SDR12/25/50 1.
LS001ONWAS Datasheet 7.3 UART Host Interface Lu x Co s h nf ar id een IC tia T l 7.3.1 UART Interface Signals Pin Name Type Description BT_UART_RXD I UART serial input signal BT_UART_TXD O UART serial output signal BT_UART_RTS O UART request-to-send output signal. Active low BT_UART_CTS I UART clear-to-send input signal. Active low 7.3.2 UART Timing Diagram UART Timing Diagram 7.3.
LS001ONWAS Datasheet 7.4 PCM Interface Lu x Co s h nf ar id een IC tia T l 7.4.1 PCM Interface Signals Pin Name Type Description GPIO3 O PCM_MCLK(optional) GPIO4 I PCM_DIN GPIO5 O PCM_DOUT GPIO6 I/O PCM_CLK GPIO7 I/O PCM_SYNC 7.4.
Lu x Co s h nf ar id een IC tia T l LS001ONWAS Datasheet PCM Timing Diagram for Data Signals—Master Mode 7.4.3 PCM Timing Data—Master Mode Symbol Parameter Condition Min Typ Max Units FBCLK Bit clock frequency -- -- 2/2.048 -- MHz Duty CycleBCLK Bit clock duty cycle -- 0.4 0.5 0.
LS001ONWAS Datasheet Lu x Co s h nf ar id een IC tia T l 7.4.
LS001ONWAS Datasheet 7.4.5 PCM Timing Data—Slave Mode Parameter Condition Min Typ Max Lu x Co s h nf ar id een IC tia T l Symbol Units FBCLK Bit clock frequency -- -- 2/2.048 -- MHz Duty CycleBCLK Bit clock duty cycle -- 0.4 0.5 0.
LS001ONWAS Datasheet 9. RF Exposure Warning 10. User manual Warning re This equipment must be installed and operated in accordance with provided instructions and the antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter.