Data Sheet

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Datasheet

LC840PA Series

Version 1.1

Summary of content (54 pages)

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Datasheet LC840PA Series Version 1.
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LC840PA Datasheet REVISION HISTORY Version Date 1.0 21 Sept 2021 Initial version 1.1 19 Oct 2021 Corrected FCC ID https://www.lairdconnect.
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LC840PA Datasheet CONTENTS 1 Overview and Key Features................................................................................................................................................... 5 2 Specification........................................................................................................................................................................... 6 3 Hardware Specifications .......................................................................................
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LC840PA Datasheet 7 6.1 Circuit ......................................................................................................................................................................... 39 6.2 PCB Layout on Host PCB - General ........................................................................................................................... 41 6.3 PCB Layout on Host PCB for the 453-00087 w/integrated PCB trace antenna ..........................................................
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LC840PA Datasheet 1 OVERVIEW AND KEY FEATURES The LC840PA module firmware (Laird Connectivity ProFLEX-like firmware) only supports 2405–2480 MHz IEEE 802.15.5-2006 radio transceiver, 250kbps operation. All references to Bluetooth Low Energy (Bluetooth LE), NFC and smartBASIC firmware in this LC840PA datasheet are to be ignored. The standard BL654PA module comes with smartBASIC firmware which supports Bluetooth Low Energy (Bluetooth LE) and NFC.
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LC840PA Datasheet 2 SPECIFICATION 2.1 Specification Summary Categories/Feature Implementation Wireless Specification Bluetooth® IEEE 802.15.4-2006 250kbps PHY (Laird FCC and ISED certified for HW with Laird supplied FW only, customer must implement in their FW conditions in Note 1, Note 2) ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ BT 5.1 – Single mode 4x Range (CODED PHY support) – BT 5.1 2x Speed (2M PHY support) – BT 5.1 Concurrent master, slave Diffie-Hellman based pairing (LE Secure Connections) – BT 4.
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LC840PA Datasheet Categories/Feature Implementation NFC NFC-A Listen mode compliant System Wake-On-Field function Based on NFC forum specification ▪ 13.
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LC840PA Datasheet Categories/Feature Implementation I2S One inter-IC sound interface PDM One pulse density modulation interface Optional (External to the LC840PA module) External 32.768 kHz crystal For customer use, connect +/-20 ppm accuracy crystal for more accurate protocol timing. Crystal is required for IEEE 802.15.4 operation.
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LC840PA Datasheet Categories/Feature Implementation Physical Dimensions 22.0 mm x 10 mm x 2.2 mm Pad Pitch – 0.
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LC840PA Datasheet Module Specification Notes: Note 5 Use of the internal DCDC convertor or LDO is decided by the underlying Bluetooth LE stack. Note 6 For BL654PA (not LC840PA) Bluetooth LE coded PHY 125kbps (s=8), the conducted RF TX power is limited to 14 dBm (conducted) to be within the FCC/ISED TX power spectral density limit. 3 HARDWARE SPECIFICATIONS 3.1 Block Diagram and Pin-out Figure 1: LC840PA block diagram https://www.lairdconnect.
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LC840PA Drivers I/O, ADC, UART, I2C, SPI, NFC, USB Datasheet Customer-Specific Application Non-Volatile Data Store IEEE 802.15.4 Stack NFC Stack USB Stack Figure 2: Functional HW and SW block diagram for LC840PA Bluetooth LE module Figure 3: LC840PA module pin-out (top view). Outer row pads (long red line) and inner row pads (short red line) shown. https://www.lairdconnect.
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LC840PA Datasheet 3.2 Pin Definitions Table 1: Pin definitions Pin # Pin Name Default Function Alternate Function In/ Out Pull Up/ Down 0 GND - - - 1 SWDIO SWDIO - 2 DO NOT CONNECT/NC No Connect 3 SWDCLK SWDCLK 4 DO NOT CONNECT/NC No Connect 5 SIO_35/ nAutoRUN 6 SIO_33 SIO_33 7 SIO_32 SIO_32 8 SIO_25 9 nRF52840 QFN Pin nRF52840 QFN Name - - - - IN PULLUP AC24 SWDIO - IN PULLUP U24 P1.04 - IN PULLDOWN AA24 SWDCLK - - PULLUP W24 P1.
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LC840PA Datasheet Pin # Pin Name Default Function Alternate Function In/ Out Pull Up/ Down 20 SIO_13 SIO_13 - IN 21 SIO_16 SIO_16 - 22 SIO_14 SIO_14 23 GND - 24 VBUS 25 VDD_HV - - - - - - 3.0V to 5.5V 26 GND - - - - - - - 27 SIO_11 SIO_11 - IN PULLUP T2 PO.11 Laird Devkit: BUTTON1 28 SIO_12 SIO_12 - IN PULLUP U1 PO.12 BUTTON2 PO.08 smartBASIC:UARTCLOSE() selects DIO functionality.
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LC840PA Datasheet Pin # 35 Pin Name SIO_06/ UART_TX Default Function SIO_06 Alternate Function UART_TX In/ Out Pull Up/ Down OUT Set High in FW nRF52840 QFN Pin nRF52840 QFN Name Comment smartBASIC:UARTCLOSE() selects DIO functionality. L1 PO.06 UARTOPEN() selects UART COMMS behavior ProFLEX: HOST_UART_TX 36 SIO_26/ I2C_SDA 37 SIO_07/ UART_CTS SIO_07 38 SIO_27/ I2C_SCL SIO_27 39 SIO_05/ UART_RTS/ AIN3 SIO_26 SIO_05/ UART_RTS IN PULLUP UART_RTS IN PULLDOWN M2 PO.
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LC840PA Datasheet Pin # Pin Name Default Function Alternate Function In/ Out Pull Up/ Down 51 SIO_46 SIO_46 - IN 52 GND - - 53 SIO_47 SIO_47 54 SIO_44 55 nRF52840 QFN Pin nRF52840 QFN Name PULLUP B15 P1.14 - - - - - - - IN PULLUP A14 P1.15 - SIO_44 - IN PULLUP B17 P1.12 Laird Devkit: SPI EEPROM. SPI_Eeprom_CS, Input GND - - - - - - - 56 SIO_45 SIO_45 - IN PULLUP A16 P1.13 - 57 NFC2/ SIO_10 NFC2 SIO_10 IN - J24 PO.
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LC840PA Datasheet Pin # Pin Name Default Function Alternate Function In/ Out Pull Up/ Down 76 GND - - - 77 GND - - 78 GND - 79 GND - nRF52840 QFN Pin nRF52840 QFN Name - - - Added GND in the LC840PA - - - - Added GND in the LC840PA - - - - - Added GND in the LC840PA - - - - - Added GND in the LC840PA Comment Pin Definition Notes: Note 1 SIO = Signal Input or Output. Secondary function is selectable in smartBASIC application or via Nordic SDK.
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LC840PA Datasheet Pin Definition Notes: Note 8 The smartBASIC firmware has SIO pins as Digital (Default Function) INPUT pins, which are set PULL-UP by default. This avoids floating inputs (which can cause current consumption to drive with time in low power modes (such as Standby Doze). You can disable the PULL-UP through your smartBASIC application.
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LC840PA Datasheet 3.3 Electrical Specifications 3.3.1 Absolute Maximum Ratings Absolute maximum ratings for supply voltage and voltages on digital and analogue pins of the module are listed below; exceeding these values causes permanent damage. Table 2: Maximum current ratings Parameter Min Max Unit Voltage at VDD pin -0.3 +3.9 (Note 1) V Voltage at VDD_HV pin -0.3 +5.5 V VBUS -0.3 +5.8 V 0 V Voltage at SIO pin (at VDD≤3.6V) -0.3 VDD +0.3 V Voltage at SIO pin (at VDD≥3.6V) -0.
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LC840PA Datasheet Recommended Operating Parameters Notes: Note 1 4.7 uF internal to module on VDD. The internal DCDC convertor or LDO is decided by the underlying Bluetooth LE stack. For IEEE802.15.4:2006 operation, the internal DCDC convertor is enabled to minimize power consumption. Note 2 This is the maximum VDD or VDD_HV ripple or noise (at any frequency) that does not disturb the radio.
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LC840PA Datasheet Signal Levels Notes: Note 1 For VDD≥1.7V. The firmware supports high drive (3 mA, as well as standard drive). Note 2 For VDD≥2.7V. The firmware supports high drive (5 mA (since VDD≥2.7V), as well as standard drive). The GPIO (SIO) high reference voltage always equals the level on the VDD pin. ▪ ▪ Normal voltage mode – The GPIO high level equals the voltage supplied to the VDD pin High voltage mode – The GPIO high level equals the level specified (is configurable to 1.8V, 2.1V, 2.
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LC840PA Datasheet Recommended Operating Parameters Notes: frequency of 1/5us = 200kHz. Similarly, if acquisition time of 40us chosen, then the conversion time is 42us and the maximum sampling frequency is 1/42us = 23.8 kHz. Note 3 3.4 ADC input impedance is estimated mean impedance of the ADC (AIN) pins. Programmability 3.4.1 LC840PA Default Firmware The LC840PA module comes loaded with a customer specific Laird ProFLEX-like firmware application that is IEEE802.15.4 compliant.
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LC840PA Datasheet 4 POWER CONSUMPTION Data at VDD of 3.3 V with internal (to chipset) LDO ON or with internal (to chipset) DCDC ON (see Power Consumption Note 1) and 25ºC. 4.1 Power Consumption Table 9: Power consumption Parameter Min Active mode ‘peak’ current (Note 1) Typ Max Unit With DCDC [with LDO] (Advertising or Connection) Tx only run peak current @ Txpwr = +18 dBm 102.2 [112.7] mA Tx only run peak current @ Txpwr = +14 dBm 65.9 [77.
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LC840PA Datasheet Power Consumption Notes: ▪ LFRC (0.7 uA) and RTC (0.1uA) running as well as 256k RAM retention (1.4 uA) – This adds to the total of 3.1 uA typical. The RAM retention is 20nA per 4k block (1.28uA), but this can vary to 30nA per 4k block (1.92uA) which would make the total 3.7uA. ▪ Note 3 In Deep Sleep (System OFF), everything is disabled, and the only wake-up sources (including NFC to wakeup) are reset and changes on SIO or NFC pins on which sense is enabled.
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LC840PA Datasheet Table 11: SPI power consumption Typ Parameter Min With With DCDC (REG1) LDO (REG1) Max Unit SPI Master Run current @ 2 Mbps - 803 1040 - uA SPI Master Run current @ 8 Mbps - 803 1040 - uA Idle current for SPI (no activity) - <1 <1 - uA SPI bit rate - 8 Mbps - Table 12: I2C power consumption Typ Parameter Min With With DCDC (REG1) LDO (REG1) Max Unit I2C Run current @ 100 kbps - 967 1250 - uA I2C Run current @ 400 kbps - 967 1250 - uA Id
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LC840PA Datasheet 5 FUNCTIONAL DESCRIPTION To provide the widest scope for integration, a variety of physical host interfaces/sensors are provided. The major LC840PA module functional blocks described below. 5.1 Power Management Power management features: ▪ ▪ ▪ ▪ ▪ System Standby Doze (System ON Idle) and Deep Sleep (System OFF) modes Open/Close peripherals (UART, SPI, QSPI, I2C, SIO’s, ADC, NFC).
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LC840PA Datasheet The LC840PA power supply system enters one of two supply voltage modes, normal or high voltage mode, depending on how the external supply voltage is connected to these pins. LC840PA power supply options: ▪ Option 1 – Normal voltage power supply mode entered when the external supply voltage is connected to both the VDD and VDD_HV pins (so that VDD equals VDD_HV). Connect external supply within range 3.0V to 3.6V range to LC840PA VDD and VDD_HV pins.
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LC840PA Datasheet Power Supply Option Notes: Note 2 Option 2 – External supply within range 3.0V to 5.5V range to the LC840PA VDD_HV pin ONLY. LC840PA VDD pin left unconnected. In High voltage mode, the VDD pin becomes an output voltage pin. It can be used to supply external circuitry from the VDD pin. Before any current can be taken from the LC840PA VDD pin, this feature must be enabled in the LC840PA. Additionally, the VDD output voltage is configurable from 1.8V to 3.3V with possible settings of 1.
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LC840PA Datasheet 5.3 Clocks and Timers 5.3.1 Clocks The integrated high accuracy 32 MHz (±10 ppm) crystal oscillator helps with radio operation and reducing power consumption in the active modes. The integrated on-chip 32.768 kHz LFRC oscillator (±500 ppm) provides protocol timing and helps with radio power consumption in the system StandByDoze and Deep Sleep modes by reducing the time that the RX window needs to be open. To keep the on-chip 32.
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LC840PA Datasheet 5.5 NFC NFC support: ▪ Based on the NFC forum specification – 13.56 MHz – Date rate 106 kbps – NFC Type 2 and Type 4 tag emulation ▪ Modes of operation: – Disable – Sense – Activated 5.5.1 Use Cases ▪ ▪ ▪ ▪ Touch to pair with NFC Launch a smartphone app (on Android) NFC enabled Out-of-Band Pairing System Wake-On-Field function – Proximity Detection – The ProFLEX firmware does not use NFC.
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LC840PA Datasheet An antenna inductance of Lant = 0.72 uH provides tuning capacitors in the range of 300 pF on each pin. The total capacitance on NFC1 and NFC2 must be matched. Cint and Cp are small usually (Cint is 4pF), so can be omitted from calculation. Battery Protection Note: If the NFC coil antenna is exposed to a strong NFC field, the supply current may flow in the opposite direction due to parasitic diodes and ESD structures.
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LC840PA Datasheet Table 17: UART interface Signal Name Pin No I/O Comments SIO_06 / UART_Tx 35 O SIO_06 (alternative function UART_Tx) is an output, set high (in firmware). SIO_08 / UART_Rx 29 I SIO_08 (alternative function UART_Rx) is an input, set with internal pull-up (in firmware). SIO_05 / UART_RTS 39 O SIO_05 (alternative function UART_RTS) is an output, set low (in firmware).
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LC840PA Datasheet 5.9 Signal Name Pin No I/O Comments Any_SIO/SPI_CS 54 I SPI_CS is implemented using any spare SIO digital output pins to allow for multi-dropping. On Laird devboard SIO_44 (pin54) used as SPI_CS. I2C Interface The I2C interface is an alternate function on SIO pins. The ProFLEX firmware does not use the I2C interface. The two-wire interface can interface a bi-directional wired-OR bus with two lines (SCL, SDA) and has master/slave topology.
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LC840PA Datasheet Signal Name 5.10.3 Pin No I/O Comments Configurable acquisition time 3uS, 5uS, 10uS(default), 15uS, 20uS, 40uS. SIO_29/AIN5 – Analog Input 48 I SIO_28/AIN4 – Analog Input 46 I Full scale input range (VDD) PWM Signal Output on up to 16 SIO Pins The PWM output is an alternate function on ALL (GPIO) SIO pins, configurable by smartBASIC. The ProFLEX firmware does not use the PWM interface. The PWM output signal has a frequency and duty cycle property.
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LC840PA Datasheet Signal Name Pin No I/O Comments SWDIO 1 I/O Internal pull-up resistor SWDCLK 3 I Internal pull-down resistor The Laird development board incorporates an on-board JTAG J-link programmer for this purpose. There is also the following JTAG connector which allows on-board JTAG J-link programmer signals to be routed off the development board. The only requirement is that you should use the following JTAG connector on the host PCB.
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LC840PA Datasheet 5.13.2 Low Power Modes The LC840PA has three power modes: Run, Standby Doze (System ON Idle), and Deep Sleep (System OFF). The module is placed automatically in Standby Doze if there are no pending events (when WAITEVENT statement is encountered within a customer’s smartBASIC script). The module wakes from Standby Doze via any interrupt (such as a received character on the UART Rx line). If the module receives a UART character from either the external UART or the radio, it wakes up.
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LC840PA Datasheet 5.16 External 32.768 kHz Crystal This is not required for normal BL654PA module operation. The ProFLEX firmware requires the external 32.768kHz crystal to enable high baud rate communications and ensure lowest power operation in sleep mode. The LC840PA uses the on-chip 32.76 kHz RC oscillator (LFCLK) by default (which has an accuracy of ±500 ppm) which requires regulator calibration (every eight seconds) to within ±500 ppm. This is insufficient for ProFLEX operation.
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LC840PA Datasheet Table 24: Optional external 32.768 kHz crystal specification Optional external 32.768kHz crystal Min Typ Max Crystal Frequency - 32.768 kHz - Frequency tolerance requirement of Bluetooth LE stack - - ±500 ppm Load Capacitance - - 12.5 pF Shunt Capacitance - - 2 pF Equivalent series resistance - - 100 kOhm Drive level - - 1 uW Input capacitance on XL1 and XL2 pads - 4 pF - Run current for 32.768 kHz crystal based oscillator - 0.
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LC840PA Datasheet Y Y X Figure 8: 453-00087 on-board PCB antenna performance (Antenna Gain and S11 – whilst 453-00087 module sitting on Devboard 45500022) https://www.lairdconnect.
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LC840PA Datasheet 6 HARDWARE INTEGRATION SUGGESTIONS 6.1 Circuit The LC840PA is easy to integrate, requiring no external components on your board apart from those which you require for development and in your end application. The following are suggestions for your design for the best performance and functionality.
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LC840PA Datasheet ▪ ▪ ▪ – Interactive / development mode (nAutoRUN pin held at VDD). Make provision to allow operation in the required mode. Add jumper to allow nAutoRUN pin to be held high or low (LC840PA has internal 13K pull-down by default) OR driven by host GPIO. I2C It is essential to remember that pull-up resistors on both I2C_SCL and I2C_SDA lines are not provided in the LC840PA module and MUST be provided external to the module as per I2C standard if I2C is utilized..
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LC840PA Datasheet 6.2 PCB Layout on Host PCB - General Checklist (for PCB): ▪ ▪ ▪ ▪ ▪ ▪ ▪ 6.3 MUST locate LC840PA module close to the edge of PCB (mandatory for the 453-00087 for on-board PCB trace antenna to radiate properly). Use solid GND plane on inner layer (for best EMC and RF performance). All module GND pins MUST be connected to host PCB GND. Place GND vias close to module GND pads as possible.
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LC840PA Antenna Keep-out Datasheet Figure 9: PCB trace Antenna keep-out area (shown in red), corner of the LC840PA development board for the 453-00087 module. Antenna Keep-out Notes: Note 1 The LC840PA module is placed on the edge, preferably edge centre of the host PCB. Note 2 Copper cut-away on all layers in the Antenna Keep-out area under the 453-00087 on host PCB. 6.3.
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LC840PA Datasheet 6.4 External Antenna Integration with the 453-00088 Please refer to the regulatory sections for FCC, ISED for details of use of LC840PA-with external antennas in each regulatory region. The LC840PA family has been designed to operate with the below external antennas (with a maximum gain of 2.0 dBi). The required antenna impedance is 50 ohms. See Table 25. External antennas improve radiation efficiency.
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LC840PA Datasheet 7 MECHANICAL DETAILS 7.1 LC840PA Mechanical Details Figure 10: LC840PA mechanical drawings Development Kit Schematics for the LC840PA can be found in the software downloads tab of the BL654PA product page: https://www.lairdconnect.com/bl654-pa https://www.lairdconnect.
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LC840PA Datasheet 7.2 Host PCB Land Pattern and Antenna Keep-Out for the 453-00087 Figure 11: Land pattern and Keep-out for the 453-00087 All dimensions are in mm. Host PCB Land Pattern and Antenna Keep-out for the 453-00087 Notes: Note 1 Ensure there is no copper in the antenna ‘keep out area’ on any layers of the host PCB. Also keep all mounting hardware or any metal clear of the area (Refer to 6.3.2) to reduce effects of proximity detuning the antenna and to help antenna radiate properly.
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LC840PA Datasheet 8 APPLICATION NOTE FOR SURFACE MOUNT MODULES 8.1 Introduction Laird Technologies surface mount modules are designed to conform to all major manufacturing guidelines. This application note is intended to provide additional guidance beyond the information that is presented in the User Manual. This Application Note is considered a living document and will be updated as new information is presented.
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LC840PA Datasheet 8.2.2 Carton Contents The following are the contents of the carton shipped for the LC840PA modules. # Item Qty # Item Qty 1 Module 1 7 Drier (60 g) 1/1000 2 Cover Tape (1/1000)*20m 8 Humidity Card 1/1000 3 Carrier Tape (1/1000)*20m 9 Bag 1/1000 4 Reel 1/box 5/carton 10 Bubble Cloth 1/1000 5 Foam Belt 1/1000 11 Box 1/1000 5/carton 6 Protective Band 1/1000 12 Carton 1/1000 8.2.3 Labeling The following labels are included in each shipment.
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LC840PA Datasheet Figure 14: Reel/bag/box label Figure 16: MSL label Figure 15: Carton label 8.3 Reflow Parameters Prior to any reflow, it is important to ensure the modules were packaged to prevent moisture absorption. New packages contain desiccate (to absorb moisture) and a humidity indicator card to display the level maintained during storage and shipment. If directed to bake units on the card, see Table 26 and follow instructions specified by IPC/JEDEC J-STD-033.
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LC840PA Datasheet Figure 17: Recommended reflow temperature Temperatures should not exceed the minimums or maximums presented in Table 27. Table 27: Recommended maximum and minimum temperatures Value Unit Temperature Inc./Dec. Rate (max) Specification 1~3 °C / Sec Temperature Decrease rate (goal) 2-4 °C / Sec .
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LC840PA Datasheet 9 REGULATORY INFORMATION Note: For complete regulatory information, refer to the LC840PA Regulatory Information document. The LC840PA holds current certifications in the following countries: Country/Region Regulatory ID USA (FCC) SQG-LC840PA Canada (ISED) https://www.lairdconnect.
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LC840PA Datasheet 10 ORDERING INFORMATION Part Number 11 Product Description 453-00087 LC840PA ProFLEX compatible PA module – Integrated antenna 453-00088 LC840PA ProFLEX compatible PA module – External antenna 455-00022 Development Kit for 453-00087 module – Integrated antenna 455-00023 Development Kit for the 453-00088 module – External antenna 453-00087R LC840PA ProFLEX compatible PA module – Integrated antenna T/R 453-00088R LC840PA ProFLEX compatible PA module – External antenna T/R BL
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LC840PA Datasheet Once all the relevant sections of step 1 are finished, complete steps 2, 3, and 4 as described in the help document. Your new Design will be listed on the SIG website and you can print your Certificate and Declaration of Conformity. For further information, please refer to the following training material: https://www.bluetooth.
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LC840PA Datasheet End Product Laird RF-PHY Nordic LL Host Layers Profiles Figure 18: Scope of the qualification for an End Product Design The first step is to generate a project on the TPG (Test Plan Generator) system. This determines which test cases apply to demonstrate compliance with the Bluetooth Test Specifications.
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LC840PA Datasheet 12 RELIABILITY TESTS The LC840PA module went through the below reliability tests and passed. Test Sequence Test Item Test Limits and Pass 1 Vibration Test JESD22-B103B Vibration, Variable frequency 2 Mechanical Shock JESD22-B104C 3 Thermal Shock JESD22-A104E Temperature cycling Test Conditions Sample: Unpowered Sample number: 3 Vibration waveform: Sine waveform Vibration frequency /Displacement: 20 to 80 Hz /1.