Version 2.
Version Date 1.0 24 June 2018 1.1 Notes Contributor(s) Approver Initial Production Release Raj Khatri Jonathan Kaye 29 June 2018 Added certification and BT SIG information Tom Smith Jonathan Kaye 1.2 04 Sept 2018 Added new product photos; updated BT SIG and Ordering information Sue White Jonathan Kaye 1.3 20 Sept 2018 Corrected antenna type for FlexPIFA / FlexNotch in Table 25. Mark Wolski Sue White 1.4 03 Oct 2018 Added note re: no support for Nordic SDK.
1 2 3 Overview and Key Features ................................................................................................................................................... 4 Specification........................................................................................................................................................................... 5 Hardware Specifications ......................................................................................................................
Every BL654 Series module is designed to simplify OEMs enablement of Bluetooth Low Energy (BLE) v5.1 and Thread (802.15.4) to small, portable, power-conscious devices. The BL654 provides engineers with considerable design flexibility in both hardware and software programming capabilities.
Categories/Feature Implementation Wireless Specification Bluetooth® Frequency Raw Data Rates ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ BT 5.1 – Single mode 4x Range (CODED PHY support) – BT 5.1 2x Speed (2M PHY support) – BT 5.1 LE Advertising Extensions – BT 5.1 Concurrent master, slave BLE Mesh capabilities Diffie-Hellman based pairing (LE Secure Connections) – BT 4.2 Data Packet Length Extension – BT 4.2 Link Layer Privacy (LE Privacy 1.2) – BT 4.2 LE Dual Mode Topology – BT 4.1 LE Ping – BT 4.1 2.402 - 2.
Categories/Feature Implementation Host Interfaces and Peripherals Total 48 x multifunction I/O lines 2 UARTs Tx, Rx, CTS, RTS UART DCD, RI, DTR, DSR (See Note 2Note 1 in the Module Specification Notes) Default 115200, n, 8, 1 From 1,200 bps to 1 Mbps USB 2.0 FS (Full Speed, 12Mbps). USB CDC driver / Virtual UART (baud rate TBD) Other USB drivers available via Nordic SDK Up to 48, with configurable: I/O direction, GPIO O/P drive strength (standard 0.
Categories/Feature Implementation Profiles Services supported ▪ ▪ ▪ ▪ Central Mode Peripheral Mode Mesh (with custom models) Custom and adopted profiles Programmability smartBASIC FW upgrade via JTAG or UART Application download via UART or Via Over-the-Air (if SIO_02 pin is pulled high externally) Nordic SDK Via JTAG Note: Nordic SDK is not supported on the BL654 USB dongle, part #451-00003. Operating Modes smartBASIC Self-contained Run mode Selected by nAutoRun pin status: LOW (0V).
Categories/Feature Implementation Physical Dimensions 15.0 mm x 10 mm x 2.2 mm Pad Pitch – 0.
Figure 1: BL654 block diagram Figure 2: Functional HW and SW block diagram for BL654 series BLE module https://www.lairdconnect.com/wirelessmodules/bluetooth-modules/bluetooth-5modules/bl654-series-bluetooth-module-nfc 9 © Copyright 2020 Laird Connectivity, Inc..
Figure 3: BL654 module pin-out (top view). Outer row pads (long red line) and inner row pads (short red line) shown. Table 1: Pin definitions Pin Default Pin Name # Function 0 GND - Alternate Function In/ Out - nRF52840 QFN Pin nRF52840 QFN Name Comment - - - - - IN PULLUP AC24 SWDIO - IN PULLUP U24 P1.04 - 1 SWDIO SWDIO 2 SIO_36 SIO_36 3 SWDCLK SWDCLK - IN PULLDOWN AA24 SWDCLK 4 SIO_34 SIO_34 - - PULLUP W24 P1.
Pin # Pin Name Default Function Alternate Function In/ Out 8 SIO_25 SIO_25 - IN 9 SIO_23 SIO_23 QSPI_DIO3 IN 10 SIO_24 SIO_24 11 SIO_22 SIO_22 QSPI_DIO2 IN 12 SIO_21 SIO_21 QSPI_DIO1 IN 13 SIO_20 SIO_20 QSPI_DIO0 IN 14 SIO_19 SIO_19 QSPI_CLK IN 15 D+ D+ - IN 16 SIO_17 SIO_17 QSPI_CS IN 17 D- D- - IN IN Pull Up/ Down nRF52840 QFN Pin nRF52840 QFN Name PULLUP AC21 PO.25 Laird Devkit: BUTTON4 PULLUP AC19 PO.23 - AD20 PO.
Pin # Pin Name Default Function Alternate Function In/ Out Pull Up/ Down nRF52840 QFN Pin nRF52840 QFN Name 30 SIO_41/ SPI_CLK SIO_41 SPI_CLK IN PULLUP 31 VDD - - - - 32 SIO_40/ SPI_MOSI SIO_40 SPI_MOSI IN PULLUP P2 P1.08 33 GND - - - - - - 34 SIO_04/ AIN2/ SPI_MISO SIO_04 AIN2/ SPI_MISO IN PULLUP J1 PO.04/AIN2 R1 P1.09 Comment Laird Devkit: SPI EEPROM.
Pin # Pin Name Default Function Alternate Function In/ Out Pull Up/ Down nRF52840 QFN Pin nRF52840 QFN Name Comment 39 SIO_05/ UART_RTS/ AIN3 SIO_05 UART_RTS/ AIN3 OUT Set Low in FW K2 PO.05/AIN3 UARTCLOSE() selects DIO functionality. UARTOPEN() selects UART COMMS behaviour 40 GND - - - - - - - PO.01/XL2 Laird Devkit: Optional 32.768kHz crystal pad XL2 and associated load capacitor. 41 SIO_01/ XL2 SIO_01 XL2 IN PULLUP F2 42 SIO_00/ XL1 SIO_00 XL1 IN PULLUP D2 PO.
Pin # Default Function Alternate Function In/ Out Pull Up/ Down nRF52840 QFN Pin nRF52840 QFN Name Comment NFC2/ SIO_10 NFC2 SIO_10 IN - J24 PO.10/NFC2 - 58 GND - - - - - - - 59 NFC1/ SIO_09 NFC1 SIO_09 IN - L24 PO.09/NFC1 - 60 SIO_43 SIO_43 - IN PULLUP B19 P1.11 - 61 SIO_37 SIO_37 - IN PULLUP T23 P1.05 - 62 SIO_42 SIO_42 - IN PULLUP A20 P1.10 - N/C - IN PULLUP R24 P1.06 Reserved for future use. Do not connect.
Pin Definition Notes: Note 6 Ensure that SIO_02 (pin 50) and AutoRUN (pin 5) are not both high (externally), in that state, the UART is bridged to Virtual Serial Port service; the BL654 module does not respond to AT commands and cannot load smartBASIC application scripts. Note 7 Pin 5 (nAutoRUN) is an input, with active low logic. In the development kit it is connected so that the state is driven by the host’s DTR output line.
Absolute maximum ratings for supply voltage and voltages on digital and analogue pins of the module are listed below; exceeding these values causes permanent damage. Table 2: Maximum current ratings Parameter Min Max Unit Voltage at VDD pin -0.3 +3.9 (Note 1) V Voltage at VDD_HV pin -0.3 +5.8 V VBUS -0.3 +5.8 V 0 V Voltage at SIO pin (at VDD≤3.6V) -0.3 VDD +0.3 V Voltage at SIO pin (at VDD≥3.6V) -0.3 3.
Recommended Operating Parameters Notes: Note 1 4.7 uF internal to module on VDD. The internal DCDC convertor or LDO is decided by the underlying BLE stack. Note 2 This is the maximum VDD or VDD_HV ripple or noise (at any frequency) that does not disturb the radio. Note 3 The on-board power-on reset circuitry may not function properly for rise times longer than the specified maximum.
Parameter Min Typ Max Unit Pad capacitance 3 pF Pad capacitance at NFC pads 4 pF Signal Levels Notes: Note 1 For VDD≥1.7V. The firmware supports high drive (3 mA, as well as standard drive). Note 2 For VDD≥2.7V. The firmware supports high drive (5 mA (since VDD≥2.7V), as well as standard drive). The GPIO (SIO) high reference voltage always equals the level on the VDD pin.
Recommended Operating Parameters Notes: Default pre-scaling is 1/6 which configurable via smartBASIC. Note 2 Firmware allows configurable resolution (8-bit, 10-bit or 12-bit mode) and acquisition time. BL654 ADC is a Successive Approximation type ADC (SSADC), as a result no external capacitor is needed for ADC operation. Configure the acquisition time according to the source resistance that customer has. The sampling frequency is limited by the sum of sampling time and acquisition time.
Data at VDD of 3.3 V with internal (to chipset) LDO ON or with internal (to chipset) DCDC ON (see Power Consumption Note 1) and 25ºC. Table 9: Power consumption Parameter Min Active mode ‘peak’ current (Note 1) Typ Max Unit With DCDC [with LDO] (Advertising or Connection) Tx only run peak current @ Txpwr = +8 dBm 14.8 [32.7] mA Tx only run peak current @ Txpwr = +4 dBm 9.6 [21.4] mA Tx only run peak current @ Txpwr = 0 dBm 4.8 [10.6] mA Tx only run peak current @ Txpwr = -4 dBm 3.1 [8.
Power Consumption Notes: possible to close the UART and get to the 3.1 uA current consumption regime and still be able to detect for incoming data and be woken up so that the UART can be re-opened at expense of losing that first character. The BL654 Standby Doze current consists of the below nRF52840 blocks: ▪ nRF52 System ON IDLE current (no RAM retention) (0.7 uA) – This is the base current of the CPU ▪ LFRC (0.7 uA) and RTC (0.1uA) running as well as 256k RAM retention (1.
The values below are calculated for a typical operating voltage of 3V. Table 10: UART power consumption Typ Parameter Min WITH DCDC(REG1) WITH LDO(REG1) Max Unit UART Run current @ 115200 bps - 729 951 - uA UART Run current @ 1200 bps - 729 951 - uA Idle current for UART (no activity) - 29 29 - uA 1000 kbps UART Baud rate 1.
To provide the widest scope for integration, a variety of physical host interfaces/sensors are provided. The major BL654 series module functional blocks described below. Power management features: ▪ ▪ ▪ ▪ ▪ System Standby Doze and Deep Sleep modes Open/Close peripherals (UART, SPI, QSPI, I2C, SIO’s, ADC, NFC).
BL654 power supply options: ▪ Option 1 – Normal voltage power supply mode entered when the external supply voltage is connected to both the VDD and VDD_HV pins (so that VDD equals VDD_HV). Connect external supply within range 1.7V to 3.6V range to BL654 VDD and VDD_HV pins. OR ▪ Option 2 – High voltage mode power supply mode (using BL654 VDD_HV pin) entered when the external supply voltage in ONLY connected to the VDD_HV pin and the VDD pin is not connected to any external voltage supply.
Power Supply Option Notes: External current draw (from VDD pin) allowed in High Voltage mode (supply on VDD_HV) when radio Tx RF power higher than 4dBm. 5 mA External current draw (from VDD pin) allowed in High Voltage mode (supply on VDD_HV) when radio Tx RF power lower than 4dBm. 25 mA Minimum difference between voltage supplied on VDD_HV pin and voltage on VDD pin Note 3 0.3 V External current draw is the sum of all GPIO currents and current being drawn from VDD.
▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ 2402–2480 MHz Bluetooth Low Energy radio BT 5.1 – 1 Mbps, 2 Mbps, and Long-range (125 kbps and 500 kbps) overthe-air data rate. Tx output power of +8 dBm programmable down to 7 dBm, 6 dBm, 5 dBm, 4 dBm, 2 dBm, 0 dBm and further down to -20 dBm in steps of 4 dB and final TX power level of -40 dBm. Receiver (with integrated channel filters) to achieve maximum sensitivity -95 dBm @ 1 Mbps BLE, -92 dBm @2 Mbps, 103 dBm @ 125 kbps long-range and -99 dBm @500kbps long-range).
From Nordic’s nRF52840 Objective Product Specification v1.0: http://infocenter.nordicsemi.com/pdf/nRF52840_PS_v1.0.pdf The NFC antenna coil must be the connected differential between the NFC1 and NFC2 pins of the BL654. Two external capacitors should be used to tune the resonance of the antenna circuit to 13.56 MHz (Figure 5). Figure 5: NFC antenna coil tuning capacitors The required external tuning capacitor value is given by the following equations: An antenna inductance of Lant = 0.
The module communicates with the customer application using the following signals: ▪ ▪ Port/TxD of the application sends data to the module’s UART_RX signal line Port/RxD of the application receives data from the module’s UART_TX signal line BL654 Figure 6: UART signals Note: The BL654 serial module output is at 3.3V CMOS logic levels (tracks VDD). Level conversion must be added to interface with an RS-232 level compliant interface.
(OPTION1) or VDD_HV pin (OPTION2). The SPI interface is an alternate function on SIO pins. The module is a master device that uses terminals SPI_MOSI, SPI_MISO, and SPI_CLK. SPI_CS is implemented using any spare SIO digital output pins to allow for multi-dropping. The SPI interface enables full duplex synchronous communication between devices. It supports a 3-wire (SPI_MOSI, SPI_MISO, SPI_SCK,) bidirectional bus with fast data transfers to and from multiple slaves.
▪ Wake-up from high or low-level triggers on all pins including NFC pins The ADC is an alternate function on SIO pins, configurable by smart BASIC or Nordic SDK. The BL654 provides access to 8-channel 8/10/12-bit successive approximation ADC in one-shot mode. This enables sampling up to 8 external signals through a front-end MUX. The ADC has configurable input and reference pre-scaling and sample resolution (8, 10, and 12 bit).
The BL654 Firmware hex file consists of four elements: ▪ smartBASIC runtime engine ▪ Nordic Softdevice ▪ Master Bootloader Laird Connectivity BL654 smartBASIC firmware (FW) image part numbers are referenced as w.x.y.z (ex. v29.x.y.z). The BL654 smartBASIC runtime engine and Softdevice combined image can be upgraded by the customer over the UART interface.
Wake the BL654 from the host using wake-up pins (any SIO pin). You may configure the BL654’s wakeup pins via smartBASIC to do any of the following: ▪ ▪ ▪ Wake up when signal is low Wake up when signal is high Wake up when signal changes Refer to the smartBASIC user guide for details. You can access this guide from the Laird Connectivity BL654 product page. For BL654 wake-up using the Nordic SDK, refer to Nordic infocenter.nordicsemi.com. The BL654 has three power modes: Run, Standby Doze, and Deep Sleep.
The BL654 supports readback protection capability that disallows the reading of the memory on the nrf52840 using a JTAG interface. Available via smartBASIC or the Nordic SDK. The BL654 offers a range of functions for generating public/private keypair, calculating a shared secret, as well as generating an authenticated hash. Available via smartBASIC or the Nordic SDK. This is not required for normal BL654 module operation. The BL654 uses the on-chip 32.
BL654 On-chip 32.768 kHz RC Oscillator (±500 ppm) LFRC Optional External Higher Accuracy (±20 ppm) 32.768 kHz Crystal-based Oscillator LFXO in a total average current of: LFRC + CAL = 3.1 + 2 = 5.1 uA Total Summary 5.1 uA ▪ ▪ 2.6 uA ▪ ▪ ▪ Low current consumption Accuracy 500 ppm Lowest current consumption Needs external crystal High accuracy (depends on the crystal, usually 20 ppm) Table 24: Optional external 32.768 kHz crystal specification Optional external 32.
The 451-00001 on-board PCB trace monopole antenna radiated performance depends on the host PCB layout. The BL654 development board was used for BL654 development and the 451-00001 PCB antenna performance evaluation. To obtain similar performance, follow guidelines in section PCB Layout on Host PCB for the 451-00001 to allow the on-board PCB antenna to radiate and reduce proximity effects due to nearby host PCB GND copper or metal covers.
Figure 8: 451-00001 on-board PCB antenna performance (Antenna Gain and S11 – whilst 451-00001 module sitting on Devboard 455-00001) Note: The BL654-US Dongle User Guide is available in the Documentation section of the Laird Connectivity BL654 product page – https://www.lairdconnect.com/wireless-modules/bluetooth-modules/bluetooth-5-modules/bl654-series-bluetoothmodule-nfc https://www.lairdconnect.
Figure 9: 451-00003 USB BLE 5.1 Dongle Mechanical details https://www.lairdconnect.com/wirelessmodules/bluetooth-modules/bluetooth-5modules/bl654-series-bluetooth-module-nfc 37 © Copyright 2020 Laird Connectivity, Inc..
The BL654 is easy to integrate, requiring no external components on your board apart from those which you require for development and in your end application. The following are suggestions for your design for the best performance and functionality. Checklist (for Schematic): ▪ BL654 power supply options: Option 1 – Normal voltage power supply mode entered when the external supply voltage is connected to both the VDD and VDDH pins (so that VDD equals VDD_HV). Connect external supply within range 1.7V to 3.
▪ ▪ ▪ ▪ nAutoRUN pin and operating mode selection nAutoRUN pin needs to be externally held high or low to select between the two BL654 operating modes at power-up: – Self-contained Run mode (nAutoRUN pin held at 0V). – Interactive / development mode (nAutoRUN pin held at VDD). Make provision to allow operation in the required mode. Add jumper to allow nAutoRUN pin to be held high or low (BL654 has internal 13K pull-down by default) OR driven by host GPIO.
▪ ▪ ▪ Unused PCB area on surface layer can flooded with copper but place GND vias regularly to connect the copper flood to the inner GND plane. If GND flood copper is on the bottom of the module, then connect it with GND vias to the inner GND plane. Route traces to avoid noise being picked up on VDD, VDDH, VBUS supply and AIN (analogue) and SIO (digital) traces. Ensure no exposed copper is on the underside of the module (refer to land pattern of BL654 development board).
Antenna Keep-out Figure 10: PCB trace Antenna keep-out area (shown in red), corner of the BL654 development board for the 45100001 module. Antenna Keep-out Notes: Note 1 The BL654 module is placed on the edge, preferably edge centre of the host PCB. Note 2 Copper cut-away on all layers in the Antenna Keep-out area under the 451-00001 on host PCB.
Please refer to the regulatory sections for FCC, ISED, EU, and Japan for details of use of BL654-with external antennas in each regulatory region. The BL654 family has been designed to operate with the below external antennas (with a maximum gain of 2.0 dBi). The required antenna impedance is 50 ohms. See Table 25. External antennas improve radiation efficiency.
Rear View Figure 11: BL654 mechanical drawings Development Kit Schematics can be found in the software downloads tab of the BL654 product page – https://www.lairdconnect.com/wireless-modules/bluetooth-modules/bluetooth-5-modules/bl654-series-bluetooth-module-nfc https://www.lairdconnect.com/wirelessmodules/bluetooth-modules/bluetooth-5modules/bl654-series-bluetooth-module-nfc 43 © Copyright 2020 Laird Connectivity, Inc..
Figure 12: Land pattern and Keep-out for the 451-00001 All dimensions are in mm. Host PCB Land Pattern and Antenna Keep-out for the 451-00001 Notes: Note 1 Ensure there is no copper in the antenna ‘keep out area’ on any layers of the host PCB. Also keep all mounting hardware or any metal clear of the area (Refer to 6.3.2) to reduce effects of proximity detuning the antenna and to help antenna radiate properly.
Laird Connectivity surface mount modules are designed to conform to all major manufacturing guidelines. This application note is intended to provide additional guidance beyond the information that is presented in the User Manual. This Application Note is considered a living document and will be updated as new information is presented. The modules are designed to meet the needs of several commercial and industrial applications.
Figure 14: Tape specifications There are 1,000 x BL654 modules taped in a reel (and packaged in a pizza box) and five boxes per carton (5000 modules per carton). Reel, boxes, and carton are labeled with the appropriate labels. See Carton Contents for more information. The following are the contents of the carton shipped for the BL654 modules. https://www.lairdconnect.com/wirelessmodules/bluetooth-modules/bluetooth-5modules/bl654-series-bluetooth-module-nfc 46 © Copyright 2020 Laird Connectivity, Inc..
Figure 15: Carton contents for the BL654 Figure 16: BL654 packaging process The following labels are located on the antistatic bag: M/N:451-00001 QTY:1000PCS Figure 17: Antistatic bag labels https://www.lairdconnect.com/wirelessmodules/bluetooth-modules/bluetooth-5modules/bl654-series-bluetooth-module-nfc 47 © Copyright 2020 Laird Connectivity, Inc..
The following package label is located on both sides of the master carton: Figure 18: Master carton package label The following is the packing slip label: Figure 19: Packing slip label Prior to any reflow, it is important to ensure the modules were packaged to prevent moisture absorption. New packages contain desiccate (to absorb moisture) and a humidity indicator card to display the level maintained during storage and shipment.
Laird Connectivity surface mount modules are designed to be easily manufactured, including reflow soldering to a PCB. Ultimately it is the responsibility of the customer to choose the appropriate solder paste and to ensure oven temperatures during reflow meet the requirements of the solder paste. Laird Connectivity surface mount modules conform to J-STD-020D1 standards for reflow temperatures. Important: During reflow, modules should not be above 260° and not for more than 30 seconds.
Note: For complete regulatory information, refer to the BL654 Regulatory Information document which is also available from the BL654 product page. The BL654 holds current certifications in the following countries: Country/Region Regulatory ID USA (FCC) SQGBL654 EU N/A Canada (ISED) 3147A-BL654 Japan (MIC) 201-180112 Australia N/A New Zealand N/A Part Number Product Description 451-00001 Bluetooth v5/802.15.4/NFC module – Integrated antenna 451-00002 Bluetooth v5 / 802.15.
The following link provides a link to the Bluetooth Registration page: https://www.bluetooth.org/login/register/ For each Bluetooth Design, it is necessary to purchase a Declaration ID. This can be done before starting the new qualification, either through invoicing or credit card payment. The fees for the Declaration ID will depend on your membership status, please refer to the following webpage: https://www.bluetooth.
If your design is based on un-modified BL654 hardware it is possible use the following process; 1. 2. 3. 4. Reference the existing RF-PHY test report from the BL654 listing. Combine the relevant Nordic Link Layer (LL) – check QDID with Nordic. Combine in a Host Component (covering L2CAP, GAP, ATT, GATT, SM) - check QDID with Nordic. Test any standard SIG profiles that are supported in the design (customs profiles are exempt).
Please contact your local sales representative or our support team for further assistance: Laird Connectivity Support Centre: https://www.lairdconnect.com/resources/support Email: wireless.support@lairdconnectivity.com Phone: Americas: +1-800-492-2320 Europe: +44-1628-858-940 Hong Kong: +852 2923 0610 Web: https://www.lairdconnect.com/products Note: Information contained in this document is subject to change. © Copyright 2020 Laird Connectivity. All Rights Reserved. Patent pending.
