Datasheet

ManualsBrandsKEMET ManualsCapacitorsKPS-MCL Ceramic Capacitor Array, 1.2uF, 200V, 10%

Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com

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Overview

KEMET Power Solutions - Low loss (KPS MCL) High

Temperature SMPS Ceramic Stacked Capacitors combine

a robust and proprietary C0G/NPO base metal electrode

(BME) dielectric system with a durable lead-frame

technology for high temperature and high power SMPS

applications. These devices are specically designed to

withstand the demands of harsh industrial environments

such as down-hole oil exploration and automotive/avionics

engine compartment circuitry.

The KPS-MCL is constructed with large chip multilayer

ceramic capacitors (MLCCs), vertically stacked and

secured to a lead-frame termination system, using a high

melting point (HMP) solder alloy. Vertically stacking the

capacitors in lead frames allows for much lower ESR (low

loss) and thermal resistance, which translates to very

high ripple current capability. The lead-frame isolates

the MLCCs from the printed circuit board (PCB), while

establishing a parallel circuit conguration.

Mechanically isolating the capacitors from the PCB improves

mechanical and thermal stress performance, while the

parallel circuit conguration allows for bulk capacitance in

the same or smaller design footprint.

KEMET’s high temperature C0G capacitors are temperature-

compensating and are well suited for resonant circuit

applications, or for those where Q and stability of

capacitance characteristics are required. They exhibit no

change in capacitance with respect to time and voltage, and

boast a negligible change in capacitance with reference to

ambient temperature. Capacitance change is limited to ±30

ppm/ºC from −55°C to +200°C. In addition, these capacitors

exhibit high insulation resistance with low dissipation factor

at elevated temperatures up to +200°C. They also exhibit

low ESR at high frequencies and offer greater volumetric

eciency over competitive high temperature BME ceramic

capacitor devices.

Surface Mount and Through-Hole Multilayer Ceramic Capacitors

KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks,

200 – 2,000 VDC (Industrial Grade)

Benets

• Low-Loss

• Low ESR and ESL

• High thermal stability

• High ripple current capability

• Straight Pin lead wires for "through-hole" mounting

• Formed "J" and "L" lead wires for surface mounting

• Operating temperature range of −55°C to +200°C

• Case Codes (Case Sizes) – 69 (2220) and 70 (2225)

• DC voltage ratings of 200 – 2,000 V

• Capacitance offerings ranging from 11 nF – 1.2 µF

• Industrial grade

• High frequency performance and bulk capacitance in

a reduced footprint

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Summary of content (10 pages)

PAGE 1
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Overview KEMET Power Solutions - Low loss (KPS MCL) High Temperature SMPS Ceramic Stacked Capacitors combine a robust and proprietary C0G/NPO base metal electrode (BME) dielectric system with a durable lead-frame technology for high temperature and high power SMPS applications.
PAGE 2
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Applications • • • • • SMPS • Input and output filtering on power supplies, often found on “capacitor banks“ • Snubber circuits and DC link • Resonator circuits Industrial Down-hole Defense and aerospace Hybrid and Electric Vehicles (HEVs, BEVs) Ordering Information L1 Product Family L1 G N 69 Dielectric Lead Case Size/ Classification/ Configuration1 Ca
PAGE 3
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Dimensions – Inches (Millimeters) Straight Lead (N) Formed J Lead (J) Formed L Lead (L) E E C Straight Lead (N) Formed J (J) and L (L) Lead G D D A B A B L L C E J F L C J H G H B K F K LEAD ALIGNMENT Note: Lead alignment within pin rows shall be 0.01” maximum. Case Code C Lead Spacing2 ±0.025 (0.635) 69 0.25 (6.
PAGE 4
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Environmental Compliance KPS-MCL part types ≥ 500 V with silver (Ag) plating are RoHS compliant with exemption 7a.
PAGE 5
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Table 1 - Product Ordering Codes & Ratings Height A Inch (mm) Maximum D Inch (mm) Maximum RoHS Compliance 3 3 5 5 10 10 0.21 (5.3) 0.26 (6.6) 0.21 (5.3) 0.26 (6.6) 0.21 (5.3) 0.26 (6.6) 0.32 (8.13) 0.32 (8.13) 0.53 (13.5) 0.53 (13.5) 1.06 (26.92) 1.06 (26.92) No No No No No No 3 3 5 5 10 10 0.21 (5.3) 0.26 (6.6) 0.21 (5.3) 0.26 (6.6) 0.21 (5.3) 0.
PAGE 6
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Soldering Process The capacitors and assemblies outlined in this specification sheet are susceptible to thermal shock damage due to their large ceramic mass. Temperature profiles used should provide adequate temperature rise and cool-down time to prevent damage from thermal shock.
PAGE 7
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Soldering Process cont. Recommendations for Hand-Soldering: Care should be taken when hand-soldering large ceramic stacks. Excessive thermal shock on the ceramic material can lead to cracking and reliability issues. To reduce risk of thermal shock, KEMET recommends solder reflow, but if hand soldering cannot be avoided, please see recommended guidelines below.
PAGE 8
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Table 2 - Performance & Reliability: Test Methods & Conditions Inspection Test Method Test Conditions Reliability/Environmental Tests High Temperature Life MIL–STD–202, Method 108 200°C, rated voltage, 1,000 hours JESD22, Method JA–104 –55°C to +200°C, 300 cycles Thermal Shock MIL–STD–202, Method 107 –55°C to +200°C, 20 seconds transfer, 15 minutes d
PAGE 9
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) Construction Detailed Cross Section Dielectric material (CaZrO3) Lead-frame (Phosphor Bronze -Alloy 510) Inner electrodes (Ni) Dielectric material (CaZrO3) Lead-frame attach solder End termination/ External electrode (Cu) Barrier layer (Ni) Termination finish (Sn10/Pb88/Ag2) Barrier layer (Ni) Inner electrodes (Ni) Lead-frame finish (Ag or Sn60/Pb40) E
PAGE 10
Surface Mount and Through-Hole Multilayer Ceramic Capacitors KPS-MCL Low-Loss High Temperature 200°C SMPS Stacks, 200 – 2,000 VDC (Industrial Grade) KEMET Electronics Corporation Sales Oﬃces For a complete list of our global sales offices, please visit www.kemet.com/sales. Disclaimer All product specifications, statements, information and data (collectively, the “Information”) in this datasheet are subject to change.