a module solution provider WB2072-00 Bluetooth® Low Energy Wireless MCU Module ST BlueNRG-355AC Solution Datasheet Revision 0.3 Prepared By Reviewed By Approved By ----------------------------------------------------------------------------------------------------------------------------- --------------------Copyright © JORJIN TECHNOLOGIES INC. 2020 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 Index 1. OVERVIEW ....................................................................................................................................... 3 1.1. GENERAL FEATURES ........................................................................................................................ 3 1.2. APPLICATIONS ................................................................................................................................ 4 2. FUNCTIONAL FEATURES ............
DOC No: WB2072-00-DTS-R03 4.3.20 I2C interface characteristics ....................................................................................... 26 4.3.21 SPI characteristics ...................................................................................................... 27 4.3.22 Typical characteristics ............................................................................................... 29 4.4. CHIP ANTENNA CHARACTERISTICS .............................................................
DOC No: WB2072-00-DTS-R03 1. OVERVIEW The certified WB2072-00 module from JORJIN is a wireless MCU module targeting Bluetooth 5.2 low energy applications. This module is based on ST BlueNRG-355AC wireless MCU QFN-32 package chip. The module is a cost-effective, ultralow power, 2.4-GHz RF devices. Very low active RF and MCU current and low-power mode current consumption provide excellent battery lifetime and allow for operation on small coin cell batteries and in energy-harvesting applications. 1.1.
DOC No: WB2072-00-DTS-R03 Dimension 15mm(L) x 11mm(W) x 2.
DOC No: WB2072-00-DTS-R03 2. FUNCTIONAL FEATURES 2.1. Module Block Diagram Figure 1 – Module block diagram ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 5 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 3. MODULE OUTLINE 3.1. Signal Layout (Top View) Figure 2 –Pinout top view ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 6 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 3.2. Pin Description Table1 –Pin Description Pin No.
DOC No: WB2072-00-DTS-R03 4. MODULE SPECIFICATIONS 4.1. Parameter conditions Unless otherwise specified, all voltages are referenced to ground (GND). 4.1.1 Minimum and maximum values Unless otherwise specified, the minimum and maximum values are guaranteed in the following standard conditions: Ambient temperature is TA = 25 °C Supply voltage is VDD: 3.
DOC No: WB2072-00-DTS-R03 VDD_MOD DC-DC converter supply voltage input -0.3 +3.9 V PA0 to PA15, PB0 to PB15 DC voltage on digital input/output pins -0.3 +3.9 V Note: All the main power and ground pins must always be connected to the external power supply, in the permitted range.
DOC No: WB2072-00-DTS-R03 Table 5- Current consumption Symbol Parameter Typ. Conditions Unit fHCLK = 64 MHz 2.40 All peripherals disabled fHCLK = 32 MHz IDD(RUN) Supply current in RUN mode 1.98 mA All peripherals disabled fHCLK = 16 MHz 1.62 All peripherals disabled Timer OFF 0.65 Timer source LSI 1.25 Timer source LSI 1.30 RTC ON Timer source LSI 1.27 IWDG ON Timer source LSI 1.33 Supply current in DEEPSTOP (1) IDD(DEEPSTOP) RTC and IWDG ON µA Timer source LSE 1.00 Timer source LSE 1.
DOC No: WB2072-00-DTS-R03 I2S2 Peripheral clock at 32 MHz 46 I2S3 Peripheral clock at 32 MHz 47 IWDG 11 LPUART 52 PKA 50 RNG 64 RTC 14 SPI1 35 µA SPI2 Peripheral clock at 16 MHz 40 SPI3 Peripheral clock at 16 MHz 42 Systick 8 TIM1 248 USART 81 SYSCFG 33 THSENS 301 CRC 9 4.3.
DOC No: WB2072-00-DTS-R03 4.3.3 RF general characteristics All performance data are referred to a 50 Ω antenna connector, via reference design. Table 8- Bluetooth Low energy RF general characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit FRANGE Frequency range(1) 2400 2483.
DOC No: WB2072-00-DTS-R03 6 dB Bandwidth for PBW1M Using resolution bandwidth of 100kHz 550 KHz modulated carrier In-band emission at Using resolution bandwidth of 100 kHz ±2MHz(1) and average detector PRF1, 1 Ms/s -20 dBm -30 dBm -41 dBm -50 +50 KHz -23 +23 KHz -20 +20 KHz -20 +20 In-band emission at Using resolution bandwidth of 100 kHz PRF2, 1 Ms/s ±[3+n]MHz, where and average detector n=0,1,2.. (1) Harmonics included.
DOC No: WB2072-00-DTS-R03 Freqdrift Frequency drift(1) Integration interval #n – integration -50 +50 KHz -23 +23 KHz -20 +20 KHz -20 +20 interval #0, where n=2,3,4..k Initial carrier frequency Integration interval #1 – integration drift(1) interval #0 Intermediate carrier Integration interval #n – integration frequency drift(1) interval #(n-5), where n=6,7,8..
DOC No: WB2072-00-DTS-R03 4.3.5 RF receiver characteristics All performance data are referred to a 50 Ω antenna connector, via reference design. Table 12- Bluetooth Low Energy RF receiver characteristics at 1 Msym/s uncoded Symbol Parameter Test conditions Min. Typ. RXSENS Sensitivity PER < 30.8% - -94 dBm PSAT Saturation PER < 30.8% 8 dBm @ 2440 MHz 40 Ω Wanted signal=-67dBm, PER < 30.8% 8 dBc Wanted signal=-67dBm, PER < 30.8% -1 dBc Wanted signal=-67dBm, PER < 30.
DOC No: WB2072-00-DTS-R03 3000 MHz – 12.75 GHz measurement resolution 25MHz Intermodulation characteristics (CW signal at f1, BLE interfering signal at f2) Input power of IM interferer at P_IM(3) 3 and 6 MHz distance from Wanted signal=-64dBm, PER < 30.8% -27 dBm Wanted signal=-64dBm, PER < 30.8% -40 dBm Wanted signal=-64dBm, PER < 30.8% -32 dBm Wanted signal=-64dBm, PER < 30.
DOC No: WB2072-00-DTS-R03 frequency 30.8% finterference = fimage-2M ± 2MHz Out of Band Blocking (Interfering signal CW) C/IBlock C/IBlock C/IBlock C/IBlock Interfering signal frequency Wanted signal=-67dBm, PER < 30.8%, 30MHz – 2000 MHz Measurement resolution 10 MHz Interfering signal frequency Wanted signal=-67dBm, PER < 30.8%, 2003 MHz – 2399 MHz Measurement resolution 3MHz Interfering signal frequency Wanted signal=-67dBm, PER < 30.
DOC No: WB2072-00-DTS-R03 Adjacent Interference C/I1 MHz Wanted signal=-79dBm, PER < 30.8% -5 dBc Wanted signal=-79dBm, PER < 30.8% -38 dBc Wanted signal=-79dBm, PER < 30.8% -50 dBc Wanted signal=-79dBm, PER < 30.8% -30 dBc Wanted signal=-79dBm, PER < 30.
DOC No: WB2072-00-DTS-R03 4.3.6 Embedded reset and power control block characteristics Table 16- Embedded reset and power control block characteristics Symbol Parameter Test conditions Min. Typ. TRSTTEMPO Reset temporization after PDR is detected VDD rising VPDR Power-down reset threshold VPVD0 PVD threshold 0 Falling edge 2.02 VPVD1 PVD threshold 1 Falling edge 2.17 VPVD2 PVD threshold 2 Falling edge 2.33 VPVD3 PVD threshold 3 Falling edge 2.
DOC No: WB2072-00-DTS-R03 Table 18- HSE crystal requirements Symbol Parameter fNOM Oscillator frequency Conditions Min. Typ. Max. 32 Unit MHz Includes initial accuracy, stability over fTOL Frequency tolerance temperature, aging and frequency pulling ±50 ppm due to incorrect load capacitance. ESR Equivalent series resistance 100 Ω PD Drive level 100 µW 9.
DOC No: WB2072-00-DTS-R03 4.3.11 Low speed ring oscillator characteristics Table 21- LSI oscillator characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit fNOM Nominal Frequency Trimmed by software 33 KHz ΔFRO_ΔT/FRO Frequency spread vs. temperature Standard deviation 140 ppm/℃ 4.3.12 PLL characteristics Characteristics measured over recommended operating conditions unless otherwise specified. Table 22- PLL characteristics Symbol Parameter Conditions Min. Typ. Max.
DOC No: WB2072-00-DTS-R03 tERASE Page (2 Kbyte) erase time 20 40 tME Mass erase time 20 40 ms IDD Average consumption from VDD Write mode 3 Erase mode 3 Mass erase 5 mA Table 24- Flash memory endurance and data retention Symbol Parameter Test conditions Min. Unit NEND Endurance TA = -40 to +85 ℃ 10 kcycles tRET Data retention TA = 85 ℃ 10 Years 4.3.
DOC No: WB2072-00-DTS-R03 ±100 0 <= VIN <= Max(VDDx) (1) Max(VDDx) (1) <= VIN <= Max(VDDx) (1) Ilkg Input leakage current 650 nA +1V Max(VDDx) (1) + 1V < VIN <= 5.5 V 200 RPU Pull up resistor VIN=GND 25 40 55 RPD Pull down resistor VIN=GND 25 40 55 CIO I/O pin capacitance KΩ 5 pF (1) Max(VDDx) is the maximum value among all the I/O supplies. All I/Os are CMOS-compliant (no software configuration required).
DOC No: WB2072-00-DTS-R03 below are guaranteed by design. Table 28- RSTN pin characteristics Symbol Parameter VIL(RSTN) RSTN input low level voltage VIH(RSTN) RSTN input high level voltage Vhys(RSTN) RSTN Schmitt trigger voltage hysteresis RPU Weak pull up equivalent resistor Conditions Min. Typ. Max. Unit 0.3 x VDD V 0.7 x VDD 200 VIN=GND 25 mV 40 55 KΩ Figure 3 - Recommended RSTN pin protection Note: The external reset circuit protects the device against parasitic resets.
DOC No: WB2072-00-DTS-R03 ADC active consumption at IBATADCACTIVE ADC activated in differential mode 185 mA battery VDDA Analog supply voltage 1.2 1.32 RAIN Input impedance In DC Rin Internal access resistance VBOOST is enabled for VDD < 2.
DOC No: WB2072-00-DTS-R03 TICC Current consumption 415 µA TTS-OUT Output voltage level at 30°C (+-5°C) 2533 V 4.3.19 Timer characteristics The characteristics below are guaranteed by design. Table 31- TIM1 characteristics Symbol Parameter Test conditions tres(TIM) Timer resolution time fTIMxCLK = 64 MHz ResTIM Timer resolution tCOUNTER 16-bit counter clock period fTIMxCLK = 64 MHz tMAX_COUNT Maximum possible count time fTIMxCLK= 64 Min. Typ. Max. Unit 15.625 ns 16 bit 0.
DOC No: WB2072-00-DTS-R03 tr (SDA/SCL) = 0.8473 x Rp x Cload Rp (min) = [VDD - VOL (max)] / IOL (max) where Rp is the I2C lines pull-up. All I2C SDA and SCL I/Os embed an analog filter. The characteristics below are guaranteed by design. Table 33- I2C analog filter characteristics Symbol Parameter Min. Max. Unit tAF Maximum pulse width of spikes that are suppressed by the analog filter 50 110 ns 4.3.
DOC No: WB2072-00-DTS-R03 th(SO) Slave mode - 12 39 Master mode 2 - Slave mode 4 - Data output valid time ns (1) The maximum frequency in slave transmitter mode is determined by the sum of tv(SO) and tsu(MI), which has to fit SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master having tsu(MI) = 0 while duty(SCK) = 50 %.
DOC No: WB2072-00-DTS-R03 Figure 6 - SPI timing diagram - master mode 4.3.22 Typical characteristics There are some typical performance plots measured on the BlueNRG-355AC device in the BlueNRG-LP data sheet, and the plots relevant for the WB2072-00 module. Please visit STMicroelectronics web site https://www.st.com/resource/en/datasheet/bluenrg-lp.pdf ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 29 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 4.4. Chip Antenna Characteristics Measured on the Jorjin WB2072E00A EM board with TA = 25°C Figure 7 – Efficiency vs. Frequency Figure 8 – 3D Pattern ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 30 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 5. DESIGN RECOMMENDATIONS 5.1. Module Layout Recommendations Follow these module layout recommendations: Antenna For a module with on board chip antenna, to eliminate the influence from other components or ground, recommended that the module is placed in the corner of main PCB, and define a clearance area around the antenna, where no grounding or signal trace are contained. The clearance area applies to all layers of the main PCB.
DOC No: WB2072-00-DTS-R03 RF test point There are RF test points in the bottom side of this module. It is only for module production used. Do not connect any signal to these test points (leave no connection) in the module. And do not design test point in the main board. Please reserve a clearance in the top-side copper plane underneath the RF test pads. Do not route any signal or place via in this keep out area.
DOC No: WB2072-00-DTS-R03 5.2. Reference Schematic Figure 11 – Reference Schematic ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 33 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 6. PACKAGE INFORMATION 6.1. Module Mechanical Outline Figure 12 – Module Mechanical Outline (BOTTOM View) Note: 1> Pad tolerance as ±30µm 2> Unit: mm ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 34 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 Figure 13 – Module Mechanical Outline (TOP and Side View) Note: Unit: mm 6.2. Ordering Information Order Number Package WB2072-00 LGA-42 ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 35 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 CCAM17LP1100T FCC ID:WS2-WB2072 IC:10462A-WB2072 R 201-170780 JORJIN Model:WB2072-00 LTC:YYWWSSFX 6.3.
DOC No: WB2072-00-DTS-R03 7. SMT AND BAKING RECOMMENDATION 7.1. Baking Recommendation Baking condition: - Follow MSL Level 4 to do baking process. - After bag is opened, devices that will be subjected to reflow solder or other high temperature process must be a) Mounted within 72 hours of factory conditions <30°C/60% RH, or b) Stored at <10% RH. - Devices require bake, before mounting, if Humidity Indicator Card reads >10% - If baking is required, Devices may be baked for 8 hrs. at 125 °C. 7.2.
DOC No: WB2072-00-DTS-R03 No. Item Temperature (°C) Time (sec) 1 Pre-heat D1: 140 ~ D2: 200 T1: 80 ~ 120 2 Soldering D2: = 220 T2: 60 +/- 10 3 Peak-Temp. D3: 250 °C max Note: (1) Reflow soldering is recommended two times maximum. (2) Add Nitrogen while Reflow process: SMT solder ability will be better. Stencil thickness: 0.1~ 0.13 mm (Recommended) Soldering paste (without Pb): Recommended SENJU N705-GRN3360-K2-V can get better soldering effects.
DOC No: WB2072-00-DTS-R03 8. TAPE REEL INFROMATION 8.1. Cover / Carrier Tape Dimension Packing Qty Dry Bag Inner Box Outer Box 1200 EA / Reel 1 Reel 1 Dry Bag 4 Inner Box (1200 EA) (1200 EA) (4800 EA) Inner Box Size : 352mm x 352mm x 56mm Outer Box Size : 354mm x 362mm x 250mm ____________________________________________________________________________________ Copyright © JORJIN TECHNOLOGIES INC. 2020 39 http://WWW.JORJIN.COM.
DOC No: WB2072-00-DTS-R03 9. REGULATORY INFORMATION This section outlines the regulatory information for the following countries: United States Canada Japan Europe Taiwan 9.1. United States Federal Communications Commission Statement 15.21. You are cautioned that changes or modifications not expressly approved by the part responsible for compliance could void the user’s authority to operate the equipment. This device complies with Part 15 of the FCC Rules.
DOC No: WB2072-00-DTS-R03 9.2. Canada This device complies with Industry Canada’s licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device.
DOC No: WB2072-00-DTS-R03 module. The end user manual shall include all required regulatory information/warning as shown in this manual. 9.3. Europe Hereby, Jorjin Technologies Inc. declares that the radio equipment type RF module is in compliance with Directive 2014/53/EU The full text of the EU declaration of conformity is available at the following internet address: https://www.jorjin.com/downloads/#474-wb2072-00 The compliance has been verified in the operating frequency band of 2400 MHz to 2483.5 MHz.
DOC No: WB2072-00-DTS-R03 9.5. Taiwan The WB2072-00 is certified as a module with type certification number XXXXXXXXXXXXXX. End products that integrate this module do not need additional NCC Taiwan certification for the end product. End product can display the certification label of the embedded module. The user's manual should contain following warning (for RF device) in traditional Chinese: 注意 本產品符合低功率電波輻射性電機管理辦法: LP0002 低功率射頻器材技術規範_章節 3.8.
DOC No: WB2072-00-DTS-R03 10. HISTORY CHANGE Revision Date Description Draft 1.0 2020.07.08 Draft version released. Draft 1.1 2020.08.11 Update parameter values Draft 2.0 2020.11.12 Re-edit Draft 2.0 2020.11.13 Update Figure 1 – Module block diagram R01 2020.12.16 Official version released R02 2021.02.22 Add 9. REGULATORY INFORMATION R03 2021.03.