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WG7833BEM2B

M.2 Type2226 Module

TI WL1833 IEEE 802.11a/b/g/n solution

BT/BLE Solution

Datasheet

Draft 0.2

Summary of content (49 pages)

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a module solution provider WG7833BEM2B M.2 Type2226 Module TI WL1833 IEEE 802.11a/b/g/n solution BT/BLE Solution Datasheet Draft 0.2 Copyright © JORJIN TECHNOLOGIES INC. 2014 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 Index 1. OVERVIEW ................................................................................................................................... 3 1.1. 2. GENERAL FEATURES ................................................................................................................. 3 FUNCTIONAL FEATURES ............................................................................................................ 4 2.1. MODULE BLOCK DIAGRAM ............................
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Doc No: WG7833BEM2B-DTS-D02 4.4.3. BT LE Transmitter Characteristics .............................................................................. 23 4.4.4. BT LE Modulation Characteristics ....................................................................... 24 4.4.6. BT LE Transceiver - Spurs ........................................................................................ 24 4.5. ANT PERFORMANCE ..................................................................................................
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Doc No: WG7833BEM2B-DTS-D02 1. OVERVIEW WG7833BEM2B, a WiFi, BT, BLE combo module, is the most demanded design for mobile devices, Audio, Computer, PDA and embedded system applications with Wilink8 solution from TI. 1.1. General Features WLAN, Bluetooth, BLE, ANT with Integrated RF Front-End Module (FEM), Power Amplifier (PA), and Power Management on a Single Module M.2 Type2226 LGA package Dimension 26mm(L) x 22.0mm(W) x 2.
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Doc No: WG7833BEM2B-DTS-D02 2. FUNCTIONAL FEATURES 2.1. Module Block Diagram WiLink8 VBAT_IN Power 1V8 LDO Management SLOW CLK ANT2 WL 5G TX WL 5G RX 26MHz TCXO SW BPF WLAN SDIO (WLAN) WLAN 2.4G UART (BT) PCM (BT) GPIO / DBG ANT1 SW BT BPF BT WG7833-B0 WG7833BEM2B M.2 Type2226 Figure 2-1. WG7833BEM2B Block Diagram Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 2.2. Block Functional Feature 2.2.1. WLAN Features Integrated 2.4 & 5G GHz Power Amplifier (PA) for WLAN solution WLAN Baseband Processor and RF transceiver Supporting IEEE Std 802.11b/g/n WLAN 2.4GHz SISO (20/40 MHz channels) Baseband Processor IEEE Std 802.11a/b/g/n data rates and IEEE Std 802.11n data rates with 20 or 40 MHz SISO. Fully calibrated system. Production calibration not required.
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Doc No: WG7833BEM2B-DTS-D02 2.2.3. BLE Features Fully compliant with BT4.0 BLE dual mode standard Support for all roles and role-combinations, mandatory as well as optional Supports up to 10 BLE connections Independent buffering for LE allows having large number of multiple connections without affecting BR/EDR performance 2.2.4.
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Doc No: WG7833BEM2B-DTS-D02 3.2. Pin Description Table 3-1. Pin Description Pin No. Signal Name Type Shut After Voltage Down Power Level state Up(1) Description 1 3.3V POW VBAT Power supply input, 2.9 to 4.8 V. 2 3.3V POW VBAT Power supply input, 2.9 to 4.8 V. 3 GND GND 4 RESERVED - No connection. 5 ALERT# - No connection. 6 I2C_CLK - No connection. 7 I2C_DATA - No connection. 8 COEX1 - No connection. 9 COEX2 - No connection. 10 COEX3 - No connection.
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Doc No: WG7833BEM2B-DTS-D02 31 REFCLKp0 32 GND GND 33 PETn0 - No connection. 34 PETp0 - No connection. 35 GND GND 36 PERn0 - No connection. 37 PERp0 - No connection. 38 GND 39 VENDOR DEFINED - No connection. 40 VENDOR DEFINED - No connection. 41 VENDOR DEFINED - No connection. 42 SDIO RESET# IN PD PD 1.8V 43 SDIO WAKE# OUT PD 0 1.8V - No connection. Ground. Ground. GND Ground. WL_EN, Mode setting: High = enable SDIO available, interrupt out.
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Doc No: WG7833BEM2B-DTS-D02 62 LED1# - No connection. 63 RESERVED - No connection. 64 GND 65 USB_D- - No connection. 66 USB_D+ - No connection. 67 GND GND 68 3.3V POW VBAT Power supply input, 2.9 to 4.8 V. 69 3.3V POW VBAT Power supply input, 2.9 to 4.8 V. 70 GND GND Ground. 71 GND GND Ground. 72 GND GND Ground. 73 GND GND Ground. 74 GND GND Ground. 75 GND GND Ground. 76 GND GND Ground. 77 GND GND Ground. 78 GND GND Ground.
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Doc No: WG7833BEM2B-DTS-D02 4. MODULE SPECIFICATION 4.1. General Module Requirements and Operation 4.1.1. Absolute Maximum Ratings (1) Parameter Value Units (2) VBAT -0.5 to 5.5 Input voltage to Analog pins -0.5 to 2.1 V Input voltage limits (CLK_IN) -0.5 to 4.6 V Input voltage to all other pins -0.5 to 2.
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Doc No: WG7833BEM2B-DTS-D02 4.1.2. Recommended Operating Conditions Parameter VBAT Condition (1) Sym DC supply range Min Max 2.9 4.8 Units V for all modes IO high-level input voltage VIH 1.17 1.8 IO low-level input voltage VIL 0 0.63 Enable inputs high-level input VIH_EN 1.365 1.8 VIL_EN 0 0.4 VOH 1.35 1.8 @ 1 mA 1.688 1.8 @ 0.3 mA 1.767 1.8 0 0.45 @ 1 mA 0 0.112 @ 0.09 mA 0 0.
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Doc No: WG7833BEM2B-DTS-D02 4.1.3. External Slow Clock Input (SLOW_CLK) The supported digital slow clock is 32.768 kHz digital (square wave). Parameter Condition Sym Min. Input slow clock Frequency Typ. Max. 32.768 Units KHz Input slow clock accuracy WLAN, BT +/-250 (Initial + temp + aging) ANT +/- 50 ppm Input Transition time Tr/Tf Tr/Tf - 100 ns 85 % 10% to 90% Frequency input duty Cycle Input Voltage Limits 15 50 Square Wave, Vih 2 VBAT DC-coupled Vil 0 0.
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Doc No: WG7833BEM2B-DTS-D02 4.2. WLAN RF Performance 4.2.1. WLAN 2.4-GHz Receiver Characteristics Parameter Condition Operation frequency range Sensitivity Min Typ 2412 Max Units 2484 MHz dBm 1 Mbps DSSS – -95.8 -92.9 2 Mbps DSSS – -92.7 -90 20MHz Bandwidth 5.5 Mbps CCK – -90.1 -87.4 At < 10% PER limit 11 Mbps CCK – -87.4 -85.2 6 Mbps OFDM – -91.5 -88.7 9 Mbps OFDM – -89.9 -87.2 12 Mbps OFDM – -89 -86.3 18 Mbps OFDM – -86.7 -84 24 Mbps OFDM – -83.6 -80.
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Doc No: WG7833BEM2B-DTS-D02 4.2.2. WLAN 2.4-GHz Transmitter Power Parameter Condition Min Typ Max Output Power 1 Mbps DSSS 14.5 16.5 – - Maximum RMS output power 2 Mbps DSSS 14.5 16.5 – measured at 1dB from IEEE 5.5 Mbps CCK 14.5 16.5 – spectral mask or EVM 11 Mbps CCK 14.5 16.5 – 6 Mbps OFDM 14.5 16.5 – 9 Mbps OFDM 14.5 16.5 – 12 Mbps OFDM 14.5 16.5 – 18 Mbps OFDM 14.5 16.5 – 24 Mbps OFDM 13.5 15.7 – 36 Mbps OFDM 12.6 14.8 – 48 Mbps OFDM 11.9 14.
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Doc No: WG7833BEM2B-DTS-D02 4.2.3. WLAN 5-GHz Receiver Characteristics Parameter Condition Operation frequency range Min Typ 4910 Max Units 5825 MHz Sensitivity 6 Mbps OFDM – -92.2 -88.3 - 20MHz bandwidth. 9 Mbps OFDM – -90.4 -86.4 - At < 10% PER limit 12 Mbps OFDM – -89.6 -85.6 18 Mbps OFDM – -87.1 -83.1 24 Mbps OFDM – -84 -80 36 Mbps OFDM – -80.6 -76.6 48 Mbps OFDM – -76.3 -72.3 54 Mbps OFDM – -74.7 -71.2 MCS0 MM 4K – -90.5 -86.1 MCS1 MM 4K – -87.7 -83.
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Doc No: WG7833BEM2B-DTS-D02 4.2.4. WLAN 5-GHz Transmitter Power Parameter Condition Min Typ Max Output Power 6 Mbps OFDM 15.4 17.5 – - Maximum RMS output power 9 Mbps OFDM 15.4 17.5 – measured at 1dB from IEEE 12 Mbps OFDM 15.4 17.5 – spectral mask or EVM 18 Mbps OFDM 15.4 17.5 – 24 Mbps OFDM 14.8 16.4 – 36 Mbps OFDM 14.1 15.7 – 48 Mbps OFDM 13.3 14.9 – 54 Mbps OFDM 12.3 14.1 – MCS0 MM 15.1 17.1 – MCS1 MM 15.1 17.1 – MCS2 MM 15.1 17.1 – MCS3 MM 15.1 17.
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Doc No: WG7833BEM2B-DTS-D02 4.3. Bluetooth RF Performance 4.3.1. BT Receiver Characteristics, In-Band Signals Parameter Condition Min Typ Max BT Units Spec BT BR, EDR operation 2402 2480 MHz frequency range BT BR, EDR channel spacing 1 MHz BT BR, EDR input 50 Ω impedance BT BR, EDR sensitivity (1) Dirty TX on BR, BER = 0.1% -91.7 -70 EDR2, BER = 0.01% -91.2 -70 EDR3, BER = 0.01% -84.
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Doc No: WG7833BEM2B-DTS-D02 BR, adjacent ≥Ι±3Ι MHz -45.0 -40 EDR, adjacent ≥Ι±3Ι EDR2 -45.0 -40 MHz EDR3 -44.0 -33 BT BR, EDR RF return loss -10.0 dB (1) Sensitivity degradation up to -3dB may occur due to fast clock harmonics with dirty TX on. 4.3.2. BT Receiver Characteristics – General Blocking Condition Parameter Blocking performance over full range, according to BT specification (1) Min Typ BT spec 30-2000 MHz -6 -10 2000-2399 MHz -6 -27 2484-3000 MHz -6 -27 3-12.
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Doc No: WG7833BEM2B-DTS-D02 4.3.4. BT Transmitter, BR Parameter BR RF output power Min (1) Typ VBAT >= 3V 12.2 VBAT < 3V 6.7 BR Gain Control Range Max BT Spec dBm 30 BR Power Control Step 2 Units dB 5 8 2 to 8 BR Adjacent Channel Power |M-N| = 2 (2) -43.0 ≤ -20 BR Adjacent Channel Power |M-N| > 2 (2) -48.0 ≤ -40 dBm 1) Values reflect maximum power. Reduced power is available using a vendor-specific (VS) command. 2) Assumes 3dB insertion loss on external filter and traces 4.
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Doc No: WG7833BEM2B-DTS-D02 drift Three and five slot packet BR drift rate lfk+5 – fkl , k = 0 …. max -35 35 < ±40 kHz 15 < 20 kHz/ 50μs BR initial carrier frequency tolerance (2) f0 – fTX -25 25 < ±75 kHz 1) Performance figures at maximum power 2) This number is added on top of the reference clock frequency accuracy 4.3.7.
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Doc No: WG7833BEM2B-DTS-D02 3rd harmonic -4 dBm 4th harmonic -10 dBm 1) Meets FCC and ETSI requirements with suitable external filter 2) Performance figures at maximum power 3) Except for frequencies that corresponds to 2*RF_FREQ/3 4.3.9.
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Doc No: WG7833BEM2B-DTS-D02 4.4. BT LE RF Performance 4.4.1. BT LE Receiver Characteristics, In-Band Signals Condition (2) Parameter Min BT LE Operation frequency range Typ Max 2402 BLE spec Units 2480 MHz BT LE Channel spacing 2 MHz BT LE Input impedance 50 Ω (1) -92.8 BT LE Sensitivity , Dirty Tx on BT LE Maximum useable input power BT LE Intermodulation characteristics -5 -36 Level of interferers.
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Doc No: WG7833BEM2B-DTS-D02 6.7 Vbat < 3V ≤10 dBm dBm BT LE Adjacent Channel Power |M-N| = 2 (2) -51.0 ≤ –20 BT LE Adjacent Channel Power |M-N| > 2 (2) -54.0 ≤ –30 1) To reduce the maximum BLE power, use a VS command. The optional extra margin is offered to compensate for design losses, such as trace and filter losses, and to achieve the maximum allowed output power at system level. 2) Assumes 3dB insertion loss on external filter and traces 4.4.4.
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Doc No: WG7833BEM2B-DTS-D02 4.5. ANT Performance 4.5.1. ANT Receiver Characteristics, In-Band Signals Parameter Condition ANT Operation frequency range Min 2402 ANT Channel spacing ANT Sensitivity Typ 12.72% PER (1) Max Units 2480 MHz 1 MHz -84.7 dBm 1) Translation from BER=0.1%, assuming packet is 136 bits ( not including preamble ) 4.5.2. ANT Transmitter Characteristics Same as Bluetooth BR Transmitter Characteristics Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 4.6. POWER CONSUMPTION 4.6.1. Shutdown and Sleep Currents Parameter Power Supply Current Typ Unit uA Shutdown mode (All functions shut down) VBAT 10 WLAN sleep mode VBAT 154 BT sleep mode VBAT 110 4.6.2. WLAN Power Currents Parameter LPM Receiver Transmitter Conditions Typ (avg) - 25C Units 2.4GHz RX LPM 48 mA 2.4GHz RX search SISO20 53 mA 2.4GHz RX search SISO40 58 mA 5GHz RX search SISO20 59 mA 5GHz RX search SISO40 63 mA 2.
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Doc No: WG7833BEM2B-DTS-D02 4.6.3. Bluetooth Currents Current measurements are done at the following output power: BR at 12.5dBm, EDR at 7dBm. Use Case (1) Typ Units BR Voice HV3 + sniff 11.6 mA EDR Voice 2-EV3 no retrans. + sniff 5.9 mA Sniff 1 attempt 1.28s 178 uA EDR A2DP EDR2 (master). SBC high quality – 345Kbs 10.4 mA EDR A2DP EDR2 (master). MP3 high quality – 192Kbs 7.5 mA (2) (3) 18 mA (3) 50 mA 33 mA Page or inquiry 1.28s/11.25ms 253 uA P&I Scan (P=1.28/I=2.
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Doc No: WG7833BEM2B-DTS-D02 4.6.5. ANT Currents Use Case Conditions Typ Units ANT Rx message mode 250ms interval 360 uA ANT Rx message mode 500ms interval 220 uA ANT Rx message mode 1000ms interval 150 uA Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 5. HOST INTERFACE TIMING CHARACTERISTICS The following table summarizes the Host Controller interface options. All interfaces operate independently. WLAN Shared HCI for all functional BT Voice/Audio blocks except WLAN WLAN HS SDIO Over UART BT PCM The device incorporates UART module dedicated to the BT shared-transport Host Controller Interface (HCI) transport layer.
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Doc No: WG7833BEM2B-DTS-D02 5.2. SDIO Timing Specifications 5.2.1. SDIO Switching Characteristics – Default Rate Figure 5-1. SDIO default input timing Figure 5-2. SDIO default output timing Table 5-1. SDIO Default Timing Characteristics(1) PARAMETER(2) MIN MAX UNIT Fclock Clock frequency, CLK 0 26 MHz DC Low/high duty cycle 40 60 % tTLH Rise time, CLK 10 ns tTHL Fall time, CLK 10 ns Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 tISU Setup fme, input valid before CLK↑ 3 ns tIH Hold fme, input valid aher CLK↑ 2 ns tODLY Delay fme, CLK↓ to output valid 2.5 CI Capacitive load on outputs 14.8 ns 15 pF (1) To change the data out clock edge from the falling edge (default) to the rising edge, set the configuration bit. (2) Parameter values reflect maximum clock frequency. 5.2.2. SDIO Switching Characteristics – High Rate Figure 5-3. SDIO HS input timing Figure 5-4.
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Doc No: WG7833BEM2B-DTS-D02 Table 5-2. SDIO HS Timing Characteristics PARAMETER MIN MAX UNIT Fclock Clock frequency, CLK 0 50 MHz DC Low/high duty cycle 40 60 % tTLH Rise time, CLK 3 ns tTHL Fall time, CLK 3 ns tISU Setup fme, input valid before CLK↑ 3 ns tIH Hold fme, input valid aher CLK↑ 2 ns tODLY Delay fme, CLK↓ to output valid 2.5 CI Capacitive load on outputs 14 ns 10 pF 5.3.
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Doc No: WG7833BEM2B-DTS-D02 5.3.1. UART 4-Wires Interface – H4 The interface includes four signals: TXD, RXD, CTS and RTS. Flow control between the host and the Device is byte-wise by hardware. ( See Figure 5-5 ) Figure 5-5. HCI UART Connection When the UART RX buffer of the device passes the flow-control threshold, the buffer sets the UART_RTS signal high to stop transmission from the host. When the UART_CTS signal is set high, the device stops transmitting on the interface.
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Doc No: WG7833BEM2B-DTS-D02 CTS low to TX_DATA off Hardware flow control t4 1 CTS High Pulse Width t6 1 RTS low to RX_DATA on t1 0 RTS high to RX_DATA off Interrupt set to 1/4 FIFO STR-Start bit; bit 2 us t2 16 D0..Dn - Data bits (LSB first); PAR - Parity bit (if used); Byte Bytes STP - Stop bit Figure 5-7. UART Data Frame 5.5. Bluetooth Codec-PCM(Audio) Timing Specifications Figure 5-8 shows the Bluetooth codec-PCM (audio) timing diagram.
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Doc No: WG7833BEM2B-DTS-D02 Table 5-6. Bluetooth Codec-PCM Slave Timing Characteristics Parameter Symbol Min Cycle time Tclk 81 (12.288MHz) High or low pulse width Tw 35% of Tclk min AUD_IN setup time tis 5 AUD_IN hold time tih 0 AUD_OUT propagation time top 5 AUD_FSYNC_OUT propagation time top 0 Capacitive loading on outputs Cl Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 6. CLOCK AND POWER MANAGEMENT The slow clock is a free-running, 32.768 kHz clock supplied from an external clock source. The clock is connected to the RTC_CLK pin and is a digital square-wave signal in the range of 0 to 1.8V nominal 6.1. Reset-Power-Up System After VBAT and VIO are fed to the device and while BT_EN and WL_EN are deasserted (low), the device is in SHUTDOWN state, during which functional blocks, internal DC-DCs, and LDOs are disabled.
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Doc No: WG7833BEM2B-DTS-D02 6.3. Bluetooth/BLE/ANT Power-Up Sequence Figure 6-2 shows the Bluetooth/BLE/ANT power-up sequence. Figure 6-2 Bluetooth/BLE/ANT power-up sequence Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 8. DESIGN RECOMMENDATIONS 8.1. Design Note on Debug Port Pin# 11, 12 serve as WLAN and BT debug port, respectively. So test points for these two signals should be reserved for debugging purpose. Pin# 14 (SDIO WAKE#) needs to be pulled high via 10Kohm and use Pin# 11, 12 as hardware interface to communicate with system platform and TI RTTT test utility for WLAN RF performance test, debug and manufacturing application. 8.2.
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Doc No: WG7833BEM2B-DTS-D02 Have a complete Ground pour in layer 2 for thermal dissipation. Increase the GND pour in the 1st layer, move all the traces from the 1st layer to the inner layers if possible. Move GND vias close to the pad. Clocks To avoid adding noise to the clock signal, keep the primary clock away from fast digital switching lines and power traces. It is preferable to keep all clocks between the ground/power layers. Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 9. PACKAGE INFORMATION 9.1. NGFF Type 2226 Specification from PCI-e M.2_Rev1.0 ※ Only Ant1 and Ant2 on this module. Figure 9-1. M.2 Type 2226-S3 Mechanical Outline Drawing Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.JORJIN.COM.
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Doc No: WG7833BEM2B-DTS-D02 10. SMT AND BAKING RECOMMENDATION 10.1. Baking Recommendation Baking condition： - Follow MSL Level 4 to do baking process. - After bag is opened, devices that will be subjected to reflow solder or other high temperature process must be a) Mounted within 72 hours of factory conditions <30°C/60% RH, or b) Stored at <10% RH. Devices require bake, before mounting, if Humidity Indicator Card reads >10% If baking is required, Devices may be baked for 8 hrs. at 125 °C. 10.2.
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Doc No: WG7833BEM2B-DTS-D02 Note: (1) Reflow soldering is recommended two times maximum. (2) Add Nitrogen while Reflow process： SMT solder ability will be better. Stencil thickness：： 0.1~ 0.13 mm (Recommended) Soldering paste (without Pb)：： Recommended SENJU N705-GRN3360-K2-V can get better soldering effects. 11. HISTORY CHANGE Revision Date Description D 0.1 2015 / 01 / 10 New Released D 0.2 2015 / 07 / 30 Add FCC/NCC WARING STATEMENT Copyright © JORJIN TECHNOLOGIES INC. 2015 http://WWW.
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Doc No: WG7833BEM2B-DTS-D02 FCC WARING STATEMENT This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
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Doc No: WG7833BEM2B-DTS-D02 install or remove this RF module in the user manual of the end product. The user manual which is provided by OEM integrators for end users must include the following information in a prominent location. 1.
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Doc No: WG7833BEM2B-DTS-D02 NCC WARING STATEMENT Article 12 Without permission, any company, firm or user shall not alter the frequency, increase the power, or change the characteristics and functions of the original design of the certified lower power frequency electric machinery.