User Guide

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HARDWARE DEVELOPMENT GUIDE

Version: V1.5

Date: 2019-04-28

LTE Module Series

ME3630

Website: www.gosuncnwelink.com

E-mail: welink@gosuncn.com

Summary of content (70 pages)

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ME3630 HARDWARE DEVELOPMENT GUIDE Version: V1.5 Date: 2019-04-28 LTE Module Series Website: www.gosuncnwelink.com E-mail: welink@gosuncn.
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ME3630 Hardware Development Guide REVISION HISTORY Version Date Description 1.0 2017-01-18 1 released version 1.1 2017-10-23 Add information of ME3630-E&ME3630-J2A& ME3630-J2AS 1.2 2018-01-31 Add ME3630-E2C st Update pin POWER_ON 1.3 2018-04-23 Add ME3630-A1C Update parts of reference circuit Add the pin assignment 1.4 2018-04-28 Update the document format 1.
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ME3630 Hardware Development Guide ABOUT THIS DOCUMENT A. Application Range This document is the Product Technical Specification for the ME3630 GSM/WCDMA/LTE-FDD module. It defines the high level product features and illustrates the interface for these features. This document is intended to cover the hardware aspects of the product, including electrical and mechanical. B. Reading Note The symbols below are the reading notes you should pay attention on: : WARNING or ATTENTION C.
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ME3630 Hardware Development Guide LDO Low-Dropout LED Light Emitting Diode LTE Long Term Evolution ME Mobile Equipment MO Mobile Origination Call MT Mobile Termination Call MSB Most Significant Bit PC Personal Computer PCB Printed Circuit Board PDA Personal Digital Assistant PDU Protocol Data Unit PAP Password Authentication Protocol PPP Point to Point Protocol RTC Real Time Clock SMS Short Messaging Service SMT Surface Mount Technology SPI Serial Peripheral Interface TBD
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ME3630 Hardware Development Guide SAFETY INFORMATION The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating ME3610 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product.
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ME3630 Hardware Development Guide CONTENTS 1. Product Overview ....................................................................................................................................................................... 11 1.1. General Description ........................................................................................................................................................................... 11 1.2. Key Features ..........................................................
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ME3630 Hardware Development Guide 4. Electrical, Reliability and Radio Characteristics ............................................................................................................................ 52 4.1. Absolute Maximum Ratings ............................................................................................................................................................... 52 4.2. Operating Temperature ............................................................................
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ME3630 Hardware Development Guide TABLES Table 1–1ME3630 Supported Band ................................................................................................................... 11 Table 1–2 ME3630 Key Features .................................................................................................................... 12 Table 2–1 IO Parameters Definition ...............................................................................................................
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ME3630 Hardware Development Guide Table 4–5 Averaged working current [1] ........................................................................................................ 52 Table 4–6 Averaged working current [2] ........................................................................................................ 53 Table 4–7 Conducted RF Output Power .........................................................................................................
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ME3630 Hardware Development Guide FIGURES Figure 1–1 System Connection Structure ....................................................................................................... 14 Figure 2–1 Pin Assignment ............................................................................................................................. 17 Figure 2–2 The input reference circuit of VBAT .............................................................................................
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ME3630 Hardware Development Guide Figure 2–30 Connections of the WAKEUP_IN pin .......................................................................................... 45 Figure 2–31 The output signal of WAKEUP_OUT ........................................................................................... 46 Figure 2–32 Connections of the WAKEUP_OUT pin ....................................................................................... 46 Figure 3–1 Reference Circuit of Antenna Interface ...........
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ME3630 Hardware Development Guide 1. P RODUCT OVERVIEW 1.1. G ENERAL D ESCRIPTION ME3630-U& ME3630-E&ME3630-J &ME3630-A is a LTE/WCDMA/GSM wireless communication module with LCC interface. It is widely applied to but not limited to the various products and equipment such as laptops, vehicle-mounted terminals, and electric devices, by providing data services. Customer can choose the dedicated type based on the wireless network configuration and using area.
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ME3630 Hardware Development Guide WCDMA ME3630 LTE WCDMA GSM B1 1920 to 1980 MHz 2110 to 2170 MHz B5 824 to 849 MHz 869 to 894 MHz B6 830 to 840 MHz 875 to 885 MHz B8 880 to 915 MHz 925 to 960 MHz B19 830 to 845 MHz 875 to 890 MHz B2 1850 to 1910 MHz 1930 to 1990 MHz B5 824 to 849 MHz 869 to 894 MHz B7 2500 to 2570 MHz 2620 to 2690 MHz B2 1850 to 1910 MHz 1930 to 1990 MHz B5 824 to 849 MHz 869 to 894 MHz B2 1850 to 1910 MHz 1930 to 1990 MHz B5 824 to 849 MHz 869 to 89
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ME3630 Hardware Development Guide WCDMA: B1,B8 J2A&J2AS LTE FDD: B1, B3, B5, B7,B8, B18, B19, B21 WCDMA: B1, B5, B6, B8, B19 Transmission Rate LTE FDD (CAT4): Max 150Mbps(DL)/Max 50Mbps(UL) Network Protocols Support TCP/PPP/UDP/FTP protocols Support PAP, CHAP protocols used for PPP connection. USIM Interface 1.
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ME3630 Hardware Development Guide 1.3. F UNCTION D IAGRAM The figure below shows a block diagram of the ME3630 and illustrates the major functional parts.
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ME3630 Hardware Development Guide 2. A PPLICATION INTERFACE 2.1. G ENERAL D ESCRIPTION ME3630 is equipped with an 80-pin 0.72mm pitch SMT pads plus 16-pin ground pads and reserved pads that connect to customer’s cellular application platform.
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ME3630 Hardware Development Guide Figure 2–1 Pin Assignment NOTE: Keep all NC pins unconnected. 2.3. P IN D ESCRIPTION The following table shows the IO Parameters Definition. Table 2–1 IO Parameters Definition Type Description IO Bidirectional input/output DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain The logic levels are described in the following table.
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ME3630 Hardware Development Guide 80, Turn On/Off Pin Name Pin NO. I/O Description DC Characteristics Comment POWER_ON 1 DI Turn on/off module VIH max = 2.1V Pull-up to 0.8V internally, active low VIH min = 1.17V VIL max = 0.63V RESET_N 2 DI Reset module VIH max = 2.1V Active low VIH min = 1.17V VIL max = 0.63V Status Indication Pin Name Pin NO. I/O Description DC Characteristics Comment ON_STATE 69 DO Module power VOH min = 1.35V 1.8V power domain on/off status VOL max = 0.
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ME3630 Hardware Development Guide VIH min = 1.17V VOL max = 0.45V VOH min = 1.35V For 3V USIM: VIL max = 1.05V VIH min = 1.95V VOL max = 0.45V VOH min = 2.6V USIM_CLK 37 DO Clock signal of USIM For 1.8V USIM: card VOL max = 0.45V VOH min = 1.35V For 3V USIM: VOL max = 0.45V VOH min = 2.6V USIM_RST 39 DO Reset signal of USIM For 1.8V USIM: card VOL max = 0.45V VOH min = 1.35V For 3V USIM: VOL max = 0.45V VOH min = 2.6V USIM_DETECT 41 DI USIM card input VIL min = -0.3V 1.8V power domain.
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ME3630 Hardware Development Guide UART_DSR 57 DO Data set ready VIL min = -0.3V 1.8V power domain. VIL max = 0.63V VIH min = 1.17V VIH max = 2.1V UART_DTR 58 DI Data terminal ready VIL min = -0.3V 1.8V power domain. VIL max = 0.63V VIH min = 1.17V VIH max = 2.1V UART_DCD UART_RI 59 60 DO DO Data carrier VOL max = 0.45V 1.8V power domain detection VOH min = 1.35V Ring indicator VOL max = 0.45V 1.8V power domain, DO not pull-up VOH min = 1.
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ME3630 Hardware Development Guide VIL max = 0.63V VIH min = 1.17V VIH max = 2.1V SDIO_D0 15 IO Secure digital IO data VOL max = 0.45V bit 0 VOH min = 1.35V 1.8V power domain VIL min = -0.3V VIL max = 0.63V VIH min = 1.17V VIH max = 2.1V SDIO_D1 16 IO Secure digital IO data VOL max = 0.45V bit 1 VOH min = 1.35V 1.8V power domain VIL min = -0.3V VIL max = 0.63V VIH min = 1.17V VIH max = 2.1V SDIO_D2 17 IO Secure digital IO data VOL max = 0.45V bit 2 VOH min = 1.35V 1.
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ME3630 Hardware Development Guide VIH min = 1.17V VIH max = 2.1V SPI_CLK 34 DO SPI clock VOL max = 0.45V 1.8V power domain VOH min = 1.35V SPI_CS_N 35 DO SPI segment VOL max = 0.45V 1.8V power domain VOH min = 1.35V WiF PINs WLAN_SLEEP_CLK COEX_UART_TX 6 7 DO DO WLAN sleep clock VOL max = 0.45V Only supported by firmware with WiFi. VOH min = 1.35V Other firmware, this pin is NC LTE transmitter sync VOL max = 0.45V Only supported by firmware with WiFi.
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ME3630 Hardware Development Guide 2.4. P OWER S UPPLY 2.4.1. POWER SUPPLY PINS The ME3630 is supplied through the V_BAT signal with the following characteristics. Table 2–4 Power Supply Pin Name Pin NO. Description Minimum Typical Maximum Unit V_BAT 50,51 Power supply for module 3.4 3.8 4.
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ME3630 Hardware Development Guide Figure 2–3 Reference circuit of DC-DC  Option 2:LDO The over-current capability of LDO is above 2.5A. This LDO is apply to this situation: input and output voltage difference is small. The reference power supply circuit design with LDO is shown as figure below: Figure 2–4 Reference circuit of LDO 2.5.
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ME3630 Hardware Development Guide Figure 2–5 Reference circuit of POWER_ON The table below is the information of power-on/off pin Table 2–5 Definition of POWER_ON Pin Name Pin NO. I/O Description Comment POWER_ON 1 DI Turn on/off the module low active. Pull-up to 0.8V internally The power on scenarios is illustrated as the following figure, the module will power on and working when the POWER_ON pin keep in low level for T1, in this process , please ensure VBAT steady.
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ME3630 Hardware Development Guide Ensure VBAT steady VBAT T1 POWER_ON T2 RESET_N Figure 2–6 Timing of Turning on Mode Table 2–6 Power-on Time Parameter Description Min Typical Max Unit T1 The period that the Power-on signal for power on operation is kept on the low PWL 0.1 0.2 -- Second T2 The minimum interval between the POWER_ON and RESET signals if you want to 10 15 -- Second reset the module after power-on. 2.6.
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ME3630 Hardware Development Guide VBAT high level T2 POWER_ON T3 Module Status Running Turning off Power off Figure 2–7 Timing of Turning off Mode Mode 2: Send command of AT+ZTURNOFF, and the power off process will take 15s at least. Note:when using modules, you need to avoid power off abnormally and frequently, as it will cause several risks shwon as below: 1. it will damage the flash permanently. 2.
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ME3630 Hardware Development Guide Figure 2–8 reference circuit to reset module The reset scenario is illustrated as the following figure, VBAT high level 1s RESET_N 27s Module Status COM can send/receive AT Running Resetting Running Figure 2–9 Timing of Reset Mode Mode 2: Send command of AT+ZRST, and the RESET process until the AT port can communicate will take 27s at least.
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ME3630 Hardware Development Guide 2.8. USIM C ARD I NTERFACE 2.8.1. DESCRIPTION OF PINS The USIM card interface circuitry meets ETSI and IMT-2000 SIM interface requirements. Both 1.8V and 3.0V USIM cards are supported. Table 2–8 Pin Definition of the USIM Interface Pin Name Pin NO. I/O Description Comment USIM_VCC 40 PO Power supply for USIM card Either 1.
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ME3630 Hardware Development Guide Figure 2–10 Reference Circuit of the 8 Pin USIM Card ME3630 supports USIM card hot-plugging via the USIM_ DETECT pin. For details, refer to document [AT Command Reference Guide of Module Product ME3630]. If you do not need the USIM card detect function, keep USIM_ DETECT unconnected. The reference circuit for using a 6-pin USIM card socket is illustrated as the following figure.
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ME3630 Hardware Development Guide Figure 2–12 Molex 91228 USIM Card Holder Table 2–9 Pin Description of Molex USIM Card Holder Pin Name Pin NO. Function GND 1 Ground VPP 2 Not connected DATA I/O 3 USIM card data CLK 4 USIM card clock RST 5 USIM card reset VDD 6 USIM card power supply DETECT 7 USIM card Detection NC 8 Not defined, Connect to Ground For 6-pin USIM card holder, it is recommended to use Amphenol C707 10M006 512 2. Please visit http://www.amphenol.
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ME3630 Hardware Development Guide Figure 2–13 Amphenol C707 10M006 512 2 USIM Card Holder Table 2–10 Pin Description of Amphenol USIM Card Holder Pin Name Pin NO.
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ME3630 Hardware Development Guide RST 5 USIM card reset VDD 6 USIM card power supply 2.9. USB I NTERFACE ME3630 contains one integrated USB transceiver which complies with the USB 2.0 specification and supports high speed (480 Mbps), full speed (12 Mbps) and low speed (1.5 Mbps) mode. The USB interface is primarily used for AT command, data transmission, software debug and firmware upgrade. The following table shows the pin definition of USB interface. Table 2–11 USB Pin Description Pin Name Pin NO.
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ME3630 Hardware Development Guide Figure 2–15 Reference Circuit of USB Communication between module and AP  When USB is not the desired function, connect differential signal, power and GND via test points. We recommend to connect these pins to the standard pin header in order to convenient for debugging and upgrading. Figure 2–16 Reference circuit of USB when USB is not the desired function Note: we recommend connecting the USB interface for update and debugging the module.
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ME3630 Hardware Development Guide function mode while the Debug UART Port is used for software debugging . The following show the different features. Main UART interface support 1200 2400 4800 9600 19200 38400 57600 115200 230400 460800 921600 1000000 1500000 2000000 2500000 3000000 3500000bps baud rate, the default is 115200bps, This interface can be used for data transmission; AT communication or firmware upgrade (upgrade is not supported currently). Debug UART interface supports 115200bps baud rate.
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ME3630 Hardware Development Guide 2. 3-wire UART connection: (DCE) Serial Port UART_TXD (DTE) Serial Port TXD UART_RXD RXD UART_RTS RTS UART_CTS CTS UART_DTR DTR UART_DCD DCD UART_RI RING GND GND Figure 2–18 Schematic of 3-wire UART Connection 3.
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ME3630 Hardware Development Guide 2.10.3.
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ME3630 Hardware Development Guide Figure 2–25 Recommended 4-wires UART level switch circuit Figure 2–26 Recommended 2-wires UART level switch circuit  Debug UART Interface Debug UART Interface is 2-wires interface, we recommend the use to connect this two pins to test points or jumper header. Figure 2–27 The test point of debug UART 2.11. N ETWORK S TATUS I NDICATION The network indication pin LED_MODE can be used to drive a network status indicator LED.
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ME3630 Hardware Development Guide Table 2–14 Pin Definition of Network Indicator Pin Name Pin NO. I/O Description Comment LED_MODE 70 DO Indicate the module network registration mode 1.
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ME3630 Hardware Development Guide Figure 2–28 Reference Circuit of the Network Indicator 2.12. POWER_ON/OFF S TATUS I NDICATOR ON_STATE PIN69（ON_STATE） is used to indicate the status of POWER_ON/OFF Table 2–16 Pin Definition of ON_STATE Pin Name Pin NO. Description ON_STATE 69 High level: module power on and ready, it can send/receive AT command. Low level: module power off/reset state, and can’t send/receive AT command.
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ME3630 Hardware Development Guide High High WAKEUP_IN： Low Module state： Operating state Figure 2–29 Sleep state Operating state WAKEUP_IN input sequence Figure 2–30 Connections of the WAKEUP_IN pin NOTE: There is Anti-shake design with WAKEUP_IN pin internal, when pull up or down this pin by external processor, the level must last more than 500ms. WAKEUP_IN Usage scenario you can refer to the document named GOSUNCN ME3630 Module Power Management Design Guide.pdf 2.15.
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ME3630 Hardware Development Guide Table 2–20 Pin Definition of WAKEUP_OUT Pin Name Pin NO. I/O Description Comment WAKEUP_OUT 71 DO Output wakeup signal 1.8V power domain The pin output a high-level voltage by default. When a wake-up source (such as new SMS receive, call, network data ) arrives, the pin output a low-level-voltage pulse lasting for 1s For instance, When a wake-up source arrives, the module will output the level shown as the figure below through pin 71.
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ME3630 Hardware Development Guide NOTE: WAKEUP_OUT Usage scenario you can refer to the document named GOSUNCN ME3630 Module Power Management Design Guide.pdf 2.16. GPIO I NTERFACE Module provides 5 GPIO pins. The direction and output voltage level of the GPIO can be set by AT command "AT+ZGPIO". The input voltage level of the GPIO can also be read by AT command "AT+ZGPIO". For more details of these AT commands, please refer to document [AT Command Reference Guide of Module Product ME3630].
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ME3630 Hardware Development Guide 3. A NTENNA INTERFACE ME3630 antenna interface includes a main antenna, an Rx-diversity antenna and a GNSS antenna to improve receiving performance. The antenna interface has an impedance of 50Ω. 3.1. P IN D EFINITION The main antenna and Rx-diversity antenna pins definition are shown below. Table 3–1 Pin Definition of Antenna Pin Name Pin NO.
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ME3630 Hardware Development Guide Figure 3–1 Reference Circuit of Antenna Interface The following picture is the reference of GNSS active antenna, VDD is its power, power supply should be designed by actual requirements.
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ME3630 Hardware Development Guide Keep a proper distance between main and diversity antenna to improve the receiving sensitivity. 3.3. R EFERENCE PCB L AYOUT OF A NTENNA Please follow the following criterion in the process of antenna line PCB layout design: Make sure that the transmission line’s characteristic impedance is 50ohm; Keep line on the PCB as short as possible, since the antenna line loss shall be less than 0.
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ME3630 Hardware Development Guide 3.5. T EST M ETHODS FOR W HOLE -S ET A NTENNA OTA Figure below is the diagram of OTA test system of CTIA. The system is mainly composed of test chamber, high-precision positioning system and its controller, Windows based PC running test software and RF test instruments with automatic test program. The main RF instruments are integrated RF test equipment, Spectrum Analyzer, Network Analyzer.
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ME3630 Hardware Development Guide 4. E LECTRICAL , R ELIABILITY AND R ADIO CHARACTERISTICS 4.1. A BSOLUTE M AXIMUM R ATINGS Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table: Table 4–1 Absolute Maximum Ratings Parameter Min Max Unit V_BAT 3.4 4.2 V Peak current of V_BAT 0 2 A Voltage at digital pin -0.3 2.1 V Voltage at ADC1 0.05 4.15 V Voltage at ADC2 0.05 4.15 V 4.2.
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ME3630 Hardware Development Guide Bandwidth LTE 5MHz 10MHz 15MHz 20MHz LTE FDD Band 2, Pout=23dBm 575 575 620 630 mA LTE FDD Band 4, Pout=23dBm 515 530 550 600 mA LTE FDD Band 5 ,Pout=23dBm 610 610 mA LTE FDD Band 12,Pout=23dBm 620 630 mA LTE FDD Band 17, Pout=23dBm 550 600 mA Table 4–6 Averaged working current [2] Parameter Condition Typical Value Unit WCDMA Band2, Pout=24dBm 532 mA Band5, Pout=24dBm 526 mA 4.4.2.
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ME3630 Hardware Development Guide Tracking sensitivity -156dbm Cold-start sensitivity -144dbm TTFF (Open Sky) Hot start: 4s Cold start: 32s Receiver Type Qualcomm GNSS Gen8C GNSS L1 Frequency 1575.42MHz Update rate 2-4 HZ GNSS (GNSS/GLONASS) data format NMEA data protocol/GOSUNCN defined at commands GNSS (GNSS/GLONASS) Current consumption 65mA GNSS (GNSS/GLONASS) antenna Passive/Active antenna 4.6. ME3630-E T EST 4.6.1.
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ME3630 Hardware Development Guide Table 4–15 Conducted RF Output Power Frequency Max Min LTE FDD Band 1 23±2.7dBm -39dBm LTE FDD Band 3 23 ±2.7dBm -39dBm LTE FDD Band 7 23 ±2.7dBm -39dBm LTE FDD Band 8 23 ±2.7dBm -39dBm LTE FDD Band 20 23 ±2.7dBm -39dBm WCDMA Band 1 24+1/-3 dBm -50dBm WCDMA Band 8 24+1/-3 dBm -50dBm GSM Band3 33+2/-2 dBm 0±5dBm GSM Band8 30+2/-2 dBm 5±5dBm 4.6.3.
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ME3630 Hardware Development Guide LTE FDD Band 3, Pout=23dBm 645 mA LTE FDD Band 5 ,Pout=23dBm 523 mA LTE FDD Band 7,Pout=23dBm 662 LTE FDD Band 8,Pout=23dBm 512 mA LTE FDD Band18, Pout=23dBm 597 mA LTE FDD Band19, Pout=23dBm 617 mA LTE FDD Band21, Pout=23dBm 586 mA Table 4–21 Averaged working current [2] Parameter Condition Typical Value Unit WCDMA Band1, Pout=24dBm 514 mA Band5, Pout=24dBm 496 mA Band6, Pout=24dBm 580 mA Band8, Pout=24dBm 502 mA Band19, Pout=24dBm 572
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ME3630 Hardware Development Guide LTE FDD Band 7 -101.5 -92.1 LTE FDD Band 8 -101.2 LTE FDD Band18 -100.9 -96.2 LTE FDD Band 19 -101 -96.5 LTE FDD Band 21 -105 -98.9 -98.7 Table 4–24 Conducted RF Receiving Sensitivity Typical Value [2] Band Sensitivity(dBm) WCDMA Band 1 -110.6 WCDMA Band5 -110.8 WCDMA Band6 -110.3 WCDMA Band 8 -110.1 WCDMA Band 19 -110.2 4.8. ME3630-A1C T EST 4.8.1. CURRENT CONSUMPTION The values of current consumption in different operating mode are shown below.
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ME3630 Hardware Development Guide Table 4-29 Conducted RF Output Power Frequency Max (uplimit/downlimit) Min LTE FDD Band 2 23±2.7dBm -39dBm LTE FDD Band 5 23 ±2.7dBm -39dBm LTE FDD Band7 23 ±2.7dBm -39dBm LTE FDD Band 40 23 ±2.7dBm -39dBm WCDMA Band 2 24+1/-3 dBm -50dBm WCDMA Band5 24+1/-3 dBm -50dBm GSM B2 30±2 dBm 0dBm GSM B5 33±2 dBm 5dBm 4.8.3. RF RECEIVING SENSITIVITY The following table shows the conducted RF receiving sensitivity typical value of ME3630 module.
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ME3630 Hardware Development Guide 5. MECHANICAL D IMENSIONS This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 5.1.
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ME3630 Hardware Development Guide Figure 5–2 ME3630 Bottom Dimensions (perspective view) Note: The diameter of test point is 1mm. 5.2.
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ME3630 Hardware Development Guide Figure 5–3 Recommended Footprint (perspective view) NOTE:  Keep out the area below the test point (blue area on the above figure) in the host PCB.  In order to maintain the module, keep about 3mm between the module and other components in the host PCB.
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ME3630 Hardware Development Guide 6. R ELATED T EST & T EST S TANDARD 6.1. T ESTING R EFERENCE The related tests of MODULE comply with the IEC standard, including the equipment running under high/low temperature, storage under high/low temperature, temperature shock and EMC. Table 6-1 is the list of testing standard, which includes the related testing standards for MODULE.
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ME3630 Hardware Development Guide Normal working condition -30°C 75°C All the indexes are good. Extreme working condition -40~ -30°C 75~85°C Some indexes become poorer.
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ME3630 Hardware Development Guide 7. SMT P ROCESS AND BAKING G UIDE This chapter describes module’s storage, PAD design, SMT process parameters, baking requirements, etc., and it is applicable for the process guide to second-level assembly of LCC encapsulation module. 7.1. S TORAGE R EQUIREMENTS Storage conditions: temperature<40℃, relative humidity<90% (RH), 12 months weld ability guaranteed under this circumstances of excellent sealing package.
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ME3630 Hardware Development Guide G≥0.5mm Drill holes at 100% scale in the direction of width; extend 0.3mm outward in the direction of length Contract 0.05~0.1mm in the G＜0.5mm direction of width; Contract 0.05~0.1mm inward in the direction of length, extend 0.5mm outward in the direction of length. 0.1mm 0.1mm 0.5mm Steel mesh opening Module PAD on PCB 0.1mm Figure 7–1 Module Board’s Steel Mesh Diagram 7.3.3.
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ME3630 Hardware Development Guide The following picuture is the tape reel specific dimension for your reference: A: Whole dimension: B: Detailed dimension: Figure 7–3 Tape Reel Dimension 3） Mounting Pressure: In order to ensure a good contact between the module and the solder paste on main board, the pressure of placing the module board on main board should be 2-5N according to our experiences. Different modules have different numbers of pads, therefore the pressure selected are different.
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ME3630 Hardware Development Guide  Temperature drop rate: －2～－4℃/S NOTE: The test board of furnace temperature must be the main board with the module board mounted on, and there must be testing points at the position of module board. Figure 7–4 Module Furnace Temperature Curve Reference Diagram 7.3.5. REFLOW METHOD If the main board used by customers is a double-sided board, it is recommended to mount the module board at the second time.
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ME3630 Hardware Development Guide WARNING: The product’s transportation, storage and processing must conform to IPC/JEDEC J-STD-033. 7.4.2. BAKING DEVICE AND OPERATION PROCEDURE Baking device: Any oven where the temperature can rise up to 125°C or above. Precautions regarding baking: during the baking process, the modules should be put in the high-temperature resistant pallet flatly and slightly to avoid the collisions and frictions between the modules.
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ME3630 Hardware Development Guide Antenna Installation 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and the maximum antenna gain allowed for use with this device is 5 dBi. 2) The transmitter module may not be co-located with any other transmitter or antenna.