FIBOCOM FG621-LA Series Hardware Guide Version: V0.0.
Applicability Type No. Product Model 1 FG621-LA-00 Description LPDDR2 1Gb, SPI NAND 1Gb，support MAIN_ANT、 DIV_ANT Reproduction forbidden without Fibocom Wireless Inc.
Copyright Copyright ©2020 Fibocom Wireless Inc. All rights reserved. Without the prior written permission of the copyright holder, any company or individual is prohibited to excerpt, copy any part of or the entire document, or transmit the document in any form. Notice The document is subject to update from time to time owing to the product version upgrade or other reasons. Unless otherwise specified, the document only serves as the user guide.
Contents 1 Foreword ........................................................................................................................... 7 1.1 Document Introduction ......................................................................................................... 7 1.2 Safety Precautions ............................................................................................................... 7 2 Product Overview ...........................................................................
.6 ADC Interface..................................................................................................................... 35 5.7 I2C Interface ...................................................................................................................... 35 5.8 PCM Digital Audio Interface ............................................................................................... 36 5.8.1 Support Model ...................................................................................
9.4 SMT Patch ......................................................................................................................... 51 9.5 Packaging and Storage ...................................................................................................... 51 10 Certification................................................................................................................... 52 11 OEM/Integrators Installation Manual ..................................................................
1 Foreword 1.1 Document Introduction The document describes the electrical characteristics, RF performance, dimensions, and application environment, etc. of FG621-LA series wireless module. With the assistance of the document and other instructions, the developers can quickly understand the hardware functions of FG621-LA series module and develop products. 1.
interference occurs when it is near televisions, radios, computers, or other electronic devices. Keep the mobile device away from flammable gases. Turn off the mobile device when you get near to gas stations, oil depots, chemical plants or explosive workplaces. There are potential safety hazards when operating electronic equipment in any potentially explosive area. Reproduction forbidden without Fibocom Wireless Inc.
2 Product Overview 2.1 Product Introduction Fibocom FG621-LA series module is a CAT6 module designed based on UNISOC SL8563 platform and can support CA network architecture. FG621-LA series module integrates core devices such as Baseband, Memory, PMIC, Transceiver, and PA, and supports multi-format long-distance communication modes including FDD-LTE, TDD-LTE, and WCDMA. It supports the maximum downlink rate of 300Mbps and the maximum uplink rate of 50Mbps in CA mode.
Specification Normal operation: -30°C~+75°C① Temperature Extended operation: -40°C~+85°C② Storage: -40°C~+85°C③ Power-off leakage current: ≤ 100uA Power Base current: ≤ 2.5mA consumption (TBD) Sleep mode: ≤ 4.5mA Idle mode: ≤ 50mA Physical Package: LGA 299Pin characteristic Size: 39.5mm×37mm×2.6 mm s Weight: About 8.3g Interface Antenna Antenna: Main×1, DIV×1 (U)SIM 3.0V/1.8V USB 2.
③ indicates the range of the temperature where the module can perform storage without being damaged or powered on. 2.3 Functional Diagram Functional diagram shows the main hardware features of FG621-LA series module, including baseband and RF features.
ANT_MAIN ANT_DIV TRX Blocks 26M XO TX Transceiver VBAT_RF VBAT_BB LPDDR2 NAND SDIO GPIOs STATUS Control IQ PWRKEY RESET_N RX Control PMIC Baseband ADCs VDD_EXT USB (U)SIM PCM I2C SPI UART Figure 2-1 Functional diagram 2.4 Development Board Fibocom provides EVK-FG150-00, ADP-FG621-LA-00 development board to facilitate module’s debug and use. Reproduction forbidden without Fibocom Wireless Inc.
3 Pin Description 3.1 Pin Distribution FG621-LA series module is available with a total of 299 LGA pins. The top view of the pin distribution is shown in the figure below: Figure 3-1 Pin distribution (top view) Reproduction forbidden without Fibocom Wireless Inc.
3.2 Pin Function The pin function description of FG621-LA series module is shown in the following table: Table 3-1 Pin function description Pin# 1 Pin Name RESET_N I/O Level DI VILmin=-0.3V VILmax=0.5V VIHmax=VBAT_BB Description Module reset signal, active low, no need pull up externally 2 PWRKEY DI VILmin=-0.3V VILmax=0.5V VIHmax=VBAT_BB Module power-on/off signal, active low, no need pull up externally 3 BT_EN* DO WLAN_PWR_EN 5 DO * VOLmax=0.45V BT function enabling pin, VOHmin=1.
Pin# Pin Name I/O 32 USB_VBUS PI Level VOHmin=1.35V For3.0V (U)SIM: VILmax=1.0V VIHmin=1.95V VOLmax=0.45V VOHmin=2.55V Vmax=5.25V Vmin=3.0V Vnorm=5.0V Description USB plug detection Conform to USB2.0 USB differential data 33 USB_DM DIO standard signal (-) specification Conform to USB2.0 34 USB_DP USB differential data DIO standard signal (+) 36 USB_ID* DI specification VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.
Pin# Pin Name I/O 52 SD_ DETECT DI 56 RTS DO 57 CTS DI 58 RXD DI 59 60 61 62 65 DCD TXD RI DTR PCM_SYNC DO DO DO DI DIO Level VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Description VOLmax=0.45V VOHmin=1.35V Request to send data, VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Reserved Clear to send, Reserved Module Receive data, Reserved Module output carrier VOLmax=0.45V VOHmin=1.
Pin# Pin Name I/O 77 SPI_MOSI DO 78 SPI_MISO DI 79 SPI_CS DO 80 SPI_CLK DO 85~88 VBAT_RF PI Level VIHmin=1.2V VIHmax=2.0V VOLmax=0.45V VOHmin=1.35V VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Description VOLmax=0.45V VOHmin=1.35V SPI Chip Selection VOLmax=0.45V VOHmin=1.35V Vmax=4.3V Vmin=3.4V Vnorm=3.8V SPI output signal SPI input signal signal SPI clock signal RF power input (3.4V~4.
Pin# Pin Name I/O Level Description Reserved COEX_UART_R 146 147 149 150 DI X* NET_MODE WLAN_EN* WAKEUP_IN DO DO DI VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V LTE/WLAN shared serial VOLmax=0.45V VOHmin=1.35V Module network state VOLmax=0.45V VOHmin=1.35V Wake up WLAN module, VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.
Pin# Pin Name I/O Level Description sends data signal, Reserved Bluetooth serial port 164 BT_RTS* DO VOLmax=0.45V VOHmin=1.35V requests to send data signal, Reserved 165 BT_RXD* 166 BT_CTS* 168 VDD_EXT DI DI NET_STATUS 171 STATUS VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V Bluetooth serial port receives data signal, Reserved clears to send data signal, Reserved Vnorm=1.85V IOmax=50mA DO VOLmax=0.45V VOHmin=1.35V WLAN sleep clock VOLmax=0.45V VOHmin=1.
Pin# Pin Name I/O Level Description NC - - - 48,153,154,157,158,167, 174,177,178,181,184,18 7,191,196,202~208,214~ 299 4,6~9,11,12,14,15,18~23 ,37,38,40,41,72,74,91,95 ,101,113,115,119,134,13 5,176,179,180,182,183,1 85,186,188~190,192~19 5,197~201,209~213 Note: Keep the unused pins floating.
4 Electrical Characteristics 4.1 Power The following table shows the power interface of FG621-LA series module. Table 4-1 Power interface Pin I/O Pin# PI 85,86,87,88 Description Name Module power supply, 3.4V~4.3V, VBAT_RF nominal value 3.8V Module power supply, 3.4V~4.3V, VBAT_BB PI 155,156 nominal value 3.8V VDD_EX Module digital level, 1.85V output, PO 168 T 50mA VDD_2V Level output to external circuit, PO 162 8 2.
Figure 4-1 Recommended power design Power filter capacitor design is shown in the following table: Table 4-2 Filter capacitors design of power supply Recommended Application Description Capacitor Reduce power fluctuations during module operation, low ESR Capacitor is required, and 220uF x 2 Regulating capacitor the total capacitance should not be less than 440uF. The current driving capacity of VBAT must be not less than 2.0A.
Figure 4-2 Power limit 4.3 Power Output FG621-LA series module outputs a 1.85V voltage through the VDD_EXT for the use of the internal digital circuit of module. The voltage is the logic level of the module and can be used to indicate module power-on/off, or for external low current (< 50mA) circuits. FG621-LA series module outputs a 2.8V level through the VDD_2V8 for the use of the internal RF or other circuits, with an output current of < 200mA. Leave the signal floating if no use.
Average Current Typ. Parameter Mode Condition (mA) TDD-LTE Paging Cycle #256(USB sleep) 2.7 Radio Off AT+CFUN=0(USB sleep) 2 DRX6(USB wakeup) 41 DRX8(USB wakeup) 40 DRX9(USB wakeup) 39 Paging Cycle #32(USB wakeup) 43 Paging Cycle #64(USB wakeup) 42 Paging Cycle #128(USB wakeup) 41 Paging Cycle #256(USB wakeup) 40 Paging Cycle #32(USB wakeup) 43 Paging Cycle #64(USB wakeup) 42 Paging Cycle #128 USB wakeup) 41 Paging Cycle #256(USB wakeup) 40 Band2 @+23.5dBm 700 Band4 @+23.
In 2CA mode, The maximum power consumption combination of fg621 under the maximum bandwidth is shown in the table below.
5 Functional Interface 5.1 Control Interface Two control signals are used to open, shut down and reset the module. Pin definition is shown in the following table: Table 5-1 Control signal Pin Name I/O Pin# Description When the module is in operating mode, pull down RESET_N for at RESET_N DI 1 least 2.1s (3s-8s recommended), and then release it, the module is reset. Internally pulled up. When the module is in power-off mode, pull down PWRKEY for at least 1.
Figure 5-2 Button switch power-on reference circuit The power-on timing is shown in the following figure: Figure 5-3 Power-on timing Note: Before pulling down PWRKEY pin, make sure the VBAT voltage is stable. It is recommended that the time interval between powering up VBAT and pulling down PWRKEY pin should be not less than 30ms. It takes about 30s to power-on, Other operations such as power-off, reset, etc. can be performed only after the complete power-on. 5.1.1.
Shutdown Mode Shutdown Method Hardware Pull down PWRKEY for at least 2.1s, shutdown 3s~8s recommended Applicable Scenario Hardware normal shutdown AT AT+CPWROFF command Software normal shutdown shutdown Note: 1. When the module is working properly, do not cut off the power of the module immediately to avoid damaging internal flash. It is strongly recommended to shut down the module by PWRKEY pin or AT command before cutting off the power supply. 2.
shown in Figure 5-5 and Figure 5-6, respectively: Figure 5-5 OC driven reset reference circuit Figure 5-6 Button reset reference circuit The reset timing is shown as follows: Figure 5-7 Reset timing Note: RESET_N is a sensitive signal, so it is recommended to add a regulator capacitor close to the module. The PCB layout should be kept away from the RF interference and protected by Ground. At the same time, avoid routing on the edge and surface of PCB (to avoid module reset caused by ESD). 5.
by default, AT commands AT+LEDCFG can switch to pin147 or pin171, table 5-4 is the pin definition. Table 5-4 Network status indication Pin Name I/O Pin# Description STATUS DO 171 Network status indicator NET_MODE DO 147 Network status indicator(by default) NET_STATUS DO 170 Network status indicator Status indicator driven by network status indicator interface is used to describe the network status of the module.
5.3 (U)SIM Card Interface FG621-LA series module has built-in (U)SIM card interface, and supports 1.8V and 3.0V (U)SIM card. 5.3.1 (U)SIM Pin Definition (U) SIM pin definition is shown in the following table: Table 5-6 (U)SIM pin definition Pin Name I/O Pin# Description USIM_DET DI 25 Detect (U)SIM card for Hot-plug USIM_VDD PO 26 (U)SIM Power USIM_DATA IO 29 (U)SIM data signal USIM_CLK DO 27 (U)SIM clock signal USIM_RST DO 28 (U)SIM reset signal 5.3.2 (U)SIM Interface Circuit 5.3.
Figure 5-9 (U)SIM card connector (SIM016-8P-220P) SIM016-8P-220P card connector, DET and POL are short connected when the card is inserted, DET and POL are disconnected when there is no card. The following is the reference design circuit. When (U)SIM card is inserted, USIM_DET pin is in high level, when (U)SIM card is removed, USIM_DET pin is in low level. Figure 5-10 (U)SIM card connector with detection signal reference circuit Reproduction forbidden without Fibocom Wireless Inc.
5.3.2.2 (U)SIM Card Connector without Detection Signal When using an (U)SIM card connector without detection signal, USIM_DET pin must be left floating, and at the same time, the hot plug function should be disabled using AT command. The reference circuit is shown in the figure below. Figure 5-11 (U)SIM card connector without detection signal reference circuit 5.3.
The USIM_DET pin is active high by default, and can be switched to active low by AT command. Table 5-8 USIM_DET effective level switched AT command Function description AT+GTSET=”SIMPHASE”,1 Default, high level detection AT+GTSET=”SIMPHASE”,0 Low level detection 5.3.4 (U)SIM Design Requirements (U)SIM card circuit design should meet EMC standards and ESD requirements, and at the same time, should improve anti-interference ability to ensure that the (U)SIM card can work stably.
Since the module supports USB 2.0 High-Speed, TVS equivalent capacitance on the USB_DM/DP differential signal line is required to be less than 1pF, and a 0.5pF TVS is recommended. It is recommended to connect a 0Ω resistor to USB_DM/DP differential line in series.
Pin Name I/O Pin# Description I2C_SDA 42 DIO I2C interface data signal, pulled up inside the module I2C_SCL 43 DO I2C interface data signal, pulled up inside the module 5.8 PCM Digital Audio Interface FG621-LA series module provides a digital audio interface (PCM) for communication with digital audio devices such as an external Codec. 5.8.1 Support Model Table 5-13 Support model of PCM Product Model Description FG621-LA-00 series Support 5.8.
Fibocom technical support. 5.8.4 PCM Signal Description FG621-LA series module provides PCM signal using domestic mainstream European E1 standard. PCM_CLK is encoded by 2.048MHz clock and 16bit linear format. PCM_SYNC is an 8kHz short pulse (488ns).
Timing Min Typ Max Unit t(syncd) PCM_SYNC low level time – 124.5 – μs t(clk) PCM_CLK cycle – 488 – ns t(clkh) PCM_CLK high level time – 244 – ns t(clkl) PCM_CLK low level time – 244 – ns t(susync) PCM_SYNC setup time – 122 – ns t(sudin) PCM_DIN setup time 60 – – ns t(hdin) PCM_DIN hold time 10 – – ns t(pdout) PCM_DOUT setup start time – – 60 ns t(zdout) PCM_DOUT hold end time – 160 – ns 5.
insertion at low level. Figure 5-15 FG621-LA SD reference circuit 5.10 SPI Interface The FG150-AE module supports 1 SPI interface, works in master mode, and the clock supports up to 50MHz. Table 5-18 SPI interface definition Pin Name I/O Pin# Description SPI_MOSI 77 DO SPI output signal SPI_MOSI 78 DI SPI input signal SPI_CS 79 DO SPI Chip Selection signal SPI_CLK 80 DO SPI clock signal 5.
Pin Name I/O Pin# Description Instructions for Use Port 2 chip by default General-Purpose GPIO_3 IO I/O Port 3 General-Purpose GPIO_4 IO by default I/O General-Purpose IO Input pull-down inside the 161 Port 4 GPIO_5 Input pull-up inside the chip 159 chip by default I/O Input pull-down inside the 172 Port 5 chip by default Reproduction forbidden without Fibocom Wireless Inc.
6 Low Power Consumption 6.1 Flight Mode Table 6-1 W_DISABLE# pin description Pin Name I/O Pin# W_DISABLE# DI 151 Description Module flight mode control (disabled and internal pulled up by default) FG621-LA series module supports two ways to enter flight mode: Table 6-2 Ways of entering flight mode Send “AT+GTFMODE=1” to enable flight mode control Hardware I/O interface button function.
7 RF Interface FG621-LA series module provides two antenna interfaces, i.e., main antenna interface and diversity antenna interface. The pin definition is shown in the following table: Table 7-1 Antenna interface Pin Name I/O Pin# Description ANT_DIV AI 127 Diversity antenna ANT_MAIN IO 107 Main antenna 7.
Mode LTE TDD Band Tx Power (dBm) Description Band 5 23±2 UL 10MHz Bandwidth, 1 RB Band 7 23±2 UL 10MHz Bandwidth, 1 RB Band 12 23±2 UL 10MHz Bandwidth, 1 RB Band 13 23±2 UL 10MHz Bandwidth, 1 RB Band 28 23±2 UL 10MHz Bandwidth, 1 RB Band 66 23±2 UL 10MHz Bandwidth, 1 RB Band 40 23±2 UL 10MHz Bandwidth, 1 RB 7.
Antenna efficiency is the ratio of antenna input power to radiated power. Due to the antenna’s return loss, material loss, and coupling loss, the radiated power is always lower than the input power. Antenna efficiency >40% (-4dB) is recommended. S11 or VSWR S11 indicates that the matching degree of the antenna’s 50Ω impedance, which affects the antenna efficiency to a certain extent. This indicator can be measured using VSWR test. S11<-10dB is recommended.
FG621-LA series module Main Antenna Requirements LTE Band 4(2100): 450 MHz LTE Band 5(850): 70 MHz LTE Band 7(2600): 190 MHz LTE Band 12(700): 48 MHz LTE Band 13(800): 21 MHz LTE Band 28(700):100 MHz LTE Band 66(2100): 490 MHz LTE Band 40(2300): 100 MHz Impedance 50 Input power > 25dBm average power for WCDMA & LTE Standing wave ratio ≤ 2:1 recommended 7.4.2 Antenna Reference Design The antenna is a sensitive device and is easily affected by the external environment.
Since the antenna cable loss should be less than 0.3dB, keep PCB routing as short as possible. PCB LAYOUT should be as straight as possible to avoid vias and layers, and avoid right-angle and acute-angle routing. PCB routing should have a good reference ground to avoid other signal line from approaching the antenna. A complete ground level is recommended as a reference ground. Strengthen the connection between the ground around the antenna and the main ground.
8 Reliability 8.1 Limiting Voltage Range The limiting voltage includes the absolute limiting voltage and the operating limiting voltage. The absolute limiting voltage is the maximum voltage that the module can bear, beyond which the module may be damaged. The operating limiting voltage is the normal operating voltage range of the module, beyond which the module will have an abnormal performance. 8.1.
Table 8-3 Ambient temperature range Temperature Min Typ Max Unit Operating temperature -30 25 75 ℃ Limited operating temperature -40 - 85 ℃ Storage temperature -40 - 85 ℃ 8.3 Environmental Reliability Requirements The module is required to be able to power-on, the function is normal, and the performance meets the standard, after the following test items.
Table 8-5 ESD allowable discharge range Part Air Discharge Contact Discharge VBAT, GND ±10KV ±5KV Antenna interface ±8KV ±4KV Other interface ±1KV ±0.5KV Reproduction forbidden without Fibocom Wireless Inc.
9 Structure Specification 9.1 Product Appearance The product appearance of FG621-LA series module is shown in Figure 9-1: Figure 9-1 Product appearance 9.2 Structural Dimension The structural dimension of FG621-LA series module is shown in Figure 9-2: Figure 9-2 Structural dimension (in mm) Reproduction forbidden without Fibocom Wireless Inc.
9.3 PCB Soldering Pad and Stencil Design For PCB soldering pad and stencil design, please refer to FIBOCOM FG621 Series SMT Design Guide. 9.4 SMT Patch For SMT production process parameters and related requirements, please refer to FIBOCOM FG621 Series SMT Design Guide. 9.5 Packaging and Storage For packaging and storage, please refer to FIBOCOM FG621 Series SMT Design Guide. Reproduction forbidden without Fibocom Wireless Inc.
10 Certification FG621-LA series module certification is shown as follow: Table 10-1 Certification Certificate FG621-LA Series Module HF, ROHS, FCC FG621-LA-00 For more information, please visit Fibocom website: http://www.fibocom.com/ 11 OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in fixed applications, according to Part 2.1091(b). 3.
“Contains FCC ID: ZMOFG621LA” The FCC ID can be used only when all FCC compliance requirements are met. Antenna Installation (1) The antenna must be installed such that 20 cm is maintained between the antenna and users, (2) The transmitter module may not be co-located with any other transmitter or antenna. (3) Only antennas of the same type and with equal or less gains as shown below may be used with this module.
interference by one of the following measures: - Reorient or relocate the receiving antenna. - Increase the separation between the equipment and receiver. - Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. - Consult the dealer or an experienced radio/TV technician for help. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment.
12 Appendix 12.
Abbreviation Definition TX Transmitting Direction TDD Time Division Duplexing UART Universal Asynchronous Receiver & Transmitter UMTS Universal Mobile Telecommunications System (U)SIM (Universal) Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value
FIBOCOM EVK-FG150-00 User Guide FIBOCOM FG621 Series SMT Design Guide 12.3 Reference Standards The design of this product complies with the following standards: 3GPP TS 51.010-1 V10.5.0: Mobile Station (MS) conformance specification, Part 1: Conformance specification 3GPP TS 34.121-1 V10.8.0: User Equipment (UE) conformance specification, Radio transmission and reception (FDD), Part 1: Conformance specification 3GPP TS 34.122 V10.1.
